JPH09260593A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance AD exchange precision by a method wherein data from an external unit of an integrated circuit are writable and a volatile memory part for controlling an on/off state of a switch element is provided in a memory data. SOLUTION: A nonvolatile memory part 20 is formed on the same chip as a variable resistor circuit 10, and based on control from an external unit of an integrated circuit, an on/off state of a transmission gate circuit 105 is controlled. Data for controlling selectively the transmission gate 105 to be in an on state are written, whereby a connection circuit of a polysilicon resistor element 104 is controlled, and a resistance value of a resistance array circuit 101 is variably controlled. Data for controlling at least one transmission gate circuit 105 out of resistor-switch series circuits of the resistance array circuit 101 to be in an on state are written, whereby an opening state between two nodes is avoided. Thereby, AD exchange precision can be enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit (IC), and more particularly to a variable resistance circuit formed inside the IC and capable of variably controlling a resistance value from outside the IC.
For example, it is used for a reference voltage generating circuit of a parallel comparison type analog-digital (AD) converter.

[0002]

2. Description of the Related Art Generally, a parallel comparison type AD converter compares an analog voltage obtained by sampling an analog signal input with a plurality of different reference voltages and obtains an AD conversion output based on the magnitude relationship. It is a thing.

FIG. 3 shows an example of the principle configuration of a parallel comparison type AD converter formed in a semiconductor integrated circuit.
In FIG. 3, SH is a sample and hold circuit that samples and holds an analog signal input in the sampling mode, REF is a reference voltage generation circuit that generates a plurality of different reference voltages, and CP is the output of the sample and hold circuit. A plurality of voltage comparators that are commonly input to one input terminal and one of the plurality of reference voltages is input to a second input terminal.

The voltage comparator CP is connected between, for example, an inverting amplifier for voltage comparison and an input / output terminal of the inverting amplifier, is controlled to be on in the sampling mode, and is turned off in the comparison mode. It is composed of a controlled switch circuit.

Further, the reference voltage generating circuit REF has 2
A resistor string in which a resistor element group is connected in series between two voltage nodes is used, and the resistor string is configured to output a plurality of divided reference voltages.

FIG. 4 shows an example of a conventional polysilicon resistor used in a resistor string for the reference voltage generating circuit. The polysilicon resistor 40 shown in FIG. 4 is configured to correct and control its resistance value so that the reference voltage output can be corrected in order to correct the offset of the AD conversion error and improve the AD conversion accuracy. ing.

That is, the first aluminum wiring 41 is formed between one end of the polysilicon resistor 40 and the power supply potential Vcc, and the other end of the polysilicon resistor 40 and the ground potential Vss.
A second aluminum wiring 42 is formed between
In the wafer process stage, the correction value of the resistance value is controlled by selecting the contact position between the other end side of the polysilicon resistor 40 and the second aluminum wiring 42 from a plurality of positions.

However, in the above-mentioned conventional example, since the resistance value is corrected and controlled in the wafer process stage, after packaging the divided chips from the wafer, the variation in the resistance value for each integrated circuit due to the variation in the process is caused. The amount of resistance correction cannot be changed. Further, in the above-mentioned conventional example, only a simple offset correction for an AD conversion error can be performed.

[0009]

As described above, the resistance element used in the reference voltage generating circuit of the conventional AD converter cannot change the correction amount of the resistance value after the integrated circuit is manufactured. However, there is a problem that only a simple offset correction can be performed for the AD conversion error.

The present invention has been made to solve the above-mentioned problems. The resistance value can be variably controlled externally even after packaging of the integrated circuit, and the AD converter can be used in the reference voltage generating circuit of the AD converter to obtain an AD conversion error. By performing complicated correction of
An object of the present invention is to provide a semiconductor integrated circuit having a resistance circuit that can improve D conversion accuracy.

[0011]

A semiconductor integrated circuit according to the present invention is provided in a plurality of sets of resistor array circuits connected in series between two nodes and the resistor array circuit and connected in parallel with each other. A plurality of resistance / switch series circuits, a polysilicon resistance element and a switch element which are provided in the resistance / switch series circuit and are connected in series with each other, and data can be rewritten from outside the integrated circuit. And an electrically erasable and writable non-volatile memory unit used to control the on / off state of the switch element.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION When the present invention is applied to a reference voltage generating circuit of an AD converter, for example, when the AD converter is used after packaging of the IC, the resistor array circuit sets any appropriate resistance value. In addition, the resistance value of the resistance circuit is set so that AD conversion is performed in an initial state in which the reference voltage generating circuit generates any appropriate reference voltage, and the reference voltage necessary for correcting the conversion error is generated according to the AD conversion result. The control data is written in the nonvolatile memory unit from outside the IC.

As a result, even after packaging, it is possible to arbitrarily change the correction amount of the resistance value of the resistance array circuit with respect to the dispersion of the resistance value of the resistance element for each IC due to the dispersion of the process, and the AD conversion is performed. It is possible to perform not only a simple offset correction for the error of 1) but also a complicated correction of the AD conversion error, and it is possible to improve the AD conversion accuracy.

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows an example of a variable resistance circuit used as a reference voltage generation circuit of an AD converter as shown in FIG. 3 as an embodiment of an IC of the present invention.

In FIG. 1, 11 is a first node to which the power supply potential Vcc is applied, 12 is a second node to which the ground potential Vss is applied, and the variable resistance circuit 10 is connected between the two nodes. ing.

The variable resistance circuit 10 has a plurality of sets of resistance array circuits 101 connected in series between two nodes. In each of the resistance array circuits 101, a plurality (three in this example) of resistor / switch series circuits are connected in parallel with each other.

The plurality of resistance / switch series circuits in each resistance array circuit 101 are formed by connecting, for example, a polysilicon resistance element 104 and a CMOS transmission gate circuit 105 having different resistance values in series. Then, one end side of each polysilicon resistance element 104 of the plurality of resistor / switch series circuits is commonly connected, and one end side of each transmission gate circuit 105 is commonly connected.

The non-volatile memory section 20 is formed on the same chip as the variable resistance circuit 10 and can control the on / off state of the transmission gate circuit 105 based on the control from outside the integrated circuit. As an example, an EEPROM (electrically writable / erasable read-only memory) as shown in FIG. 2 is used.

The EEPROM shown in FIG. 2 has a group of memory cells (EEPROM cells) 21, a data write circuit 22 capable of writing data to the EEPROM cell group 21 from outside the integrated circuit, and the EEPROM cell group 2.
And a data read circuit 23 for reading the stored data of No. 1 and controlling the on / off state of the transmission gate circuit 105.

The nonvolatile memory 20 unit controls the connection paths of the plurality of polysilicon resistance elements 104 by writing data for selectively controlling the plurality of transmission gate circuits 105 to be turned on. It is possible to variably control the resistance value of the resistance array circuit 101 of each set, and thus the resistance value of the entire variable resistance circuit 10 in FIG.

In this case, the resistor array circuits 10 of each set are provided.
Data is written to control the transmission gate circuit 105 of at least one resistance-switch series circuit of the plurality of resistance-switch series circuits in No. 1 in the ON state, thereby opening the two nodes. You can avoid getting into a state.

When the AD converter is used after the IC is packaged in the above embodiment, the variable resistance circuit 10 has any appropriate resistance value and the reference voltage generating circuit generates any appropriate reference voltage. In the initial state, AD conversion is performed, and data for controlling the resistance value of the variable resistance circuit 10 is generated from the outside of the integrated circuit so as to generate the reference voltage necessary for correcting the conversion error according to the AD conversion result. Write in section 20.

As a result, even after packaging, it is possible to arbitrarily change the correction amount of the resistance value of the resistance array circuit 10 with respect to the dispersion of the resistance value of the resistance element for each IC due to the dispersion of the process. Not only simple offset correction for conversion errors but also complicated correction of AD conversion errors can be performed, and AD conversion accuracy can be improved.

[0024]

As described above, according to the present invention, the resistance value can be variably controlled externally even after the packaging of the IC,
A semiconductor integrated circuit having a variable resistance circuit capable of improving AD conversion accuracy can be realized by using the AD converter in a reference voltage generation circuit to perform complicated correction of an AD conversion error.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a variable resistance circuit used in a reference voltage generation circuit of an AD converter according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a nonvolatile memory unit in FIG.

FIG. 3 is a circuit diagram showing an example of an AD converter formed on an IC.

FIG. 4 is a diagram showing a plane pattern of a resistance element used in the reference voltage generation circuit in FIG.

[Explanation of symbols]

10 ... Variable resistance circuit, 101 ... Resistor array circuit, 104
... polysilicon resistance element, 105 ... CMOS transmission gate circuit, 11 ... first node, 12 ... second
Node, 20 ... Non-volatile memory section, 30 ... Reference voltage generating circuit.

Claims (2)

[Claims] 1. A plurality of sets of resistor array circuits formed on a semiconductor chip and connected in series between two nodes, and a plurality of resistors provided in the resistor array circuit and connected in parallel with each other. A switch series circuit, a polysilicon resistance element and a switch element which are provided in the resistor / switch series circuit and are connected in series with each other, and data can be rewritten from outside the integrated circuit, and the stored data is stored in the switch element. A semiconductor integrated circuit comprising an electrically erasable / writable non-volatile memory unit used to control an on / off state. 2. The semiconductor integrated circuit according to claim 1, wherein the resistance array circuit is connected to a reference voltage generation circuit of an AD converter, and the resistance array circuit responds to a resistance value controlled by stored data of the nonvolatile memory unit. A semiconductor integrated circuit, characterized in that a reference voltage output of the reference voltage generating circuit is determined.