JP2002343868A - Internal voltage generating circuit, nonvolatile memory device, and semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly accurate internal voltage generating circuit by generating supplementary voltage, according to use conditions, without necessity of performing trimming adjustment in an inspection process. SOLUTION: A trimming value generating circuit 4 generates a trimming value corresponding to the difference between the digital value converted by an A/D converter 3 from a first reference voltage Vref1 generated by a first reference voltage generating circuit 1 and the objective voltage value, and sets the trimming value to a second reference voltage generating circuit 2, and there a second reference voltage Vref2 is generated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a trimming technique for automatically correcting an internally generated voltage.

[0002]

2. Description of the Related Art The voltage adjustment of a conventional internal voltage generating circuit is performed as follows.
As shown in FIG. 13, the voltage generated by the reference voltage generation circuit 60 with a trimming function is output to the external terminal 62, and the voltage VOUT of the external terminal 62 is measured in the inspection process. The result is processed on the side of the inspection device (tester), the trimming adjustment amount is calculated, and the fuse 61 is cut as necessary to adjust the trimming.

Next, a description will be given of voltage adjustment of a flash memory or an internal voltage generation circuit which is built in a one-chip system LSI having the flash memory and generates voltages necessary for various operations thereof.

In a system LSI shown in FIG. 14, a flash memory 67 stores data 0 and 1 by changing a threshold voltage Vt of a memory cell transistor, and detects a cell current when a gate voltage is applied. Thus, the nonvolatile memory is characterized in that data 0 and 1 are read. Reference numeral 68 denotes a circuit block including a CPU and its peripheral circuits.

In the inspection process, the voltage generated by the reference voltage generating circuit 64 having a trimming function is applied to the external terminal 6.
9 to output the voltage V of the external terminal 69 in the inspection process.
Measure OUT. The result is processed on the inspection device (tester) side to calculate the trimming adjustment amount, and then the trimming data is transferred to the flash memory
7 is written into the memory array 2 and the inspection is completed.

In the actual use state, immediately after the power is turned on, the trimming data stored in the memory cell array 2 is transferred to the temporary trimming data storage register 66. Thereafter, a reference voltage is generated based on the trimming value stored and held in the register 66, and an appropriate voltage corresponding to the reference voltage is generated by the voltage multiplier 65.

[0007]

In the conventional system LSI as described above, when the trimming data is read immediately after power-on, the trimmed data is in an unknown state, so that a corrected voltage can be generated. However, since the read voltage of the memory cell varies greatly, special specifications are required, such as slowing down the memory access unlike usual.

Further, the trimming adjustment can be performed only in the inspection process, and a non-volatile memory area for storing the trimming value, a fuse, and the like are essential.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to eliminate the necessity of performing trimming adjustment in an inspection process, and to provide a more accurate internal voltage which always generates a correction voltage according to use conditions. An object of the present invention is to provide a voltage generation circuit, a nonvolatile memory device incorporating the voltage generation circuit, and a semiconductor integrated circuit device.

[0010]

In order to achieve the above object, a first internal voltage generating circuit according to the present invention comprises a first reference voltage generating section for generating a first reference voltage, An analog / digital converter for converting an analog value of the first reference voltage generated by the reference voltage generator into a digital value, and a difference between the digital value converted by the analog / digital converter and the target voltage value. A trimming value generator for generating a trimming value, and a second reference voltage generator for receiving a trimming value from the trimming data generator and generating a second reference voltage are provided.

According to this configuration, the voltage generated by the first reference voltage generation circuit is converted into a digital value by the A / D converter, and the trimming value can be determined based on data relating to the manufacturing variation of the circuit. By correcting the voltage with respect to the second reference voltage generating unit actually used by the unit, the voltage can be corrected at the same time when the power is turned on.
A special process such as calculating and storing a trimming value by inspection or cutting a fuse is unnecessary, and real-time correction in a use environment becomes possible.

In order to achieve the above object, a second internal voltage generating circuit according to the present invention includes a first reference voltage generating section for generating a first reference voltage and a first reference voltage generating section. An analog-to-digital converter that converts the analog value of the first reference voltage into a digital value, and a storage unit that stores correction data for the target voltage value using the digital value converted by the analog-to-digital converter as an address. And a second reference voltage generation unit that receives the correction data from the storage unit and generates a second reference voltage.

According to this configuration, the voltage generated by the first reference voltage generator is converted into a digital value by the A / D converter, and the converted value is used as an address of the ROM and the data of the ROM is used as a correction value. By generating a correction value using a table and correcting the voltage for the second reference voltage generator actually used, the correction of the generated voltage is extremely complicated or does not have a certain law. Therefore, even when the correction by the logic circuit cannot be performed, it is possible to generate a correct correction value.

In order to achieve the above object, a third internal voltage generating circuit according to the present invention comprises a reference voltage generating section, and an analog circuit for converting an analog value of the reference voltage generated by the reference voltage generating section into a digital value. / Digital conversion unit, a storage unit storing correction data for the target voltage value using the digital value converted by the analog / digital conversion unit as an address, and temporarily storing the correction data read from the storage unit. A register for setting the correction data for the voltage generator.

According to this configuration, the timing generated by the reference voltage generation unit is converted into a digital value by the A / D converter by providing trimming timing as necessary, such as when the power is turned on. With R as the address of the ROM
By generating a correction value using a table that uses OM data as a correction value and storing the correction value in a register, it is possible to perform correction for a reference voltage actually used, which is generated by one reference voltage generation unit. This makes it possible to perform correction closer to the actual use state. Furthermore, by performing the trimming mode at regular intervals, it is possible to cope with environmental changes.

In order to achieve the above object, a fourth internal voltage generating circuit according to the present invention comprises: a reference voltage generating section; and an analog circuit for converting an analog value of the reference voltage generated by the reference voltage generating section into a digital value. / Digital conversion unit, a storage unit storing correction data for the target voltage value using the digital value converted by the analog / digital conversion unit as an address, and temporarily storing the correction data read from the storage unit. A register for setting correction data for the generation unit, a temperature detection unit for detecting the temperature in the circuit, and a power supply voltage detection unit for detecting the power supply voltage, the correction data is a temperature signal from the temperature detection unit and It is selectively output from the storage unit in response to a power supply voltage signal from the power supply voltage detection unit.

According to this configuration, trimming timing is provided as necessary, such as when the power is turned on, and the voltage generated by the reference voltage generator is converted into a digital value by the A / D converter. And the value converted into a digital value by the A / D converter are detected as R.
By selecting a table that uses ROM data as a correction value as an OM address, for example, a table for a high power supply voltage or a table for a high temperature, the accuracy of correction can be further improved.

To achieve the above object, a fifth internal voltage generating circuit according to the present invention comprises a reference voltage generating section, a voltage multiplying section for multiplying a reference voltage generated by the reference voltage generating section, and a voltage multiplying section. An analog / digital converter for converting an analog value of the reference voltage multiplied by the unit into a digital value; and a storage unit for storing correction data for the target voltage value using the digital value converted by the analog / digital converter as an address. A register for temporarily storing the correction data read from the storage unit and setting the correction data for the reference voltage generation unit, a temperature detection unit for detecting the temperature in the circuit, and a power supply voltage detection for detecting the power supply voltage Wherein the correction data is selectively output from the storage unit in accordance with the temperature signal from the temperature detection unit and the power supply voltage signal from the power supply voltage detection unit. To.

According to this configuration, the voltage generated by the reference voltage generating circuit is multiplied by the voltage multiplying circuit to a high voltage actually used by providing trimming timing as required, such as when the power is turned on. By converting to a digital value by the A / D converter, the voltage to be converted is increased, the conversion accuracy can be increased, and the correction accuracy can be further improved.

To achieve the above object, a nonvolatile memory device according to the present invention comprises a memory cell array having a plurality of bit lines, a gate selection circuit connected to the drain node of the memory cell via the bit lines, A sense amplifier connected to the gate selection circuit for amplifying the potential of the bit line; a write circuit connected to the gate selection circuit for writing data to the memory cell; and a word line selection connected to the gate of the memory cell Circuit, and an internal voltage generation circuit connected to the word line selection circuit and generating a voltage supplied to the word line. The internal voltage generation circuit includes a reference voltage generation unit and a reference voltage generated by the reference voltage generation unit. A voltage multiplier that multiplies the voltage and generates a voltage for the word line, and converts the analog value of the reference voltage multiplied by the voltage multiplier to a digital value And an analog / digital conversion unit that,
Using the digital value converted by the analog / digital conversion unit as an address, a storage unit storing correction data for the target voltage value, and temporarily storing the correction data read from the storage unit, and correcting the reference voltage generation unit A register for setting data, a temperature detection unit for detecting a temperature in the circuit, and a power supply voltage detection unit for detecting a power supply voltage, wherein the correction data includes a temperature signal from the temperature detection unit and a power supply voltage detection unit. The storage unit is selectively output in accordance with a power supply voltage signal.

According to this configuration, the voltage generated by the reference voltage generating circuit is multiplied by a voltage multiplying circuit to a high voltage actually used by providing trimming timing as necessary, such as when the power is turned on. The A / D converter converts the data into a digital value, and further detects a change in the power supply voltage and a change in the temperature. By selecting a table, for example, a table for high power supply voltage or a table for high temperature, the voltage to be converted by the A / D converter is also high, and the conversion accuracy can be increased, and the voltage can be corrected immediately after the power is turned on. For example, when data stored in a flash memory is read to perform redundancy relief, or when information is read after power-on, the It is possible to generate a voltage required for reading the Sshumemori.

In order to achieve the above object, a semiconductor integrated circuit device according to the present invention includes a CPU, a peripheral circuit section of the CPU, a memory cell array which is a nonvolatile memory and has a plurality of bit lines, A gate selection unit connected to the drain node of the memory cell via the memory cell, a sense amplifier connected to the gate selection unit for amplifying the potential of the bit line, and a data writing to the memory cell connected to the gate selection unit Memory, which includes a write circuit for performing the above operation and a word line selection circuit connected to the gate of the memory cell, and an internal voltage which is connected to the word line selection circuit of the nonvolatile memory and generates a voltage supplied to the word line The internal voltage generation circuit multiplies the reference voltage generated by the reference voltage generation section and the reference voltage generated by the reference voltage generation section to generate a voltage for the word line. A voltage multiplying unit to generate, an analog / digital converting unit for converting an analog value of the reference voltage multiplied by the voltage multiplying unit into a digital value, and a target voltage value using the digital value converted by the analog / digital converting unit as an address. A storage unit storing the correction data for, and temporarily store the correction data read from the storage unit,
A register for setting correction data for the reference voltage generator, a temperature detector for detecting a temperature in the circuit, and a power supply voltage detector for detecting a power supply voltage, wherein the correction data is the temperature from the temperature detector. The signal is selectively output from the storage unit according to the signal and the power supply voltage signal from the power supply voltage detection unit.

According to this configuration, the voltage generated by the reference voltage generating circuit is multiplied by the voltage multiplying circuit to a higher voltage actually used, by providing trimming timing as required, such as when the power is turned on. The A / D converter built in the one-chip system LSI converts the value into a digital value, further detects the fluctuation of the power supply voltage and the temperature, and converts the value converted into the digital value by the A / D converter into RO.
By selecting a table that uses ROM data as a correction value as the address of M, for example, a table for high power supply voltage or a table for high temperature, the voltage to be converted by the A / D converter is increased and the conversion accuracy can be increased. Since voltage correction can be performed immediately after power-on, for example, when redundancy relief is performed in a flash memory, information for redundancy is stored in the flash memory, and even when information is read out after power-on, accurate It is possible to reduce the chip area by providing an A / D converter for generating an internal voltage and for obtaining an external analog signal by providing an input switch or the like. it can.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram showing a configuration of an internal voltage generation circuit according to a first embodiment of the present invention.

In FIG. 1, the first reference voltage generating circuit 1 (internal configuration is shown in FIG. 2) starts operating at the same time as the power is turned on, and outputs the first reference voltage Vref1. The first reference voltage Vref1 is input to the A / D converter 3 and its analog value is converted to a digital value.

Here, when the first reference voltage Vref1 is higher than the design value due to manufacturing variations, a negative voltage correction is performed on the first reference voltage Vref1, and when the first reference voltage Vref1 is lower, the first reference voltage Vref1 is corrected. A positive voltage correction is performed on the reference voltage Vref1. For example, as shown in FIG. 4, the value of the first reference voltage Vref1, the conversion data of the A / D converter 3, the correction value, and the trimming data T corresponding to the correction value.
In the case of the relationship with RM1, TRM2, TRM3, and TRM4, a trimming value generating circuit 4 including a logic circuit corresponding to the regularity generates trimming data, and a second reference voltage generating circuit 2 (internal configuration shown in FIG. 3). Is corrected so that the second reference voltage Vref2 output from the second reference voltage Vref2 reaches the design target value (for example, 1.2 V in FIG. 4). The voltage-corrected second reference voltage Vref2 is multiplied by the voltage multiplying circuit 5 to the use voltage Vgen, and output from the terminal 6.

As described above, according to the present embodiment, the voltage can be corrected at the same time when the power is turned on, and a special process such as calculating and storing a trimming value by inspection or cutting a fuse is not required. , Real-time voltage correction becomes possible.

(Embodiment 2) FIG. 5 is a block diagram showing a configuration of an internal voltage generating circuit according to Embodiment 2 of the present invention. In FIG. 5, the same components as those in FIG. 1 are denoted by the same reference numerals.

In FIG. 5, the first reference voltage generating circuit 1 starts operating at the same time as the power is turned on, and the first reference voltage Vr
ef1 is output. The first reference voltage Vref1 is A /
The analog value input to the D converter 3 is converted to a digital value.

Here, when the first reference voltage Vref1 is higher than the design value due to fluctuations in manufacturing or the like, negative voltage correction is performed on the first reference voltage Vref1. Positive voltage correction is performed on the reference voltage Vref1. The voltage correction data is stored in the ROM 11 as a correction table, and trimming data for voltage correction is read from the ROM 11 using the digital conversion value of the A / D converter 3 as an address, and the second reference voltage generation circuit 2 Supplied to

That is, the ROM 11 stores trimming data TRM1, TRM2, TRM3, and TRM4 shown in FIG. 6 according to the digital value converted by the A / D converter 3.
Is set in the second reference voltage generation circuit 2 so that the second reference voltage Vref2 output from the second reference voltage generation circuit 2 becomes a design target value (for example, 1.2 V in FIG. 6). Voltage correction is performed on the second reference voltage generation circuit 2. Second reference voltage Vref2 subjected to voltage correction
Is multiplied by the regulator 13 to the use voltage Vgen and output from the terminal 6.

As described above, according to the present embodiment, even when the correction of the generated voltage is extremely complicated, or when the correction is not performed by the logic circuit because it does not have a certain rule, the correct correction value can be obtained. Can be generated.

(Embodiment 3) FIG. 7 is a block diagram showing a configuration of an internal voltage generating circuit according to Embodiment 3 of the present invention. In FIG. 7, the same components as those in FIGS. 1 and 5 are denoted by the same reference numerals. FIG. 8 is a timing chart for performing trimming.

Simultaneously with the trimming data selection mode according to the timing example of FIG. 8, the reference voltage generation circuit 2 of FIG. 7 starts operating and outputs the reference voltage Vref. Vr
ef is input to the A / D converter 3 and its analog value is converted to a digital value.

Here, when the reference voltage Vref is higher than the design value due to variations in manufacturing or the like, a negative voltage correction is performed on the reference voltage Vref, and when the reference voltage Vref is low, a positive voltage correction is performed on the reference voltage Vref. Perform voltage correction. The voltage correction data is stored in the ROM 11 as a correction table. Trimming data for voltage correction is read from the ROM 11 using the digital conversion value of the A / D converter 3 as an address, and is temporarily stored in the register 13.

During the trimming data selection mode, the logic "H" is set so that the output of the register 13 becomes the correction value "0".
Data “0” (ground potential VS) is supplied to reference voltage generating circuit 2 by N-channel transistor 15 whose gate receives clock NCLK from terminal 14 at the level.
S) is set so that the pre-correction data of the reference voltage Vref does not change.

When the trimming data selection mode ends, the mode shifts to the trimming data setting mode, and the clock NCL
At the fall of K, the trimming data from the register 13 is set to the reference voltage generation circuit 2 via the P-channel transistor 16, and the voltage is corrected. The reference voltage Vref subjected to the voltage correction is applied to a voltage multiplying circuit 5
Is multiplied to the use voltage Vgen, and output from the terminal 6.

As described above, according to the present embodiment, it is possible to perform correction on the reference voltage Vref actually used, which is generated by one reference voltage generation unit 2, so that the actual use state can be improved. A close correction is possible. Furthermore, by performing the trimming mode at regular intervals, it is possible to cope with environmental changes.

(Embodiment 4) FIG. 9 is a block diagram showing a configuration of an internal voltage generating circuit according to Embodiment 4 of the present invention. In FIG. 9, the same components as those in FIG. 7 are denoted by the same reference numerals, and description thereof will be omitted.

In the fourth embodiment, in addition to the configuration of the third embodiment, the fluctuation of the power supply voltage is detected by the voltage detection circuit 22, and the fluctuation of the ambient temperature is detected by the temperature detection circuit 23. This is to perform voltage correction on Vref. Hereinafter, only this additional configuration will be described.

In FIG. 9, the ROM 21 stores correction data corresponding to the power supply voltage and the ambient temperature as a plurality of correction tables. The fluctuation of the power supply voltage is detected by the voltage detection circuit 22, and the fluctuation of the ambient temperature is detected. The temperature is detected by the temperature detection circuit 23, and correction data is selectively output from one of the plurality of correction tables from the ROM 21 according to the detection result.

As described above, according to the present embodiment, RO
From M21, for example, by selecting a table for a high power supply voltage, a table for a low power supply voltage, or a table for high temperature or low temperature,
The accuracy of the correction can be further improved.

(Fifth Embodiment) FIG. 10 is a block diagram showing a configuration of an internal voltage generating circuit according to a fifth embodiment of the present invention. In FIG. 10, the same components as those in FIG. 9 are denoted by the same reference numerals, and description thereof will be omitted.

The structure of the fifth embodiment is different from that of the fourth embodiment in that the reference voltage Vref generated by the reference voltage generating circuit 2 is multiplied by a voltage multiplying circuit 5 (voltage multiplying circuit), and then A This is in that it is converted into a digital value by the / D converter 3 and supplied to the ROM 21 as an address.

As described above, according to the present embodiment, after the voltage generated by the reference voltage generating circuit 2 is multiplied by the voltage multiplying circuit 5 to the high voltage Vgen actually used,
By converting to a digital value by the A / D converter 3, the voltage to be converted is increased, the conversion accuracy can be increased, and the correction accuracy can be further improved.

(Embodiment 6) FIG. 11 is a block diagram showing a configuration of a nonvolatile memory device according to Embodiment 6 of the present invention. In FIG. 11, the same components as those in FIG. 10 are denoted by the same reference numerals, and description thereof will be omitted.

The sixth embodiment includes an internal voltage generating circuit according to the fifth embodiment in a nonvolatile memory device.

In FIG. 11, reference numeral 44 denotes a flash memory, which comprises a first memory cell array 441 and a second memory cell array 442. The data for redundancy rescue is stored in the second memory cell array 442, and during the data read mode for redundancy, the data for redundancy rescue is stored in the second memory cell array 442.
Is read from the memory cell array 442. At the time of reading data from the second memory array 442, the voltage correction in the internal voltage generation circuit has been completed, and the internal voltage applied to the memory cell does not become too high or too low.

As described above, according to the present embodiment, in addition to the advantages of the fifth embodiment, since the voltage can be corrected immediately after the power is turned on, the data stored in, for example, the flash memory is read and the redundancy relief is performed. In this case, even when information is read after the power is turned on, it is possible to generate an internal voltage required for reading the flash memory.

(Embodiment 7) FIG. 12 is a block diagram showing a configuration of a semiconductor integrated circuit device according to Embodiment 7 of the present invention. In FIG. 12, the same components as those in FIG. 11 are denoted by the same reference numerals, and description thereof will be omitted.

In the seventh embodiment, in addition to the internal voltage generating circuit and the flash memory 44 according to the fifth embodiment,
The PU 51, its peripheral circuit 52, and switches 53 and 54 are included in the semiconductor integrated circuit device.

In FIG. 12, the A / D converter 3
The one built in the system LSI with the flash memory is shared for generating an internal voltage and for obtaining an analog signal from the external terminal 55. Therefore, the voltage multiplier 5
The voltage multiplied by is conducted to the A / D converter 3 /
A switch 53 for shutting off and a switch 54 for turning on / off an analog signal from the external terminal 55 to the A / D converter 3 are provided.

As described above, according to the present embodiment, in addition to the advantages of the sixth embodiment, the A built in the system LSI for generating an internal voltage and for obtaining an external analog signal is provided.
By sharing the / D converter 3, the chip area can be reduced.

[0055]

As described above, according to the present invention,
It is not necessary to perform trimming adjustment in the inspection process, and it is possible to realize a more accurate internal voltage generation circuit that constantly generates a correction voltage according to use conditions, a nonvolatile memory device incorporating the same, and a semiconductor integrated circuit device. become.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an internal voltage generation circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing an internal configuration of a first reference voltage generation circuit 1.

FIG. 3 is a circuit diagram showing an internal configuration of a second reference voltage generation circuit 2 (reference voltage generation circuit 2).

FIG. 4 is a diagram showing the contents of trimming data generated by a trimming value generating circuit 4 of FIG. 1;

FIG. 5 is a block diagram showing a configuration of an internal voltage generation circuit according to a second embodiment of the present invention.

FIG. 6 is a view showing the contents of trimming data stored in a ROM 11 of FIG. 5;

FIG. 7 is a block diagram showing a configuration of an internal voltage generation circuit according to a third embodiment of the present invention.

FIG. 8 is a timing chart for performing trimming.

FIG. 9 is a block diagram showing a configuration of an internal voltage generation circuit according to a fourth embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of an internal voltage generation circuit according to a fifth embodiment of the present invention.

FIG. 11 is a block diagram showing a configuration of a nonvolatile memory device according to a sixth embodiment of the present invention.

FIG. 12 is a block diagram showing a configuration of a semiconductor integrated circuit device according to a seventh embodiment of the present invention.

FIG. 13 is a block diagram showing a configuration of a conventional internal voltage generation circuit.

FIG. 14 is a block diagram showing a configuration of a semiconductor integrated circuit device including a conventional internal voltage generation circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st reference voltage generation circuit 2 2nd reference voltage generation circuit (reference voltage generation circuit) 3 A / D converter 4 trimming value generation circuit 5 voltage multiplication circuit (voltage multiplication circuit) 11, 21 ROM 13 register 22 voltage detection Circuit 23 Temperature detection circuit 44 Flash memory 441 First memory cell array 442 Second memory cell array 51 CPU 52 Peripheral circuits 53, 54 Switch

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 27/04 U

Claims (7)

[Claims] A first reference voltage generator for generating a first reference voltage; and an analog / digital converter for converting an analog value of the first reference voltage generated by the first reference voltage generator into a digital value. A digital converter, a trimming value generator for generating a trimming value corresponding to a difference between the digital value converted by the analog / digital converter and a target voltage value, and receiving a trimming value from the trimming value generator. ,
An internal voltage generation circuit, comprising: a second reference voltage generation unit that generates a second reference voltage. 2. A first reference voltage generator for generating a first reference voltage, and an analog / digital converter for converting an analog value of the first reference voltage generated by the first reference voltage generator into a digital value. A digital conversion unit, a storage unit that stores correction data for a target voltage value using the digital value converted by the analog / digital conversion unit as an address, and a correction unit that receives correction data from the storage unit and receives a second reference voltage. And a second reference voltage generating unit for generating the internal reference voltage. 3. A reference voltage generator, an analog / digital converter for converting an analog value of a reference voltage generated by the reference voltage generator into a digital value, and a digital value converted by the analog / digital converter. With the address as an address, a storage unit storing correction data for the target voltage value, and temporarily storing the correction data read from the storage unit,
An internal voltage generating circuit, comprising: a register for setting the correction data for the reference voltage generating unit. 4. A reference voltage generator, an analog / digital converter for converting an analog value of a reference voltage generated by the reference voltage generator into a digital value, and a digital value converted by the analog / digital converter With the address as an address, a storage unit storing correction data for the target voltage value, and temporarily storing the correction data read from the storage unit,
A register for setting the correction data for the reference voltage generator; a temperature detector for detecting a temperature in a circuit; and a power supply voltage detector for detecting a power supply voltage, wherein the correction data is the temperature detection. An internal voltage generation circuit that is selectively output from the storage unit in accordance with a temperature signal from the unit and a power supply voltage signal from the power supply voltage detection unit. 5. A reference voltage generator, a voltage multiplier for multiplying a reference voltage generated by the reference voltage generator, and an analog for converting an analog value of the reference voltage multiplied by the voltage multiplier to a digital value. A digital-to-digital conversion unit, a storage unit that stores correction data for a target voltage value using the digital value converted by the analog / digital conversion unit as an address, and temporarily stores the correction data read from the storage unit.
A register for setting the correction data for the reference voltage generator; a temperature detector for detecting a temperature in a circuit; and a power supply voltage detector for detecting a power supply voltage, wherein the correction data is the temperature detection. An internal voltage generation circuit that is selectively output from the storage unit in accordance with a temperature signal from the unit and a power supply voltage signal from the power supply voltage detection unit. 6. A memory cell array having a plurality of bit lines, a gate selection circuit connected to a drain node of the memory cell via the bit line, and a gate selection circuit connected to the gate selection circuit for amplifying a potential of the bit line. A sense amplifier, a write circuit connected to the gate select circuit for writing data to the memory cell, a word line select circuit connected to the gate of the memory cell, and a write line connected to the word line select circuit An internal voltage generation circuit that generates a voltage supplied to a word line, wherein the internal voltage generation circuit multiplies a reference voltage generated by the reference voltage generation unit, and the word line. A voltage multiplying unit for generating a voltage for the reference voltage; and an analog / digital converter for converting an analog value of the reference voltage multiplied by the voltage multiplying unit into a digital value. A digital conversion unit, a storage unit storing correction data for a target voltage value with the digital value converted by the analog / digital conversion unit as an address, and temporarily storing the correction data read from the storage unit.
A register for setting the correction data with respect to the reference voltage generator, a temperature detector for detecting a temperature in a circuit, and a power supply voltage detector for detecting a power supply voltage, wherein the correction data is the temperature detection A nonvolatile memory device that is selectively output from the storage unit in accordance with a temperature signal from the storage unit and a power supply voltage signal from the power supply voltage detection unit. 7. A CPU, a peripheral circuit unit of the CPU, a non-volatile memory, a memory cell array having a plurality of bit lines, and a gate selection unit connected to a drain node of the memory cell via the bit lines A sense amplifier connected to the gate selection unit for amplifying the potential of the bit line; a write circuit connected to the gate selection unit for writing data to the memory cell; a gate of the memory cell A non-volatile memory including a word line selection circuit connected to the non-volatile memory; and an internal voltage generation circuit connected to the word line selection circuit of the non-volatile memory and generating a voltage supplied to a word line; A generation circuit configured to generate a voltage for the word line by multiplying a reference voltage generated by the reference voltage generation unit; A doubler; an analog / digital converter for converting an analog value of the reference voltage multiplied by the voltage multiplier to a digital value; and a digital value converted by the analog / digital converter as an address for a target voltage value. A storage unit storing the correction data, and temporarily storing the correction data read from the storage unit,
A register for setting the correction data for the reference voltage generator; a temperature detector for detecting a temperature in a circuit; and a power supply voltage detector for detecting a power supply voltage, wherein the correction data is the temperature detection. A semiconductor integrated circuit device that is selectively output from the storage unit in accordance with a temperature signal from the unit and a power supply voltage signal from the power supply voltage detection unit.