JPH09260579A - Terminal structure of flexible wiring board and ic chip mounting structure using the structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a terminal structure which is for a flexible wiring board and hardly deformed by heat or stress induced when an IC chip is mounted on the flexible wiring board and a mounting structure enhanced in reliability by the use of the above terminal structure. SOLUTION: An inner lead connection part 6 which serves as a mounting region where a driver IC chip is mounted is provided to a two-layered flexible wiring board 1 by the use of an anisotropic conductive film, inner leads are extended into the lead connection part 6, dummy terminals 11 which are not connected to signal lines are provided to a part of the connection part 6 where inner leads are arranged sparse in wiring pitch so as to make the inner leads uniform in wiring pitch at the connection part 6, whereby the wiring pitch of the inner leads is set at the same reference value on both an input signal side and an output signal side. By this setup, a non-wiring region which makes a flexible wiring board uneven in thermal expansion coefficient and stress generation can be eliminated, so that a mounted product which is hardly deformed and high in reliability can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flexible wiring board terminal structure suitable for mounting on a display panel using liquid crystal, plasma or the like, and an IC (Integrated Circuit) using the same.
Circuit) The present invention relates to a chip mounting structure, and more particularly to a terminal structure of a flexible wiring board on which an IC chip is mounted using an anisotropic conductive film and an IC chip mounting structure using the terminal structure.

[0002]

2. Description of the Related Art Conventionally, a driver IC chip used for a liquid crystal panel or the like is mounted on a flexible wiring board (Flexible Pr
Intended Circuits; hereinafter, abbreviated as FPC), a technical method such as inner lead bonding or flip chip bonding is adopted.

First, the structure of the FPC 50 used for inner lead bonding will be described. As shown in FIG. 3A, a device hole 52 is formed in the center of a base material 51 made of polyimide (PI). . The formation range of the device hole 52 is the driver IC chip 53.
It becomes the chip mounting area for mounting.

Further, strip-shaped copper terminals 55 are arranged on the base material 51 in which the device holes 52 are formed, with an adhesive layer 54 containing epoxy (EP) resin as a main component interposed therebetween. At this time, the tip portion of the copper terminal 55 (hereinafter referred to as the inner lead 55a) extends inward of the device hole 52 in preparation for connection with the driver IC chip 53, and the inner lead 55a has a tin (Sn) plating is applied. Further, the peripheral portion of the device hole 52 is covered with a resist 56 in order to protect the copper terminal 55 from deterioration due to oxidation or electrochemical reaction.

As described above, the FPC 50 used for the inner lead bonding is composed of three layers in which the base material 51, the adhesive layer 54, and the copper terminals 55 are laminated.

Next, when the driver IC chip 53 is mounted on the FPC 50, the bump 57 formed of gold (Au) on the electrode of the driver IC chip 53 and the inner lead 55a are thermocompression bonded. , A at the interface
Since the u-Sn alloy is generated, the FPC 50 and the driver IC chip 53 are connected. After connecting,
The strength is obtained by sealing the periphery of the driver IC chip 53 and the device hole 52 with a resin 58.

On the other hand, in recent years, without using an adhesive such as a three-layer FPC, an IC chip is connected by a flip-chip bonding method to a two-layer FPC in which copper terminals are formed on a base material by plating or etching. The method of doing so has been studied and is about to enter the practical stage.

In order to explain the flip chip bonding method in detail, the structure of the two-layer FPC 60 will be described. As shown in FIG. 3B, polyimide or polyethylene terephthalate (PET), which is cheaper than polyimide, is used.
Alternatively, a chip mounting area 63 for mounting the driver IC chip 62 is set in the central portion of the base material 61 made of a polyester resin such as polyethylene naphthylate (PEN), and the tip is inward of the chip mounting area 63. The copper terminal 64 is formed so that the (inner lead) extends.

The peripheral portion of the chip mounting region 63 is covered with a resist 65 similar to the resist 56.

Next, when the driver IC chip 62 is mounted on the two-layer FPC 60, an anisotropic conductive film (AC) is formed on the chip mounting region 63.
F) 66 is attached and the driver IC chip 6 is put on this
2 is arranged, and the driver IC chip 62 is subjected to thermocompression bonding treatment. The anisotropic conductive film 66 is formed, for example, by dispersing conductive particles 66a in epoxy resin, and is electrically conductive between the bump 67 formed on the electrode of the driver IC chip 62 and the copper terminal 64 by the pressure of thermocompression bonding. The particles 66a are crushed, the bumps 67 and the copper terminals 64 are electrically connected, and the epoxy resin of the anisotropic conductive film 66 is cured by the heat of thermocompression bonding, so that the bumps 67 and the copper terminals 64 are electrically connected. It is fixed while maintaining the physical connection state.

In the case of this method, the epoxy resin of the anisotropic conductive film 66 substitutes for the resin 58 of FIG. 3 (a), so that a separate resin sealing step is not required.

Next, the terminal arrangement of the copper terminals 64 included in the two-layer FPC 60 will be described with reference to the plan view of FIG.

A plurality of input terminals 64a as copper terminals 64 are arranged on one long side of the rectangular two-layer FPC 60, and output terminals 6 as copper terminals 64 are arranged on the other long side.
A plurality of 4b are arranged. Further, the resist 65 is arranged in a square O shape around the center of the two-layer FPC 60, and the chip mounting region 63 is set inside the inner peripheral edge portion 65a.

Further, the wirings of the terminals 64a and 64b are laid out by using the blank space of the two-layer FPC 60 so that the tip portions of the input terminal 64a and the output terminal 64b reach the inside of the chip mounting area 63. Has been done.

Further, the input terminals 64a have a width wider than the output terminals 64b in the vicinity of the long side on the input side and are arranged at equal pitches, but the output terminals 64a approach the chip mounting area 63. It is narrowed to the same width as 64b, and is arranged in the chip mounting region 63 at unequal intervals, that is, in a state in which sparseness and denseness occur so as to match the formation position of the bump 67 of the driver IC chip 62.

On the other hand, the output terminal 64b has the same width,
Alternatively, the bumps 67 are narrowed to the formation pitch of the driver IC chip 62 so as to reach the four sides of the rectangular chip mounting region 63, and the bumps 67 of the driver IC chip 62 are formed at equal intervals according to the formation positions of the bumps 67. Wiring is routed, but chip mounting area 6
In the four corners of No. 3, there is a blank area 68 with no wiring.

Therefore, it can be said that the copper terminals 64 are generally unevenly distributed on the base material 61 around the chip mounting region 63.

The FPC 50 and the two-layer FPC 60 described above are used.
Is called a TCP (Tape Carrier Package) method for forming one frame at a time like a movie film or a photographic film, which is the mainstream in the mass production technology for mounting.

Japanese Unexamined Patent Publication No. 6-53275 discloses a TCP.
In the method, it is disclosed that dummy wirings are arranged near the corners of the driver IC chip for the purpose of relaxing mechanical stress concentrated around the driver IC chip during inner lead bonding.

[0020]

However, in the conventional terminal structure shown in FIG. 4, in the case of flip chip bonding in which the anisotropic conductive film 66 is attached to the chip mounting region 63 and the driver IC chip 62 is thermocompression bonded. Since the copper terminals 64 having a different coefficient of thermal expansion from the base material 61 are unevenly distributed,
By the heat to get the connection temperature of ℃ ~ 200 ℃, TC
There is a problem that deformation such as warpage and undulation occurs in P. In particular, when the material of the base material 61 is easily affected by heat as in the case of PET or PEN described above, thermal deformation becomes remarkable.

In this case, since the two-layer FPC 60 having the driver IC chip 62 mounted thereon is deformed, it becomes difficult to align the two-layer FPC 60 with the liquid crystal panel when connecting to the liquid crystal panel or the like. Furthermore, since the stress remains in the two-layer FPC 60 even after the assembly is completed, the copper terminal 6
4 causes a disconnection problem and a problem that the high reliability required for low resistance connection between the driver IC chip 62 and the input terminal 64a is deteriorated.

Further, in the layout of the dummy wiring disclosed in Japanese Patent Laid-Open No. 6-53275, the two-layer FPC 60 for liquid crystal is used.
As described above, when the number of wires of the input terminal 64a and the number of wires of the output terminal 64b are extremely different from each other and the wires are sparse and dense, T
The deformation prevention effect of CP is insufficient. Therefore, in particular, when a heat-sensitive substrate such as PET or PEN is used, the problem of wrinkles or disconnection during thermocompression bonding cannot be avoided.

The present invention has been made to solve the above problems, and an object thereof is to mount an IC chip on an FPC by flip chip bonding.
It is to provide a terminal structure of a flexible wiring board in which a base material of a PC is less likely to be deformed by heat or stress, and to provide a mounting structure having improved reliability by using the terminal structure.

[0024]

In order to solve the above-mentioned problems, a terminal structure of a flexible wiring board according to a first aspect of the present invention mounts an IC chip on the flexible wiring board by using an anisotropic conductive film. Mounting area (for example, inner lead connection part), and dummy terminals that are not connected to the signal line are provided in the sparse wiring pitch portion so as to eliminate the sparse or dense wiring pitch of the inner leads extending into this mounting area. The wiring pitch is set to the same reference value on the input signal side and the output signal side.

According to the above construction, when mounting an IC chip on a flexible wiring board, an anisotropic conductive film is provided in the mounting area, and the IC chip is pressure-bonded to the anisotropic conductive film, followed by heat treatment or ultraviolet rays. Light irradiation processing is performed. At this time, the unevenness of the wiring pitch of the inner leads extending into the mounting area is eliminated by the dummy terminals on each of the input signal side and the output signal side, so that the variation in the thermal conductivity of the flexible wiring board is suppressed on the input signal side. And the output signal side can be made smaller.

As a result, when the anisotropic conductive film is heat-treated, it is possible to suppress deformation such as warpage or waviness of the flexible wiring board due to variations in thermal conductivity. In addition, it is possible to use, as the base material of the flexible wiring board, an inexpensive material such as PET or PEN that is easily affected by heat.

Further, since the stress generated by the shrinkage of the thermosetting resin or the ultraviolet curable resin contained in the anisotropic conductive film by the heat treatment or the ultraviolet irradiation treatment is not uneven in the wiring pitch of the inner leads, the flexible wiring board It will be evenly applied to the input signal side and the output signal side, respectively. As a result, it is possible to suppress deformation such as warpage or undulation of the flexible wiring board due to curing of the anisotropic conductive film.

An IC for the flexible wiring board
Even when mass-producing chips by TCP method, TCP
There is no deformation such as warpage or undulation.

As described above, as a result of suppressing the deformation of the flexible wiring board, the residual stress of the deformation does not affect the connecting portion between the inner lead and the bump of the IC chip or the wiring, so that a trouble such as a connection failure or a disconnection may occur. It is possible to provide a highly reliable mounted product in which generation is suppressed.

When a flexible wiring board on which an IC chip is mounted is mounted on a display panel using liquid crystal, plasma, etc., since the flexible wiring board is not deformed, the mounting alignment becomes accurate and the display panel yield rate is good. And a highly reliable display panel can be provided.

In order to solve the above-mentioned problems, the terminal structure of the flexible wiring board according to the invention of claim 2 is the wiring of the input signal line or the output signal line whose tip is the inner lead according to claim 1. It is characterized in that a dummy terminal is provided according to the shape of the non-wiring region so as to fill the non-wiring region generated by the routing.

In the above-mentioned structure, the wiring pitch of the inner leads according to claim 1 is determined by adjusting the wiring of the inner leads to the bump forming positions of the IC chip to be mounted, and the input / output signals on the flexible wiring board. This occurs due to both the wiring of the wires. In a region where the wiring pitch is sparse, a non-wiring region where wiring does not exist naturally occurs.

Therefore, the non-wiring area is filled, and
As described in, the dummy terminals are provided according to the shape of the non-wiring area so as to eliminate the unevenness of the wiring pitch of the inner leads, that is, the number, length, end shape, etc. of the dummy terminals according to the shape of the non-wiring area. By setting, the non-wiring region that makes the thermal expansion coefficient and the stress generation non-uniform is eliminated from the periphery of the mounting region, so that the effect obtained from the configuration of claim 1 can be further improved.

In order to solve the above-mentioned problems, the terminal structure of the flexible wiring board according to the invention of claim 3 has all the structures introduced into the above-mentioned mounting area in addition to the structure of claim 1 or 2. Align the inner lead width to the same standard value,
Further, by providing the dummy terminals, the wiring pitch of the inner leads is made uniform to the same reference value on the input signal side and the output signal side.

According to the above structure, the widths of all the inner leads are set to the same reference value, and the wiring pitches of the inner leads are set to the same reference value for the entire mounting area. As described above, the coefficient of thermal expansion and the stress generation during curing of the anisotropic conductive film are made more uniform than when the wiring pitch of the inner leads is made equal on the input signal side and the output signal side respectively. . Therefore, claim 1
Alternatively, the effect obtained from the configuration of 2 can be further improved.

In order to solve the above problems, in the terminal structure of the flexible wiring board according to the invention of claim 4, in addition to the structure of claim 1, 2 or 3, one input signal line is not connected It is characterized in that it is branched into a plurality of lines using the wiring region and led into the mounting region to increase the connection area with the bumps formed on the IC chip.

According to the above structure, the IC chip may include an electrode for which low resistance connection is particularly required. In such a case, if the input signal line corresponding to the electrode is branched into a plurality of lines, a plurality of inner leads and ICs can be formed.
Since the bumps of the chip can be connected, the connection area can be increased and the connection resistance of one input signal line can be reduced.

Further, as a result of one input signal line being connected at a plurality of points, high connection reliability can be maintained even if the connection state between the inner leads and the bumps is somewhat deteriorated due to environmental conditions.

Furthermore, the input signal line branched into a plurality of lines using the non-wiring region has the same function as the dummy terminal for equalizing the coefficient of thermal expansion and the stress generation during curing of the anisotropic conductive film. Therefore, in addition to the effect of the configuration according to claim 1, 2 or 3, the connection resistance of one input signal line is reduced, the S / N of the signal is improved, and high connection reliability is achieved. Can be maintained.

According to a fifth aspect of the present invention, there is provided an IC chip mounting structure for solving the above problems.
The inner lead according to any one of 1 to 3 above and the bump formed on the IC chip are connected to each other, and the IC chip is mounted in the mounting region.

Therefore, as described above, it is possible to provide the IC chip mounting structure which is highly reliable and has an effect of improving the non-defective rate of the display panel using liquid crystal or plasma.

In order to solve the above problems, in the IC chip mounting structure according to the invention of claim 6, in the IC chip according to claim 5, a dummy bump not connected to a signal line corresponds to the dummy terminal. It is characterized in that the dummy terminals and the dummy bumps are connected to each other.

By connecting the dummy terminals of the flexible wiring board and the dummy bumps of the IC chip with the above structure, especially when the IC chip is thermocompression bonded by using the anisotropic conductive film in the mounting area of the flexible wiring board. To the IC
Since the heat applied to the chip is transferred from the dummy bumps to the dummy terminals and further to the base material of the flexible wiring board, heat conduction in the flexible wiring board is performed more uniformly than in the case where the dummy bumps are not provided on the IC chip. . This effect is improved as the widths and wiring pitches of the inner leads and the dummy terminals are made uniform in the mounting region, and the connection areas between the dummy terminals and the dummy bumps are made uniform in the mounting region.

Therefore, the effect obtained by the configuration according to any one of claims 1 to 5 can be further improved.

[0045]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

As shown in FIG. 2, a two-layer FPC 1 as a flexible wiring board is composed of a base material 2 and a copper terminal 3 formed on the base material 2 by a plating or etching method. A large number of two-layer FPCs 1 are continuously formed in a column by the TCP system for mass production. The base material 2 is made of polyimide or a polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthylate (PEN), which is cheaper than polyimide.

The terminal arrangement of the copper terminals 3 will be described with reference to the plan view of FIG. The rectangular two-layer FPC 1 is roughly divided into four functional areas. The “first functional area” is the input connection portion 4 set on one long side of the rectangle.
And the input terminals 4a are arranged at equal intervals. The “second functional area” is the output connection portion 5 set on the other long side of the rectangle, and the output terminals 5a having a width narrower than that of the input terminals 4a are arranged at equal intervals with a wiring pitch narrower than that of the input terminals 4a. It is arranged. The input terminal 4a and the output terminal 5a
Constitute the copper terminal 3.

As described above, the width of the input terminal 4a in the input connection portion 4 is set wider than that of the output terminal 5a, so that the resistance to the input signal can be kept as low as possible.
This is for ensuring S / N and is suitable for use in liquid crystal display panels and plasma display panels.

The "third functional area" is the inner lead connecting portion 6 set at the center of the two-layer FPC 1 as shown by the chain line in FIG. 1, and is used for driving the liquid crystal shown in FIG. The driver IC chip 7 is mounted. The inner lead connecting portion 6 corresponds to the mounting area described in the claims. Finally, the “fourth functional area” is the routing wiring portion 8 set between the input connecting portion 4 and the output connecting portion 5 and around the inner lead connecting portion 6, and is doubled in FIG. As shown by the chain double-dashed line, it is covered with the resist 9.
The resist 9 is provided to protect the copper terminal 3 from deterioration due to oxidation or electrochemical reaction.

Further, the respective tip portions called inner leads of the input terminal 4a and the output terminal 5a reach the inside of the inner lead connecting portion 6 in accordance with the formation positions of the bumps 10 (see FIG. 2) of the driver IC chip 7. In addition, the wiring of each of the terminals 4a and 5a is routed using the routing wiring section 8.

More specifically, the input terminal 4a is narrowed to almost the same width as the output terminal 5a while approaching the inner lead connecting portion 6 from the input connecting portion 4, and all the inner leads thereof have a rectangular shape. Input connection part 4 of inner lead connection part 6
It is wired so as to be guided to the central part of the long side on the side. However, the inner lead of the input terminal 4a is the driver IC.
Corresponding to the fact that the arrangement of the bumps 10 of the chip 7 is unequally spaced due to restrictions in IC fabrication,
That is, the wirings are arranged in a state of being dense and dense.

On the other hand, the output terminals 5a are wired at equal intervals so that most of the inner leads thereof are linearly guided to the long side of the inner lead connecting portion 6 on the output connecting portion 5 side. However, a part of the output terminal 5a is bent around the long side where the inner lead of the input terminal 4a is arranged, and is bent so as to be guided to the vicinity of both ends of the inner lead of the input terminal 4a. It is bent and wired so as to be guided to both short sides of the inner lead connecting portion 6.

In this way, the input terminal 4a and the output terminal 5a reach the inside of the inner lead connecting portion 6 in accordance with the formation position of the bump 10 of the driver IC chip 7.
As a result of wiring, a non-wiring region, which has been left as a blank region in the past, is formed in a portion where the inner leads of the input terminal 4a are sparsely arranged and in the vicinity of the four corners of the inner lead connecting portion 6.

Therefore, in the present invention, the dummy terminals 11 which are not connected to either the input terminal 4a or the output terminal 5a and are in a floating state (crossed to FIGS. (Indicated by hatching). These dummy terminals 11 are provided at the same pitch as the wiring interval (wiring pitch) between the adjacent input terminals 4a and output terminals 5a at least in the inner lead connecting portion 6 in each non-wiring region. Further, from the viewpoint of making the coefficient of thermal expansion of the base material 2 uniform in the thermocompression bonding process of flip chip bonding, in each non-wiring region, the number, length and end shape of the dummy are matched with the shape of the non-wiring region. It is desirable to provide the terminal 11.

Further, in a part of the non-wiring region, which is excluded from the above description, in the case where the input terminal 4a connected to the bump 10 which has a particularly high demand for low resistance connection is arranged,
The input terminal 4a is branched into a plurality of wires having the same width as the inner leads of the other input terminals 4a and the dummy terminal 11 by utilizing the non-wiring region in the middle of the wiring as shown by the branch input terminal 4b in FIG. And is guided to the inner lead connecting portion 6.

The fact that the wiring pitch and the width of the terminals are the same means that they are aligned to the same reference value in the manufacturing process of the terminals 4a, 4b, 5a and 11, and in practice, the wiring pitch and the width of the terminals are the same. It goes without saying that a certain error range is involved.

In the above-mentioned structure, the non-wiring area which has been left as it is in the conventional blank area is filled with the dummy terminals 11 provided at the same wiring pitch as the inner leads of the terminals 4a and 5a, and the non-wiring area is not formed. It is filled with a branch input terminal 4b which is branched into a plurality of lines at the same wiring pitch as the inner lead using the wiring region.

Therefore, the two-layer FPC1 according to the present invention
Has a terminal structure as if the wiring is made in the inner periphery and the outer periphery of the inner lead connection portion 6 as a whole without any uneven density.

As a result, as shown in FIG. 2, the anisotropic conductive film 12 is pasted on the inner lead connecting portion 6 by flip chip bonding, the driver IC chip 7 is placed on the anisotropic conductive film 12, and thermocompression bonding is performed. Since the coefficient of thermal expansion around the inner lead connection portion 6 is made uniform when
The base material 2 does not expand nonuniformly. Therefore, the two-layer FPC1 itself or the two-layer FPC1 formed in a column by the TCP method does not undergo deformation such as warpage or undulation. In addition, this makes it possible to use, as the base material 2, a material such as PET or PEN that is susceptible to heat but is inexpensive.

Further, since the two-layer FPC1 is not deformed, the two-layer FPC1 and the driver IC chip 7 can be accurately and easily aligned with each other, and the non-defective rate of the assembled product can be improved. Further, since the two-layer FPC 1 having the driver IC chip 7 mounted thereon is not deformed, it becomes easy to align the assembly of the two-layer FPC 1 with the liquid crystal panel when connecting to the liquid crystal panel or the like. Furthermore, since the deformation stress does not remain in the two-layer FPC1 after assembly,
The problem that the copper terminal 3 is disconnected can be solved, and the high reliability required for low resistance connection between the driver IC chip 7 and the input terminal 4a can be maintained.

Further, since the branch input terminal 4b branched into a plurality of pieces is provided for the bump 10 'which has a particularly high demand for low resistance connection, the connection state between the branch input terminal 4b and the bump 10' is provided depending on environmental conditions. Even if the quality deteriorates to some extent, high connection reliability can be maintained.

In the present embodiment, the case where all of the inner leads of the input terminals 4a and 4b, the inner leads of the output terminal 5a, and the dummy terminal 11 are arranged at equal intervals around the inner lead connecting portion 6 will be described. However, not limited to this, for example, when the width of the inner lead is different between the input terminals 4a and 4b and the output terminal 5a, the input terminals 4a and 4b
The inner leads of b and the dummy terminals 11 are arranged at equal intervals at a first wiring pitch, and the inner leads of the output terminals 5a and the dummy terminals 11 are equally spaced at a second wiring pitch different from the first wiring pitch. It may be placed in.

That is, what is common to all cases is that the pitch of the dummy terminals 11 and the branch input terminals 4b in the non-wiring region is set to be as close as possible to the surrounding wiring pitch. is there. By doing this, rather than leaving the non-wiring area as a blank area,
A high effect of preventing the deformation of the layer FPC1 can be obtained.

Next, how to provide the bumps 10 formed on the electrodes of the driver IC chip 7 will be described with reference to FIG. FIG. 2 shows a cross section taken along the line AA ′ of FIG. The driver IC chip 7 is provided with a plurality of bumps 10 corresponding to the input terminals 4a, and further provided with dummy bumps 13 corresponding to the dummy terminals 11. In addition, the bumps 10 'having a large area are provided on the electrodes of the driver IC chip 7 for which the low resistance connection is particularly required.
Are formed, and the bumps 10 ′ and the branch input terminals 4 b branched into a plurality of lines are arranged so as to face each other.

The anisotropic conductive film 12 is formed by dispersing conductive particles 12a in, for example, an epoxy resin. During flip chip bonding, the pressure of thermocompression bonding causes a bump 10 'between the bump 10 and the input terminal 4a. And the branch input terminal 4b, and between the dummy bump 13 and the dummy terminal 11, the conductive particles 12a are crushed. As a result, the bumps 10 and the input terminals 4a and the bumps 10 'and the branch input terminals 4b are electrically connected, and the dummy bumps 13 and the dummy terminals 11 are connected so that heat can be transferred to each other. Further, the anisotropic conductive film 12 is heated by the heat of thermocompression bonding.
Since the epoxy resin of is hardened, the above connection is fixed and held.

Instead of the anisotropic conductive film 12, an anisotropic conductive film in which conductive particles are dispersed in a photocurable resin which is cured by irradiation with light such as ultraviolet rays may be used.

As described above, it is desirable that the bumps 10 are arranged at equal intervals completely, but as described above, when it is difficult to arrange the bumps at equal intervals due to restrictions in IC fabrication, the bumps 10 correspond to the dummy terminals 11. Since the dummy bumps 13 are provided, the heat conduction becomes uniform in the non-wiring region. Thereby, the coefficient of thermal expansion of the base material 2 can be made more uniform. Further, by connecting the dummy terminals 11 and the dummy bumps 13 to each other, the pressure applied to the base material 2 becomes uniform throughout, so that the connection reliability can be improved.

Further, the bumps 10 and 10 'and the dummy bumps 13 and the terminals 4a, 4b, 5a and 11 have the same connection area and are connected at equal intervals. By providing the dummy bumps 13 and the heat conduction becomes uniform around the inner lead connection portion 6, the coefficient of thermal expansion of the base material 2 is made more uniform,
Deformation can be reliably prevented.

In this embodiment, the case where the wiring pitch in the inner lead connecting portion 6 is set to be the same is shown. However, even if there is a certain difference in the wiring pitch, the non-wiring region is formed as in the conventional case. As compared with the case where the blank area is left as it is, the above-mentioned respective effects are exhibited. However, if the wide wiring pitch is twice or more as large as the narrow wiring pitch, stress due to heat and pressure during bonding is unevenly applied to the two-layer FPC 1, so that distortion occurs. Further, in this case, a portion where the stress is concentrated with respect to a mechanical force applied from the outside is apt to occur, which easily leads to disconnection in the lead wiring portion 8.

[0070]

As described above, the terminal structure of the flexible wiring board according to the invention of claim 1 is provided with the mounting area for mounting the IC chip on the flexible wiring board by using the anisotropic conductive film. In order to eliminate the unevenness of the wiring pitch of the inner leads extending into the area, a dummy terminal that is not connected to the signal line is provided in the portion where the wiring pitch is sparse,
The wiring pitch is the same reference value on the input signal side and the output signal side.

Therefore, since the unevenness of the wiring pitch of the inner leads is eliminated by the dummy terminals on the input signal side and the output signal side, respectively, the variation in the thermal conductivity of the flexible wiring board is changed on the input / output signal side. Can be made smaller. Accordingly, when the anisotropic conductive film is subjected to heat treatment, it is possible to suppress deformation such as warpage or waviness of the flexible wiring board due to variations in thermal conductivity.

Since the stress generated by the shrinkage of the thermosetting resin or the photocurable resin contained in the anisotropic conductive film is evenly applied to the input signal side and the output signal side of the flexible wiring board, it is anisotropic. It is possible to suppress deformation such as warpage or undulation of the flexible wiring board due to hardening of the conductive conductive film.

As a result, (1) no deformation such as warpage or waviness occurs in TCP for mass production, (2) problems such as connection failure or disconnection occur in a mounted product in which an IC chip is mounted on a flexible wiring board. It has various excellent effects that are suppressed, (3) it is possible to improve the non-defective rate of the display panel such as a liquid crystal to which the mounted product is assembled, and (4) it is possible to provide a highly reliable display panel.

As described above, the terminal structure of the flexible wiring board according to the invention of claim 2 is generated by arranging the wiring of the input signal line or the output signal line whose tip is the inner lead according to claim 1. The dummy terminals are provided so as to fill the non-wiring region according to the shape of the non-wiring region.

Therefore, by providing dummy terminals so as to eliminate the unevenness of the wiring pitch of the inner leads in accordance with the shape of the non-wiring area which naturally occurs in the area where the wiring pitch is sparse, thermal expansion from the periphery of the mounting area is achieved. Since the non-wiring region that makes the rate and stress generation non-uniform is eliminated, the effect of the configuration of claim 1 can be further improved.

As described above, the terminal structure of the flexible wiring board according to the invention of claim 3 is, in addition to the structure of claim 1 or 2, the width of all the inner leads introduced into the mounting area. To the same reference value, and by providing the dummy terminals, the wiring pitch of the inner leads is adjusted to the same reference value on the input signal side and the output signal side.

Therefore, by matching the widths of all the inner leads to the same reference value, and further, aligning the wiring pitches of the inner leads to the same reference value for the entire mounting area, the coefficient of thermal expansion and the anisotropy are increased. Since the stress generation during curing of the conductive film is made more uniform, the effect of the structure of claim 1 or 2 can be further improved.

The terminal structure of the flexible wiring board according to the invention of claim 4 is as described above,
In addition to the configuration described in 1 above, one input signal line is branched into a plurality of lines by utilizing the non-wiring region and guided into the mounting region to increase the connection area with the bump formed on the IC chip. It is a composition.

Therefore, when the IC chip includes an electrode for which a low resistance connection is particularly required, if the input signal line corresponding to the electrode is branched into a plurality of lines, the connection with the bump of the IC chip is achieved. The area can be increased and the connection resistance of one input signal line can be reduced. Further, even if the connection state between the inner leads and the bumps is slightly deteriorated due to environmental conditions as a result of one input signal line being connected at a plurality of points,
High connection reliability can be maintained. further,
The input signal line branched into a plurality of lines using the non-wiring region has the same function as the dummy terminal.
In addition to the effect of the configuration described in 2 or 3, it is possible to reduce the connection resistance of one input signal line, improve the signal S / N, and maintain the connection reliability for a long time. Has the effect.

As described above, the mounting structure of the IC chip according to the invention of claim 5 connects the inner lead according to any one of claims 1 to 4 with the bump formed on the IC chip. However, an IC chip is mounted in the mounting area.

Therefore, there is an effect that it is possible to provide a mounting structure of an IC chip which is highly reliable and which can improve the non-defective rate of a display panel using liquid crystal, plasma or the like.

As described above, in the mounting structure of the IC chip according to the invention of claim 6, the IC chip according to claim 5 is provided with the dummy bumps which are not connected to the signal line, corresponding to the dummy terminals. In this configuration, the dummy terminal and the dummy bump are connected to each other.

Therefore, in particular, when the IC chip is thermocompression bonded by using the anisotropic conductive film in the mounting area of the flexible wiring board, the heat applied to the IC chip is transferred from the dummy bumps to the dummy terminals, and the flexibility is further improved. Since it is transmitted to the base material of the wiring board, the heat conduction in the flexible wiring board is performed more uniformly than in the case where the dummy bumps are not provided on the IC chip. This effect is improved as the widths and wiring pitches of the inner leads and the dummy terminals are made uniform in the mounting region, and the connection areas between the dummy terminals and the dummy bumps are made uniform in the mounting region. Therefore, there is an effect that it is possible to further improve the effect of the configuration according to any one of claims 1 to 5.

[Brief description of drawings]

FIG. 1 is an explanatory plan view showing one structural example of a terminal arrangement of a flexible wiring board according to the present invention.

FIG. 2 is a schematic diagram showing a cross section taken along the line AA ′ of FIG.

3A is a cross-sectional view showing a flexible wiring board having a three-layer structure in which an IC chip is mounted by conventional inner lead bonding, and FIG. 3B is an IC chip mounted by conventional flip chip bonding. It is sectional drawing which shows the flexible wiring board of 2 layer structure, and is a XX 'line sectional view taken on the line of FIG.

FIG. 4 is an explanatory view showing a planar configuration example of a terminal arrangement of a conventional flexible wiring board.

[Explanation of symbols]

 1 2 layer FPC (flexible wiring board) 3 copper terminal (input signal line and output signal line) 4a input terminal (input signal line) 4b branch input terminal 5a output terminal (output signal line) 6 inner lead connection part (mounting area) 7 Driver IC Chip 10 Bump 10 'Bump 11 Dummy Terminal 12 Anisotropic Conductive Film 12a Conductive Particle 13 Dummy Bump

Claims (6)

[Claims] 1. A flexible wiring board is provided with a mounting area for mounting an IC chip by using an anisotropic conductive film, and a wiring pitch is arranged so as to eliminate the unevenness of the wiring pitch of the inner leads extending into the mounting area. The terminal structure of the flexible wiring board is characterized in that dummy terminals not connected to the signal line are provided in the sparse part of the wiring, and the wiring pitch is adjusted to the same reference value on the input signal side and the output signal side. 2. A dummy terminal is provided in conformity with the shape of the non-wiring region so as to fill the non-wiring region generated by routing the wiring of the input signal line or the output signal line having the inner lead as the tip. The terminal structure for a flexible wiring board according to claim 1, which is characterized in that. 3. The wiring pitch of the inner leads is set to the input signal side and the output signal side by aligning the widths of all the inner leads guided in the mounting area to the same reference value and further providing the dummy terminals. 3. The terminal structure of the flexible wiring board according to claim 1 or 2, characterized in that the same reference value is set. 4. An input signal line is branched into a plurality of lines by utilizing the non-wiring region and is guided into the mounting region to increase a connection area with a bump formed on an IC chip. The terminal structure of the flexible wiring board according to claim 1, 2, or 3. 5. An IC characterized in that the inner lead according to any one of claims 1 to 4 is connected to a bump formed on an IC chip, and the IC chip is mounted in the mounting area. Chip mounting structure. 6. The IC chip according to claim 5, wherein a dummy bump which is not connected to a signal line is provided corresponding to the dummy terminal, and the dummy terminal and the dummy bump are connected to each other. IC chip mounting structure.