JPH09259743A - Electric field emitting element and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a process for forming a peeling layer in a cone material and a process for peeling the peeling layer in the case of forming an emitter. SOLUTION: After a cathode electrode 2 and an insulating layer 4 are formed on a substrate 1 and an opening portion 7 is formed in the insulating layer 4 by etching, a deposition layer 10 forming a gate electrode 2 and an emitter is deposited on the insulating layer 4 so that a cone-like emitter 11 is formed in the opening portion 7. By etching the deposition layer 10 to have a predetermined film thickness, the gate electrode is formed on the insulating layer 4 so as to manufacture an electric field emitting element. Further, a step is formed on the inner wall of the opening portion 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission device and a method for manufacturing the same.

[0002]

2. Description of the Related Art An electric field applied to a metal or semiconductor surface is 10
^At about ⁹ [V / m], electrons pass through the barrier due to the tunnel effect, and the electrons are emitted in vacuum even at room temperature. This is called field emission, and a cathode that emits electrons based on this principle is called a field emission cathode (hereinafter referred to as FEC).
Is called).

In recent years, it has become possible to fabricate a surface emission type field emission cathode consisting of a micron size field emission cathode by making full use of semiconductor processing technology. A large number of field emission cathodes are formed on a substrate. The thing is expected as an element which comprises a flat display device and various electronic devices by irradiating the fluorescent surface with the electron emitted from each emitter.

As one of methods for manufacturing such a field emission device, there is a rotary oblique vapor deposition method developed by Spindt (US Pat. No. 3,789,471). SPINDT
The manufacturing process of FEC by the method is shown in FIG. First, FIG.
As shown in (a), on a substrate 101 such as glass,
A cathode 102 formed of a metal layer, a resistance layer 103 formed of amorphous silicon, an insulating layer (SiO ₂ layer) 104 formed by thermally oxidizing silicon, and a gate 105 formed of a metal layer such as niobium are sequentially formed by vapor deposition or the like. To do. Further, after applying a photoresist (not shown) on the gate 105, patterning is performed as shown in FIG. After this patterning is performed, etching is performed to form the gate 105 and the insulating layer 1 as shown in FIG.
The opening 107 is formed at 04.

Next, the photoresist is removed, and the peeling layer 109 is vapor-deposited by rotating and vapor-depositing aluminum on the substrate surface while rotating the substrate 101 as shown in FIG. . Then, the peeling layer 109 is not vapor-deposited in the opening 107 and the gate 10 is removed.
5 will be selectively deposited only on the surface. Further, when molybdenum is deposited on the peeling layer 109, the deposition layer 110 is formed on the peeling layer 109, and the emitter 111 is formed in the opening 107 opened by etching as shown in FIG. Deposit in the shape of a cone. After that, the peeling layer 109 and the deposited layer 110 on the gate 105 are removed by etching to obtain an FEC having a structure as shown in FIG.

When the FEC shown in FIG. 5 (f) is manufactured by using the semiconductor integration technology, the distance between the cone-shaped emitter 111 and the gate 105 can be made submicron, so that the emitter 111 and the gate 105 are separated from each other. Electrons can be emitted from the emitter 111 by applying a voltage of several tens of volts. The substrate 10
When a large number of FECs having the structure as shown in FIG. 5 (f) are integrated on the first substrate, the pitch between the emitters 111 can be made to be 5 microns to 10 microns, and therefore tens of thousands to tens of tens. Ten thousand FECs can be provided on one substrate. As described above, it is possible to manufacture a surface emission type FEC, and it has been proposed to apply this FEC element to a fluorescent display device, a CRT, an electron microscope and an electron beam device.

FIG. 6 shows a perspective view of such a surface emission type FEC element. In this figure, a cathode 102 is formed on a substrate 101, and a resistance layer 103 is formed on the cathode 102. A cone-shaped emitter 111 is formed on the resistance layer 103. Further, a gate 105 is provided on the cathode 102 via an insulating layer 104, and a tip end portion of a cone-shaped emitter 111 faces a round opening 107 provided in the gate 105.

In the surface emission type FEC formed as described above, when a driving voltage VGE of several tens of volts is applied between the gate 105 and the cathode 102, electrons are emitted from the emitter 111 and emitted from the emitter 111. The electrons are spaced apart on the gate 105 and are collected by the anode 112 to which the anode voltage VA is applied. In this case, if a fluorescent substance is provided on the anode 112, the fluorescent substance can emit light by the electrons collected by the anode 112. It should be noted that the FEC element operates in a vacuum environment because electrons travel in the space.

[0009]

By the way, in the manufacturing process shown in FIG. 5, when the emitter 111 is formed, the separation layer 109 is vapor-deposited on the gate 105 (FIG. 5D).
Further, after depositing the deposition layer 110 on the peeling layer 109 and depositing the emitter 111 in the opening 107, the deposition layer 110 is removed together with the peeling layer 109. Therefore, in practice, vapor deposition and peeling processes of the peeling layer 109 and the deposition layer 110 which do not form the FEC are performed. In the peeling process, for example, the peeling layer 109 and the deposition layer 110 are used.
Since, for example, is etched with phosphoric acid or the like, it is necessary to perform cleaning after the process is completed, and the number of manufacturing processes as a whole is increased along with the peeling process.

Further, when the peeling layer 109 is rotationally and obliquely vapor-deposited, the peeling layer 109 may adhere to the inner wall of the opening 107, which may cause insulation failure and short-circuit the gate 105 and the emitter 111. is there.

[0011]

The present invention has been made to solve the above problems, and is formed by a cathode electrode formed on a substrate and an insulating layer formed on the cathode electrode. In the field emission device, the gate electrode, the opening provided in the insulating layer and the gate electrode, and the cone-shaped emitter that emits electrons into the opening are provided.
A step is formed on the inner wall of the opening formed by the insulating layer to form a field emission device.

Further, by forming a cathode electrode and an insulating layer on the substrate, forming an opening in the insulating layer by etching, and then depositing a deposition layer for forming a gate electrode and an emitter on the insulating layer. , A cone-shaped emitter is formed in the opening, and then the deposited layer is etched to a predetermined thickness to form a gate electrode on the insulating layer to form a field emission device. To manufacture.

Further, a cathode electrode and an insulating layer are formed on the substrate, an opening having a step on the inner wall is formed by etching in the insulating layer, and then a metal layer is formed on the insulating layer. Then, a cone-shaped emitter is formed in the opening by depositing a deposition layer that forms an emitter on the metal layer, and then the deposition layer on the metal layer is formed. A field emission device is manufactured by forming a gate electrode by etching so as to have a predetermined thickness. Further, the metal layer is formed on the insulating layer by oblique vapor deposition.

[0014]

Embodiments of the present invention will be described below. First, a method of manufacturing the FEC according to the first embodiment will be described with reference to FIG. First, as shown in FIG. 1A, a cathode 2 made of a metal layer, a resistance layer 3 made of amorphous silicon, and an insulating layer (SiO ₂₎ formed by thermally oxidizing silicon are formed on a substrate 1 made of glass or the like. Layer 4 is sequentially formed by vapor deposition or the like. Further, patterning is performed after applying a photoresist (not shown) to the insulating layer 4. After this patterning, etching is performed,
An opening 7 is formed in the insulating layer 4 as shown in FIG.

Next, the photoresist is removed and, for example, molybdenum is deposited on the insulating layer 4 to form a molybdenum deposition layer 10 on the insulating layer 4 as shown in FIG. At the same time, the emitter 11 is deposited in the shape of a cone in the opening 7 opened by etching. Then, the deposited layer 10 is etched by RIE (reactive ion etching) or the like to a predetermined film thickness, for example, and an FEC having a structure as shown in FIG. 1D is obtained. That is, the gate 10 is formed by utilizing the deposited layer 10 for forming the emitter 11 shown in FIG.

When the deposited layer 10 is etched, the etching rate of the emitter 11 is lowered due to the influence of the deposited layer 10 formed around the opening 7. The so-called loading effect prevents the emitter 11 from being etched. , The conical shape will be maintained.

As described above, according to the present invention, since the emitter can be formed without forming the peeling layer, the conventional vapor deposition step and peeling step of the peeling layer 109 can be omitted.

As a second embodiment, FIG. 2 (a)
It is also possible to deposit the gate 5 and the deposited layer 10 individually, as shown in (b) (c) (d) (e).
2A and 2B show steps similar to the steps shown in FIGS. 1A and 1B. First, as shown in FIG. 1A, a cathode 2, a resistance layer 3, and an insulating layer 4 are sequentially formed on a substrate 1 made of glass or the like by vapor deposition or the like (see FIG.
(A)) Further, the opening 7 is formed in the insulating layer 4 as described in FIG. 1 (b) (FIG. 2 (b)). And FIG.
As shown in (c), a gate 5 made of a metal layer such as niobium is formed on the insulating layer 4 by oblique vapor deposition or the like,
Further, when molybdenum or the like is deposited on the gate 5, a deposition layer 10 is formed on the insulating layer 4 as shown in FIG.
And the emitter deposition layer 11 is deposited in the shape of a cone in the opening 7 formed by etching.

Then, the deposition layer 10 is etched by RIE (reactive ion etching) or the like until the gate 5 can be exposed to the upper side, as shown in FIG. 2 (e), for example. An FEC having a different structure can be obtained. In addition, although the gate 5 shown in FIG. 2C has been described here as an example in which the gate 5 is vapor-deposited on the insulating layer 4 by oblique vapor deposition, the gate 5 is vapor-deposited on the insulating layer 4 by normal vapor deposition similarly to the deposition layer 10. You may do it. In this case, the emitter 11 is made of molybdenum and niobium. Further, the gate electrode may be configured by the deposition layer 10 and the gate 5 without etching the deposition layer 10 entirely.

Next, as a third embodiment, in order to suppress the short circuit between the gate 5 and the emitter 11, an example in which the insulating layer 4 has a three-layer structure is shown in FIGS. 3 (a) (b) (c) ( d)
An explanation will be given according to (e). First, as shown in FIG. 3A, a cathode 2 made of a metal layer, a resistance layer 3 made of amorphous silicon, and an insulating layer 4 formed by thermally oxidizing silicon are vapor-deposited on a substrate 1 made of glass or the like. And so on. The insulating layer 4 deposited at this time has a three-layer structure of insulating layers 4a and 4a and an insulating layer 4b having different etching rates by buffered hydrofluoric acid (BHF), for example. That is, the insulating layer 4b forming the intermediate layer
The BHF etching rates of the insulating layers 4a and 4a are set to be higher. As a result, when patterning is performed to form the opening 7, the insulating layer 4b is etched more than the insulating layers 4a and 4a due to the difference in BHF etching rate, as shown in FIG. 3B, for example. As a result, a step is formed on the inner wall of the formed opening 7.

Next, as shown in FIG. 3C, while the substrate 1 is being rotated, the gate 5 is vapor-deposited by rotationally vapor-depositing niobium or the like obliquely to the substrate surface. Then, the gate is selectively vapor-deposited only on the surface of the insulating layer 4. Furthermore, at the edge of the opening 7, the inner circumference is also vapor-deposited,
The diameter of the opening 7 is reduced. At the same time, niobium may adhere to the inside of the opening 7, but a step portion formed by a difference in BHF etching rate, that is, the insulating layer 4
It comes to adhere to b. As a result, FIG.
As shown in (e), even when the emitter 11 is formed in the opening 7, the distance between the niobium 5b attached to the inner wall of the insulating layer 4b and the emitter 11 can be obtained, so that the gate 5 and the emitter 11 can be obtained. A short circuit with 11 can be suppressed. That is, the insulating layer 4b does not cause a short circuit between the gate 5 and the emitter 11 even if niobium 5b is attached.
BH so that a step having a predetermined distance is formed
It is configured by laminating insulating materials having different F etching rates.

Further, when molybdenum is deposited on the gate 5, a deposition layer 10 is formed on the gate 5 in the opening 7 formed by etching as shown in FIG. Are deposited in the shape of a cone. After that, the deposited layer 10 on the gate 5 is removed by, for example, RIE to obtain an FEC having a structure as shown in FIG.

FIG. 4 shows a perspective view of the FEC element obtained by the manufacturing method shown in FIGS. In this figure, a cathode 2 is formed on a substrate 1, and a resistance layer 3 is formed on the cathode 2. And
A cone-shaped emitter 11 is formed on the resistance layer 3. Further, a gate 5 is provided on the cathode 2 via an insulating layer 4, and a tip end portion of a cone-shaped emitter 11 faces a round opening 7 provided in the gate 5.

Further, in this embodiment, the insulating layer 4 is made of BHF.
Since it is composed of a three-layer structure with different rates,
A step is formed in the middle of the insulating layer 4. As a result, even when Nb adheres to the inner wall of the insulating layer 4 when the gate 5 is vapor-deposited, the distance from the emitter 11 can be obtained, so that it is possible to suppress the short circuit between the emitter 11 and Nb. Become.

In the surface emission type FEC thus formed, when a driving voltage VGE of several tens of volts is applied between the gate 5 and the cathode 2, electrons are emitted from the emitter 11 and emitted from the emitter 11. The electrons are spaced apart on the gate 5 and are collected by the anode 12 to which the anode voltage VA is applied. In this case, the gate 5 is formed so as to protrude to the inner circumference of the opening 7, and the diameter of the opening 7 is reduced. Therefore, the distance between the emitter 11 and the gate 5 is reduced, so that electrons are easily emitted from the emitter 11 and the diffusion of electrons emitted from the cathode 2 can be suppressed. Further, if a fluorescent substance is provided on the anode 12, the fluorescent substance can be made to emit light by the electrons collected by the anode 12. It should be noted that the FEC element operates in a vacuum environment because electrons travel in the space.

As shown in the figure, in the FEC of this embodiment, since the gate 5 is vapor-deposited by oblique vapor deposition, the diameter of the opening 7 can be made small and the emitter 1
The electrons can be easily emitted from 1 and the diffusion of the electrons can be suppressed. Further, when the gate 5 is obliquely vapor-deposited, niobium 5 attached to the inner wall of the opening 7
a and 5a are attached to the step portion formed by the insulating layer 4b and have a predetermined distance from the emitter 11, so that the gate 5 and the emitter 11 can be prevented from being short-circuited. become.

[0027]

As described above, the present invention does not require a peeling layer when forming an emitter, so that the step of forming the peeling layer and the step of peeling the peeling layer can be omitted. Become. Further, since the gate is formed on the insulating layer by utilizing the deposited layer formed when the emitter is formed in the opening, the step of forming only the gate can be omitted.

Further, since the gate is formed by oblique vapor deposition, the diameter of the opening can be reduced and the distance between the emitter and the gate can be shortened, so that electrons can be easily emitted from the emitter and the diffusion of the electrons can be facilitated. Can be suppressed. Further, by providing the step in the insulating layer, a predetermined distance can be obtained between the inner wall of the opening and the emitter, so that the short circuit between the emitter and the gate can be suppressed.

[Brief description of drawings]

FIG. 1 is a diagram schematically showing steps of a method for manufacturing an FEC according to the first embodiment of the present invention.

FIG. 2 is a diagram schematically showing the steps of the method for producing an FEC according to the second embodiment of the present invention.

FIG. 3 is a diagram schematically showing the steps of the method for producing an FEC according to the third embodiment of the present invention.

FIG. 4 is a diagram showing a perspective view of an FEC manufactured by the FEC manufacturing method according to the third embodiment of the present invention.

FIG. 5 is a diagram schematically showing an example of steps of a conventional FEC manufacturing method.

FIG. 6 is an F produced by a conventional FEC production method.
It is a figure which shows the perspective view of EC.

[Explanation of symbols]

 1 Substrate 2 Cathode 3 Resistive Layer 4 Insulating Layer 5 Gate 7 Opening 10 Deposited Layer 11 Emitter

Claims (4)

[Claims] 1. A cathode electrode formed on a substrate, a gate electrode formed on the cathode electrode via an insulating layer, an opening provided in the insulating layer and the gate electrode, and the opening. A field emission device comprising: a cone-shaped emitter that emits electrons in a portion; and a step formed on an inner wall of the opening formed by the insulating layer. 2. A cathode electrode and an insulating layer are formed on a substrate, and an opening is formed in the insulating layer by etching.
A cone-shaped emitter is formed in the opening by depositing a deposition layer that forms a gate electrode and an emitter on the insulating layer, and then the deposition layer is etched to a predetermined thickness. Thus, the method for producing a field emission device is characterized in that the gate electrode is formed on the insulating layer. 3. A cathode electrode and an insulating layer are formed on a substrate, an opening having a step is formed on the inner wall is formed in the insulating layer by etching, and then a metal layer is formed on the insulating layer. Then, a cone-shaped emitter is formed in the opening by depositing a deposition layer that forms an emitter on the metal layer, and then the deposition layer on the metal layer is formed. A method of manufacturing a field emission device, characterized in that the gate electrode is formed by etching so as to have a predetermined thickness. 4. The method of manufacturing a field emission device according to claim 3, wherein the metal layer is formed on the insulating layer by oblique vapor deposition.