JPH09258686A - Picture data transmitting method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To drastically suppress unwanted radiation. SOLUTION: Picture data D1, D2, D3 and D4 constituted with four bits data are regarded to one set D. The set D is divided into four partial set Δ1, Δ2, Δ3, Δ4. This divided partial set of each Δ1, Δ2, Δ3, Δ4 is inputted to a multi- value conversion circuit provided independently for each partial set, and transmitted to a display device via a transmission line path provided independently in the same way. On the other hand, in the display device, the multi-value signal is restored to the original partial set Δ1, Δ2, Δ3, Δ4, further, they are restored to the original picture data D1, D2, D3, D4, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data transmission method for transmitting digital image data to a flat panel display device such as a liquid crystal display device, a plasma display device, an EL display device and a field effect display device (FED). Regarding

[0002]

2. Description of the Related Art Conventionally, for transmitting digital image data to the above-mentioned display device, a method of directly transmitting binary digital data from a main machine such as an electronic computer has been generally performed. Regarding the data transmission, for example, taking a VGA type display device, which is the most common in the past, as an example, the transfer time of one image data is about 40 nsec.
A transfer clock of about 25 MHz synchronized with the image data is sent from the main machine to the display device in parallel with the image data.

FIG. 13 shows an example of a timing chart in the transmission method. The waveform indicated by Data in the figure represents image data, and each image data of red, blue, and green is collectively represented in this way. Since each image data is composed of a plurality of bits, for example, when the image data is 8 bits, the image data is transmitted using 8 × 3 lines, that is, a total of 24 lines.

[0004]

By the way, recently, Mic
With the rapid spread of MS-Windows from Microsoft Corporation, the high definition of the display device has progressed, and in the display device using the cathode ray tube, the display from XGA to SXGA is already becoming popular. Such a demand for higher definition is strongly demanded also in a flat panel display device, and for example, in a liquid crystal display device, the conventional VGA is being shifted to SVGA and further to higher definition XGA and SXGA. It is in.

However, as the display device becomes finer, it is required to increase the transfer rate of image data. For example, a high-speed transfer clock of about 60 MHz for XGA and about 100 MHz for SXGA is required.

As described above, when high-speed binary digital image data is transmitted, electromagnetic interference called unnecessary radiation occurs. Therefore, a technique for suppressing unnecessary radiation within the officially determined standards has been established. Is requested.

Therefore, in order to solve the problem of this unwanted radiation, the following two methods have been proposed. One of them is
A method of suppressing the leakage of electromagnetic waves of unnecessary radiation to the outside of the device by mounting ferrite around the liquid crystal display device (JP-A-7-92450). The other one is
This is a method of suppressing unnecessary radiation by providing a wide area metal plate in the liquid crystal display device and electrically connecting the metal plate to the ground line of the printed circuit board (JP-A-6-828).
03).

However, the above-mentioned method is not sufficient as a means for suppressing unnecessary radiation accompanying the higher definition of the display device, and there is room for further improvement.

The present invention has been made in order to solve the problems of the prior art, and an object of the present invention is to provide an image data transfer method capable of significantly suppressing unnecessary radiation.

[0010]

An image data transmitting method of the present invention is a method for transmitting digital image data to a display device, and one image data is based on bits constituting the image data. It is considered as a set and divided into a plurality of subsets, each divided subset is converted into a multi-valued signal, and the converted multi-valued signal of each subset is sent to the display device via separate lines. Transmission, which achieves the above objectives.

The image data transmission method of the present invention is a method of transmitting digital image data to a display device, and a plurality of groups based on bits constituting one image data and signals other than the image data are provided. Divide into subsets, convert each divided subset into multi-valued signals, and transmit the converted multi-valued signals for each subset to the display device via separate lines, thereby The above object is achieved.

In the above-described image data transmission method of the present invention, the division into the subsets may be performed so that all the originals are included in any one of the divided subsets.

The image data transmission method of the present invention is a method for transmitting digital image data to a display device, and divides a group based on bits constituting a plurality of image data into a plurality of subsets and divides the divided groups. Each of the generated subsets is converted into a multi-valued signal, and the converted multi-valued signal of each subset is transmitted to the display device via a separate line, whereby the above object is achieved.

The image data transmission method of the present invention is a method for transmitting digital image data to a display device, and a plurality of groups based on bits constituting a plurality of image data and signals other than the image data are provided. Divide into subsets, convert each divided subset into multi-valued signals, and transmit the converted multi-valued signals for each subset to the display device via separate lines, thereby The above object is achieved.

In the above-mentioned image data transmission method of the present invention, the division into the subsets may be performed so that all of the originals are included in any one of the divided subsets. A clock signal, which is divided into the plurality of subsets and converted into a multi-valued signal and transmitted to the display device via the line as one cycle, is transmitted via a line different from the line. It may be transmitted.

The operation of the present invention will be described below.

In the present invention, one or a plurality of digital image data are regarded as a set based on each bit. As a result, the boundaries between the image data are removed, and the image data can be freely divided into subsets.
Further, by treating each element of the divided subset as a binary coefficient and associating it with a multivalue, each of the subsets can be converted into a multivalued signal. The multivalued signal is transmitted to the display device by a line provided for each subset.

At this time, by setting the multilevel signal to a signal having an amplitude of, for example, 1 V or less, unnecessary radiation can be significantly reduced. Furthermore, by configuring each element of the subset from bits that span multiple pixels, the bits of multiple pixels can be sent in one cycle of the clock. As a result, the transfer rate of image data can be slowed down, and unnecessary radiation can be greatly reduced.

On the other hand, on the receiving side, the received multilevel signal is first restored to the original subset. By restoring each subset, all elements of the original set can be restored, and the original digital image data can be restored.

[0020]

First, the basic concept of the present invention will be described.

FIG. 1 is a diagram for explaining the basic concept of the present invention. It should be noted that in the figure, for ease of explanation, 4 bits are taken as an example of the image data.

D1, D2, D3 and D4 shown in FIG. 1A are four digital image data. Each image data D1, D2, D3 and D4 is composed of four bit data.

This image data is regarded as one set D as shown in FIG. The image data D1, D2,
Here, it is assumed that D3 and D4 are image data regarding four consecutive pixels.

Then, the set D of FIG.
As shown in (c), it is divided into four subsets Δ1, Δ2, Δ3, and Δ4 each having the illustrated element. Each of the divided subsets Δ1, Δ2, Δ3, and Δ4 is input to the multi-value conversion circuits 1a, 1b, 1c, and 1d separately provided for each subset, as shown in FIG. The signal is transmitted to the display device 10 via the transmission lines L1, L2, L3, and L4 provided in. Note that MCK in FIG. 2 is a clock signal for giving a timing of transmitting the subset once.

On the other hand, in the display device, the clock signal M
Multi-value signals are converted into multi-value conversion circuits 1a, 1b, 1 based on CK.
Inverted multi-value conversion circuits 11a, 11
b, 11c, 11d, the original subsets Δ1, Δ2,
Restore Δ3 and Δ4. Further, the original image data Dl, D2, D3, D4 is restored by an inverse set conversion circuit (not shown).

FIG. 3 shows a timing chart of data processing during this period. The image data input at T1 is divided into subsets at T2, converted into a multilevel signal, and transferred to a display device via a transmission line. Then, at T3, the multi-valued signal is inversely converted in the display device to restore the original image data. With respect to the next image data, the image data input at T2 is divided into subsets at T3, converted into a multilevel signal, and transferred to the display device via the transmission line. And at T4,
In the display device, the multi-valued signal is inversely converted and restored to the original image data. Hereinafter, this process is repeated to process all the image data.

As can be seen from this figure, in the case of this embodiment, the clock MC for transmitting a multilevel signal is used.
K can have a frequency of 1/4 of the original clock CK. By reducing the frequency, unnecessary radiation is greatly reduced. Furthermore, by making the multilevel signal a signal having an amplitude of, for example, 1 V or less, it is possible to further reduce the unnecessary radiation.

In addition to the present invention, a method of converting various kinds of digital data into multi-valued data and transmitting the multi-valued data through a single transmission line (Japanese Patent Laid-Open No. 6-120929), or dividing digital data into upper and lower bits Transmission method of transmitting to liquid crystal driving device and returning to original data by data holding circuit (Japanese Patent Laid-Open No. 6-9
No. 5618) has been proposed. However, the former Japanese Patent Laid-Open No. 6-120929 describes the concept of dividing one or a plurality of digital image data into a set based on bits and dividing the set into a plurality of subsets as in the present invention. It has not been.

The latter Japanese Patent Laid-Open No. 6-95618 discloses
When the digital image data is sent to the liquid crystal driving device by dividing it into upper bits and lower bits and the data holding circuit restores the original image data, the data is held at the rising and falling edges of the clock, It is configured so that the clock frequency can be lowered as compared with the case of holding only at the rising edge. Therefore, the concept of transmitting digital image data by dividing it into upper bits and lower bits in this way seems to be similar to the present invention at first glance, but the present invention separately divides it into upper bits and lower bits. Instead of assuming it, one or more digital image data are regarded as a set based on bits, divided into a plurality of subsets, and each subset is converted into a multivalued signal. Is transmitted to the display device by a line provided for each subset, which is different. Further, with respect to the fact that the clock frequency can be lowered, the present invention can lower it by simultaneously processing a plurality of consecutive image data in a certain period, which is completely different from the cause.

Next, embodiments of the present invention will be described in more detail.

(First Embodiment) FIG. 4 shows a first embodiment of the present invention.

In this embodiment, one image data consisting of 8 bits shown in FIG. 4A is converted into upper 4 bits (d ₄ , d ₅ , d ₆ , d ₇ ) as shown in FIG. 4B. And the lower 4 bits (d ₀ , d ₁ , d ₂ , d ₃ ) are divided into two subsets. Further, 4-bit digital / analog conversion circuits 2a and 2b are used as the multi-value conversion circuit, and an analog / digital conversion circuit 12a is used as the inverse multi-value conversion circuit on the receiving side.
12b is used.

In this embodiment, since a plurality of continuous image data are not processed at the same time, the clock frequency for transferring the image data does not decrease, but it has an advantage that only two transmission lines are required. (If it remains digital, eight transmission lines are required). Further, by setting the amplitude of the analog signal, which is a multi-valued signal converted by the digital / analog conversion circuits 2a and 2b, to about 0.6 Vp-p, for example, unnecessary radiation is significantly reduced.

Next, the advantages obtained by dividing the present embodiment into subsets will be described.

In carrying out the present invention, the digital / analog converter circuits 2a and 2b and the analog / digital converter circuits 12a and 12b shown in FIG. 4 may have any structure. However, the difficulty is totally different between 4-bit and 8-bit conversion circuits of any structure. For example, if the maximum amplitudes are the same, then an 8-bit multilevel signal must correspond to a voltage value of 256.
In the case of bits, only 16 voltage values are required. as a result,
As shown in FIG. 5, in the case of 8 bits, a voltage value obtained by further dividing the adjacent voltage values of the 4-bit multi-valued signal into 16 equal parts is required. Since the bit is processed, the required voltage value can be reduced.

Therefore, in the present embodiment, by using the 4-bit conversion circuit having an easy structure, the 8-bit conversion circuit / inverse conversion circuit, which is very difficult to structure, becomes unnecessary. Actually, it is easy to realize a high-speed 8-bit digital-analog conversion circuit, an analog-signal transmission line having a converted 256-signal level, an analog-digital conversion circuit that converts a received analog signal back to a digital signal, etc. is not. According to the present invention, it is easy to realize and has low power consumption.
The advantage of replacing with the bit conversion circuit is extremely large.

When the present embodiment is applied to a color display device, the circuit shown in the figure may be provided for each data of red, blue and green. Further, in the present embodiment, the set conversion circuit is adapted to input the upper and lower bits of the data to the respective conversion circuits, and the output of the analog-digital conversion circuit corresponds to the original 8-bit data. Arranging in order corresponds to the inverse set conversion circuit.

(Second Embodiment) FIG. 6 shows a second embodiment.

In this embodiment, one image data consisting of 8 bits shown in FIG. 6A is converted into upper 3 bits (d ₅ , d ₆ , d ₇ ) and lower 5 bits as shown in FIG. 6B. It is divided into a subset of bits (d ₀ , d ₁ , d ₂ , d ₃ , d ₄ ). The reason for dividing in this way is that the higher the bit, the greater the weight in the image data, so the color changes greatly when an error occurs, while the lower bit affects the color even if an error occurs. Is smaller than the upper bits.

Therefore, in the present embodiment, the number of elements of the subset consisting of high-order bits is reduced so that an error in image data transmission due to noise or the like is less likely to occur. Even in this case, by making the multilevel signal a signal having an amplitude of, for example, 1 V or less, it is possible to significantly reduce unnecessary radiation.

(Third Embodiment) FIG. 7 shows a third embodiment.

In this embodiment, as shown in FIG. 7A, two continuous image data D1 and D2 are divided into three subsets and transmitted. Specifically, the image data D1 is composed of 6 bits of d ₁₀ , d ₁₁ , d ₁₂ , d ₁₃ , d ₁₄ and d ₁₅ , and the image data D2 is d ₂₀ , d ₂₁ , d ₂₂ ,
It consists of 6 bits of d ₂₃ , d ₂₄ and d ₂₅ . On the other hand, the subset is, as shown in FIG. 7B, 4 bits of d ₁₀ , d ₁₁ , d ₁₂ , and d ₁₃ , 4 bits of d ₁₄ , d ₁₅ , d ₂₀ , and d ₂₁ , and d
₂₂ bits, d ₂₃ , d ₂₄ , and d _{25, which} are 4 bits.

In the case of this embodiment, the frequency of the clock MCK at the time of transmitting the multilevel signal is half the frequency of the original clock CK as shown in FIG. 7C.

(Fourth Embodiment) FIG. 8 shows a fourth embodiment.

In this embodiment, as shown in FIG. 8A, image data R, G, B consisting of 6 bits is converted into the image data shown in FIG.
As shown in (b), the data is divided into six subsets and transmitted. Specifically, the image data R is r ₀ , r ₁ , r ₂ ,
6 bits of r ₃ , r ₄ and r ₅ , the image data G is g ₀ , g ₁ ,
6 bits of g ₂ , g ₃ , g ₄ and g ₅ , image data B is b ₀ ,
There are 6 bits of b ₁ , b ₂ , b ₃ , b ₄ and b ₅ . Further, the subset is 3 bits of r ₀ , r ₁ and r ₂ , 3 bits of r ₃ , r ₄ and r ₅ , 3 bits of g ₀ , g ₁ and g ₂ , g ₃ , g ₄ and g _5. 3 bits of b ₀ , b ₁ , b ₂ and 3 bits of b ₃ , b ₄ , b ₅ .

Each of the above-described six divided subsets is input to a digital / analog conversion circuit, and signal processing is similarly performed. Even in this case, the same effect as that of the first embodiment can be obtained.

As a method of dividing into subsets, the method shown in FIG. 9 may be used. In FIG.
The subset is r ₀ , r ₁ , r ₂ , as shown in FIG.
4 bits of r ₃ , 2 bits of r ₄ and r ₅ , g ₀ , g ₁ , g ₂ ,
4 bits of g ₃ , 2 bits of g ₄ and g ₅ , b ₀ , b ₁ and b ₂ ,
There are 4 bits of b ₃ and 2 bits of b ₄ and b ₅ .

In the case of FIG. 9, when converting to a multilevel signal, a voltage of 16 gradations is required for 4 bits and a voltage of 4 gradations is required for 2 bits.

Further, in the case of color display, when the bits of the image data are divided and transmitted in a plurality of subsets, it is not necessary to divide the bits for each of the RGB image data.
As shown in FIGS. 10 and 11, RGB image data may be mixed and performed.

In FIG. 10, the subset is shown in FIG.
As shown in (b), 4 bits of r ₀ , r ₁ , r ₂ , and r ₃ , r
₄ , 2 bits of r ₅ , 2 bits of g ₀ , g ₁ , g ₂ , g ₃ , g
₄ , 4 bits of g ₅ , 4 bits of b ₀ , b ₁ , b ₂ , b ₃ b
2 bits of ₄ and b ₅ . Further, 2 bits of b ₄ and b ₅ are given to one digital / analog conversion circuit, and the other bits are given to the digital / analog conversion circuit as 4 bits.

Further, in the case of the circuit configuration shown in FIG. 11, as shown in FIG. 11B, 2 of b ₄ and b ₅ in FIG.
The control signals A and B other than the image data are further applied to one digital / analog conversion circuit which applies bits.

The control signals A and B may be any signals as long as they are digital signals. If, for example, a recognition signal for monochrome display or color display is used as the signal,
In monochrome display, only one of the R, G, and B image data, for example, the R image data needs to be transmitted, and the same data can be used for the remaining G and B image data. The transmission of one image data is good. In addition, the control signals A and B described above are performed so as to determine a subset so as to be included in any one or two of the subsets obtained by dividing the image data, and transmit the subset. Although the control signal is described as an example of the data other than the image data here, other data may be divided into subsets and transmitted similarly to the processing of the control signal.

Further, when the above-mentioned three consecutive image data R, G, B consist of 8 bits as shown in FIG. 12 (a), each of them has 8 bits as shown in FIG. 12 (b). The image data R, G, B may be divided into 4-bit subsets and transmitted to the digital / analog conversion circuit. Alternatively, the method of dividing into subsets and the method of transmitting the data of the divided subsets to the digital / analog conversion circuit may be performed as described above with reference to FIGS. 9 to 11.

In each of the above embodiments, 2
Although a digital / analog conversion circuit or an analog / digital conversion circuit is used when converting a value signal into a multilevel signal and vice versa, the present invention is not limited to this. For example, a multi-valued element may be used. Further, in addition to the above-described embodiments, a combination thereof may be considered, for example, a control signal may be included in the subset when simultaneously processing continuous image data.

[0055]

As described in detail above, according to the present invention, unnecessary radiation can be reduced significantly. In addition, even when the image data has a high gradation such as 6 bits or 8 bits, the digital / analog conversion circuit and the analog / analog conversion circuit are inexpensive and have low power consumption.
By enabling data transmission by multilevel signals using a digital conversion circuit or the like, the effects of cost reduction and low power consumption are great.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a basic concept of the present invention.

FIG. 2 is a circuit configuration diagram for realizing the basic concept of the present invention.

FIG. 3 is a diagram showing a timing of data processing in the present invention.

FIG. 4 is a diagram illustrating an image data transmission method according to the first embodiment of the present invention.

FIG. 5 is a diagram for explaining an advantage obtained when the image data transmission method according to the first embodiment of the present invention is adopted;
It is a figure which shows the voltage value width of a 4-bit and 8-bit multi-value signal.

FIG. 6 is a diagram illustrating an image data transmission method according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating an image data transmission method according to a third embodiment of the present invention.

FIG. 8 is a diagram for explaining an image data transmission method according to a fourth embodiment of the present invention.

FIG. 9 is a diagram for explaining another image data transmission method according to the fourth embodiment of the present invention.

FIG. 10 is a diagram for explaining still another image data transmission method according to the fourth embodiment of the present invention.

FIG. 11 is a diagram for explaining still another image data transmission method according to the fourth embodiment of the present invention.

FIG. 12 is a diagram for explaining still another image data transmission method according to the fourth embodiment of the present invention.

FIG. 13 is a diagram showing a timing of data processing in the conventional transmission method.

[Explanation of symbols]

 D1, D2, D3, D4 Image data Δ1, Δ2, Δ3 and Δ4 Subsets 1a, 1b, 1c, 1d Multi-level conversion circuit L1, L2, L3, L4 Transmission line 10 Display device MCK clock signal 11a, 11b, 11c, 11d Inverse multi-value conversion circuit

Claims (7)

[Claims] 1. A method for transmitting digital image data to a display device, wherein one image data is regarded as a set based on bits constituting the image data and is divided into a plurality of subsets. An image data transmission method for converting each of the generated subsets into a multi-valued signal and transmitting the converted multi-valued signal of each of the subsets to the display device via separate lines. 2. A method for transmitting digital image data to a display device, comprising dividing a group based on a bit forming one image data and a signal other than the image data into a plurality of subsets and dividing the group. An image data transmission method for converting each of the generated subsets into a multi-valued signal and transmitting the converted multi-valued signal of each of the subsets to the display device via separate lines. 3. The image data transmission method according to claim 1, wherein the division into the subsets is performed so that all of the originals are included in any one of the divided subsets. 4. A method of transmitting digital image data to a display device, wherein a group based on bits constituting a plurality of image data is divided into a plurality of subsets, and each of the divided subsets is divided. An image data transmission method for converting into a multi-valued signal and transmitting the converted multi-valued signal for each subset to the display device via separate lines. 5. A method for transmitting digital image data to a display device, wherein a group based on bits constituting a plurality of image data and a signal other than the image data is divided into a plurality of subsets and divided. An image data transmission method for converting each of the generated subsets into a multi-valued signal and transmitting the converted multi-valued signal of each of the subsets to the display device via separate lines. 6. The image data transmission method according to claim 4, wherein the division into the subsets is performed such that all of the originals are included in any one of the divided subsets. 7. A clock signal, which is divided into the plurality of subsets and converted into a multilevel signal and transmitted to the display device via the line as one cycle, is different from the line. The image data transmission method according to claim 4 or 5, wherein the image data is transmitted via the.