JPH09252085A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a capacitance element having as high capacitance as possible, by forming an oxide layer of tungsten on the surface of a lower electrode on a semiconductor substrate, forming a dielectric layer on the oxide layer, and forming an upper electrode on the dielectric layer. SOLUTION: A tungsten film 5 to become a lower electrode is formed on a silicon substrate 1 forming an insulating film thereon, and coated with resist to form a resist pattern. With the pattern used as a mask the film 5 is patterned. The pattern is removed, annealed, an oxide layer 7 is formed on the film 5, and a Pt 11 for an upper electrode is formed on an STO film 9 as a dielectric layer on the layer 7. Thus, a capacitance element having as high capacitance as possible can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a capacitive element.

[0002]

2. Description of the Related Art In recent years, with regard to semiconductor memory devices, a reduction in storage capacity has become a problem as the area of a capacitive element (capacitor) is reduced by miniaturization of the element. Then, S
It has become indispensable to use a high dielectric film such as rTiO ₃ (hereinafter referred to as STO) as a capacitor insulating film and compensate for a decrease in storage capacitance due to a reduction in area by increasing a dielectric constant.

An oxide insulating film such as STO is often used as the high dielectric film. Further, good crystallinity of the high dielectric film is indispensable for improving leak characteristics and maintaining a high dielectric constant, and therefore high temperature annealing in an oxygen atmosphere is indispensable.

As a result, the electrode surface under the capacitor is oxidized. When the metal oxide formed by this oxidation acts as a dielectric having a low dielectric constant, a low dielectric constant capacitor is formed in series with a capacitor made of a high dielectric film, resulting in a decrease in the dielectric constant of the entire capacitor. Will end up. Therefore, especially regarding the lower electrode of the capacitor,
There has been required a material having high oxidation resistance, a material exhibiting conductivity even when oxidized, or a material having a high dielectric property in the formed oxide itself.

An example in which Ru is used as a material exhibiting conductivity even if it is oxidized to the lower electrode (“high / ferroelectric electrode material (R
u, Ir) ”, Masaaki Nakamura et al., 1995, The Institute of Electronics, Information and Communication Engineers, Electronics Society Conference (C-448)). This example will be described with reference to FIG.

In FIG. 4, Ti is formed on the silicon substrate 50.
A capacitor lower electrode 52 having a three-layer structure of a layer, a TiN layer, and a Ru layer is formed. And this lower electrode 52
Of the capacitor insulating film 56 made of STO on a predetermined area of
And a capacitor upper electrode 58 made of Pt is formed on the insulating film 56. When forming the capacitor insulating film 56, sputtering of STO in an oxygen atmosphere,
Alternatively, the surface of the lower electrode 52 is oxidized by the subsequent high temperature annealing, and the oxide layer 54 made of RuO ₂ is formed.

The oxide layer 54 has a specific resistance ρ of 90 μΩ.
cm conductive oxide. Therefore, the high dielectric property of the capacitor having STO is maintained without becoming a low dielectric constant dielectric. In the above capacitor, the TiN layer in the lower electrode 52 is used as a silicon barrier film, and the Ti layer is used for improving the adhesion to the silicon substrate 50.
For the same reason, there is an example in which the lower electrode 52 has a three-layer structure of Ti / TiN / Ir. The specific resistance value ρ of the oxide IrO ₂ is about 45 μΩ · cm.

[0008]

However, metals such as Ru and Ir are relatively expensive and costly, and are not often used as semiconductor materials, which causes a problem in compatibility with other semiconductor manufacturing processes. is there. Particularly in the case of Ru, there is a problem that 1) the adhesion to silicon or GaAs is poor, 2) the influence of contamination is unknown, and 3) the etching conditions such as the gas used are not established.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a semiconductor device having a capacitive element which is inexpensive and has a capacitance as high as possible.

[0010]

[Means for Solving the Problems]

[Outline] A first aspect of a semiconductor device according to the present invention is a lower electrode formed on a semiconductor substrate, a tungsten oxide layer formed on the lower electrode, and a tungsten oxide layer formed on the oxide layer. It is characterized by comprising a dielectric layer and an upper electrode formed on the dielectric layer.

A second aspect of the semiconductor device according to the present invention is characterized in that, in the semiconductor device according to the first aspect, the tungsten oxide layer contains tungsten dioxide.

A third aspect of the semiconductor device according to the present invention is characterized in that, in the semiconductor device according to the first aspect, the oxide layer of tungsten contains tungsten trioxide having a monoclinic structure.

[Operation] According to the semiconductor device of the present invention configured as described above, since the tungsten oxide layer serving as a conductor is provided between the lower electrode and the dielectric layer, it is high. A high capacitance can be obtained without impairing the characteristics of the dielectric having the dielectric constant characteristics. Further, tungsten is cheaper than Ru, Ir, or the like.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of a semiconductor device according to the present invention will be described with reference to the drawings. The manufacturing process of the semiconductor device of this embodiment is shown in FIG. First, for example, Si
On the silicon substrate 1 on which the insulating film 3 made of O ₂ is formed, a lower electrode is formed by DC magnetron sputtering, for example, W (tungsten) having a film thickness of 2000 angstrom.
The film 5 is formed (see FIG. 1A). Subsequently, a resist pattern (not shown) which remains only on a predetermined region of the W film 5 by applying a resist on the W film 5 and exposing and developing it
Is formed, and RIE is performed using this resist pattern as a mask.
The W film 5 is patterned using anisotropic etching such as (Reactive Ion Etching) (see FIG. 1A).

After the resist patterning is removed, the O ₂ partial pressure is 5 atm by a lamp annealing device.
%, And annealing at a temperature of 800 ° C. for 1 minute to form a conductive oxide layer 7 on the surface of the W film 5 (see FIG. 1A). The oxide layer 7 formed at this time is made of tungsten dioxide WO _x (x = 1.9) as described later.
4 to 2.02), and hereinafter referred to as WO ₂ .

Next, the STO film 9 having a thickness of 1000 Å serving as a capacitor insulating film is formed on the entire surface of the substrate 1 in an oxygen atmosphere by using high frequency magnetron sputtering (see FIG. 1B). Then, crystallization annealing of STO is performed for 1 minute in a N ₂ atmosphere at a temperature of 600 ° C. using a lamp annealing device. After that, the Pt film 11 to be the upper electrode is formed by sputtering the entire surface of the substrate 1. Then, a resist pattern is formed by applying a resist on the Pt film 11 and patterning it so that it remains in a predetermined region on the oxide layer 7. Using the resist pattern as a mask, the Pt film 11 and the STO film 9 are etched by ion milling to form the upper electrode 11 and the capacitor insulating film 9 (FIG. 1B).
reference).

Next, after removing the resist pattern,
For example, the interlayer insulating film 13 made of SiO _{2 is} formed by CVD (Chem
The interlayer insulating film 13 is formed with a connection hole for the upper electrode 11 and the lower electrode 5 by forming a connection hole on the entire surface of the substrate 1 by using the ical vapor deposition method. Then, after depositing a metal film made of, for example, Al, the metal film is patterned, and the read electrodes 15a and 1 of the upper electrode 11 and the lower electrode 5 are formed.
5b is formed (see FIG. 1B).

When the dielectric constant of the capacitor thus formed was measured by DC measurement, a good value of ε = 140 was obtained. This value is the Ru layer and R described in the prior art.
This result is comparable to that of the high dielectric capacitor including the uO ₂ layer, the STO layer, and the Pt layer. It is considered that this is because in the semiconductor device of the present embodiment, the metal oxide layer 7 made of WO ₂ exists between the W layer 5 serving as the lower electrode and the STO layer 9. The WO ₂ itself is an oxide, but since the WO ₂ layer 7 is a conductor having a specific resistance ρ of 2900 μΩ · cm, the WO ₂ layer 7 does not become an insulating layer having a low dielectric constant. Therefore, since there is no oxide film layer having a low dielectric constant which is serially connected to the high dielectric film 9, the high dielectric film (for example, STO
The capacitor can be formed without impairing the high dielectric constant characteristics of the film. The specific resistance of WO ₂ is higher than that of RuO ₂ or IrO ₂ , but if the WO ₂ film 7 is formed as thin as possible compared to the W film 5, the resistance value as an electrode can be reduced. . Further, W is less expensive than Ru and Ir, and has good compatibility with other semiconductor manufacturing processes.

Next, a phase diagram for the oxide of W is shown in FIG. This phase diagram is Rieck,
GD, "Tungsten and its Compounds" p95 (Fig.
8), 1967, Pergamon Press.

In the semiconductor device of the first embodiment, the WO ₂ layer 7 has an O ₂ partial pressure of 5 atm% and a temperature of 80.
Since it is formed under the condition of 0 ° C., the WO ₂ layer 7 of the semiconductor device of this embodiment has an O ₂ partial pressure of 0% to 6 shown in FIG.
At 6.5%, the temperature is 725 ° C or higher (not shown, but 1
(Up to 530 ° C). This area is W + W
The region where O ₂ is formed, actually W + WO _x (x = 1.
94 to 2.02) are formed. When it is formed on a semiconductor substrate such as Si or GaAs like the capacitive element of the present invention, by RTA (Rapid Thermal Anneal),
A heat treatment at 1000 ° C. or lower is preferable.

Next, a second embodiment of the semiconductor device according to the present invention will be described with reference to FIG. The semiconductor device of this embodiment uses a GaAs substrate.

First, a WN _x layer and a W layer are deposited on a GaAs substrate 31 by DC magnetron sputtering to 1000 Å and 2000 Å, respectively, and a lamp annealing apparatus is used to obtain an O ₂ partial pressure of 40 atm% and a temperature of 200 ° C. Is annealed for 1 minute to form a WO ₂ film 33 on the surface of the lower electrode 32. Then, the lower electrode 32 is patterned by anisotropic etching.
To form

Next, the STO film 34 is deposited to 1000 angstroms while heating the substrate 31 at a temperature of 400 ° C. or lower in an oxygen atmosphere by using high frequency magnetron sputtering. By this substrate heating, ST is performed at the same time as sputtering.
Since O can be crystallized, the need for STO crystallization annealing at high temperature after sputtering is eliminated. Subsequently, a WN _x layer and a W layer are deposited to 1000 angstroms and 2000 angstroms, respectively, by using DC magnetron sputtering, and CF
_The upper electrode 35 is formed by patterning using ₄ + O ₂ -based reactive ion etching.

Next, using the upper electrode 35 as a mask, the STO film 34 is etched with a diluted NH ₄ F solution to form a capacitor insulating film 34. Thereby, the WN _x layer, the W layer 32, the WO ₂ layer 33, and the STO layer 3
4, a capacitor composed of the WN _x and W layers 35 is formed. Thereafter, as in the first embodiment, the interlayer insulating film 36 having the connection hole is formed, and then the read electrode 37 is formed.
Then, a and 37b are formed to complete the semiconductor device.

When the dielectric constant of this semiconductor device was measured by DC measurement, a good value of ε = 120 was obtained.

The WO ₂ film 33 formed in the second embodiment has an O ₂ partial pressure of 40 atm% and a temperature of 200.
The O ₂ partial pressure shown in FIG.
It is the same as that formed in the region where the temperature is 725 ° C. or lower at ˜66.5 atm%. This area is W ₃ O + WO
₂ is actually W ₃ O + WO _x (x = 1.94 to 2.0
2) is formed.

In the second embodiment, the metal oxide layer 33 made of W ₃ O + WO ₂ formed on the surface of the W layer 32 serving as the lower electrode is the surface of the lower electrode 5 of the first embodiment. Although it has a higher resistance than the metal oxide layer 7 made of W + WO ₂ formed in the above, it is useful for a low temperature process such as a GaAs substrate.

Further, the lower electrode 32 has a two-layer structure composed of a WN _x layer and a W layer so that a GaAs MESFET is formed.
Can be made the same as the heat-resistant gate electrode used for
When used for an ESFET, the process can be shortened.

Next, a third embodiment of the semiconductor device according to the present invention will be described. The semiconductor device of the third embodiment uses tungsten trioxide having a monoclinic structure between the lower electrode and the dielectric layer. A method of manufacturing the semiconductor device according to the third embodiment will be described with reference to FIG.

First, a W film 5 having a thickness of 2000 Å serving as a lower electrode is formed on the semiconductor substrate 1 having the SiO ₂ film 3 formed thereon by a reactive sputtering method, and then a photoresist pattern (not shown) is formed. Is formed, and the W film 5 is selectively removed by RIE using this photoresist pattern as a mask to form a lower electrode (see FIG. 1A). And oxygen gas atmosphere (600 ℃, 0 ₂ partial pressure 8
(0 atm%), high-temperature heat treatment is performed to form WO on the surface of the W film 5.
_{3 The} film 7 is formed (see FIG. 1A). By the high temperature heat treatment in the oxygen gas atmosphere, it is possible to suppress the formation of an oxide having a low dielectric constant on the surface of the lower electrode, and it is possible to prevent the capacitance value from decreasing.

After that, the STO film 9 having a film thickness of 1000 angstrom as the dielectric film and the film thickness of 1 as the upper electrode are 1
000 angstrom WN film 11 is laminated, and RIE is performed.
A capacitive element is formed by selective etching by the method (see FIG. 1B).

After that, an interlayer insulating film 13 is deposited,
A connection hole for the upper electrode 11 and the lower electrode 5 is opened, and a metal film made of, for example, Au is deposited and patterned to form wirings 15a and 15b, thereby completing the semiconductor device (see FIG. 1A). ).

When the semiconductor device manufactured by the above manufacturing method was measured by DC, the dielectric constant ε was 240.

The monoclinic structure tungsten trioxide film formed by the above manufacturing method has an O ₂ partial pressure of 80a.
Although it was manufactured under the condition of tm%, this falls within the region where the O ₂ partial pressure is 75 to 100% in the phase diagram shown in FIG. The tungsten trioxide formed in this region becomes WO _x (x = 2.95-3).

In the first to third embodiments, the film made of tungsten oxide (WO ₃ or WO ₂ ) is formed by oxidizing the surface of the lower electrode. In the first to third embodiments, STO (strontium titanate) is used as the material of the capacitor insulating film, but BST (barium strontium titanate) or PZT is used. (PbZr _x Ti _1-x O ₃ )
Etc. can also be used.

[0036]

As described above, according to the present invention, it is possible to obtain a semiconductor device having a capacitor which is inexpensive and has a capacitance as high as possible.

[Brief description of drawings]

FIG. 1 is a process sectional view showing a manufacturing process of a first embodiment of a semiconductor device according to the present invention.

FIG. 2 is a phase diagram of an oxide of W.

FIG. 3 is a sectional view showing the configuration of a second embodiment of a semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view showing the configuration of a conventional semiconductor device.

[Explanation of symbols]

1 Silicon Substrate 3 Insulating Layer 5 Lower Electrode (W Layer) 7 Metal Oxide Layer (WO ₂ Layer) 9 Capacitor Insulating Film 11 Upper Electrode 13 Interlayer Insulating Film 15a, 15b Readout Electrode 31 GaAs Substrate 32 Lower Electrode 33 Metal Oxide Layer (WO ₂ layer) 34 capacitor insulating film 35 upper electrode 36 interlayer insulating films 37a, 37b readout electrode 50 silicon substrate 52 lower electrode (Ru layer) 54 metal oxide layer (RuO ₂ layer) 56 capacitor insulating film 58 upper electrode

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshiaki Kitaura 1 Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa Toshiba Research & Development Center

Claims (3)

[Claims] 1. A lower electrode formed on a semiconductor substrate, and a tungsten oxide layer formed on the lower electrode,
A semiconductor device comprising: a dielectric layer formed on the oxide layer; and an upper electrode formed on the dielectric layer. 2. The semiconductor device according to claim 1, wherein the tungsten oxide layer contains tungsten dioxide. 3. The tungsten oxide layer comprises tungsten trioxide having a monoclinic structure.
13. The semiconductor device according to claim 1.