JPH09251964A - Manufacturing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stabilize an impurity ion implantation process in a thin film semiconductor manufacturing process, which is representative of a thin film transistor. SOLUTION: In a process in which impurity ions are implanted so that, with a gate electrode 105 as a mask, P or N-type is given to an active layer 103, regions 106 and 107 are heated in advance by hydrogen ion implantation. By implanting impurity ions in the state that a predetermined heating is finished, a source region 108 and a drain region 110 are made to be conductive in self- conformity manner. With this, the activation ratio of impurity ions to be implanted is raised, and, the damage of a semiconductor layer due to the impact of impurity ions is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The invention disclosed in this specification relates to a technique of implanting impurity ions in a manufacturing process of a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, a technique for forming a thin film transistor on a glass substrate or a quartz substrate has been known. FIG. 8 shows a manufacturing process of a general thin film transistor.

First, as shown in FIG. 8A, a glass substrate 1
A silicon oxide film 12 is formed on the substrate 1 as a base film. Further, an amorphous silicon film (not shown) is formed by a plasma CVD method or the like. By further applying heat treatment, the amorphous silicon film is crystallized and a crystalline silicon film is obtained. Then, by patterning this crystalline silicon film, the active layer of the thin film transistor indicated by 13 is formed. (FIG. 8
(A))

Next, as shown in FIG. 8B, a silicon oxide film 14 functioning as a gate insulating film is formed. Further, the gate electrode 15 is formed using a silicide material or a metal material such as aluminum.

After obtaining the state shown in FIG. 8B, impurity ions are implanted. If an N-channel type thin film transistor is to be formed, phosphorus ions are implanted here. (FIG. 8
(C))

In this step, impurity ions are implanted in the regions 16 and 18. In addition, since the gate electrode 15 serves as a mask, impurity ions are not implanted in the region 17.

By the step of implanting the impurity ions, the source region 16, the channel forming region 17, and the drain region 1 are formed.
8 are formed in a self-aligned manner.

Thereafter, as shown in (D), the interlayer insulating film 19 is formed.
As a film, a silicon oxide film or the like is formed. Then, contact holes are formed, and the source electrode 20 and the drain electrode 21 are formed.
To form These electrodes are composed of aluminum or a suitable metal silicide.

[0009]

In the process of manufacturing a thin film transistor as described above, it has been found that the step of implanting impurity ions shown in FIG. 8C is important. That is, it has been found that the characteristics of the obtained thin film transistor are significantly affected by the step of implanting the impurity ions shown in FIG.

Experiments conducted by the present inventors have revealed that it is effective to preheat the sample before implanting the impurity ions.

Generally, the impurity ion implantation target is naturally heated by the energy of the impurity ions. However, what is important here is that preheating is performed in advance when the impurity ions are implanted.

That is, it is important to preheat the sample prior to the implantation of impurity ions as shown in (C).
Specifically, it is possible to stabilize the impurity ion implantation process and obtain high reproducibility.

In a manufacturing process of an active matrix type liquid crystal display device having a large area which is being developed in recent years, the sample size (substrate size) is 300 mm × 4.
There is a tendency for the size to increase to 100 mm or more.

It is generally difficult to heat the whole of such a large sample with good uniformity. In a special case, it is possible to improve the uniformity of heating by using a special heating means, but this leads to a complicated device and a high cost.

Further, it is very difficult to provide a means for heating the entire sample having a large area with good uniformity inside the apparatus for implanting ions, because of problems of cost and maintenance. Specifically, a resistance heating means (heater) having a complicated shape and its control system are required. Arranging such a structure inside an apparatus for implanting ions having an airtight structure makes maintenance extremely difficult.

The above-mentioned non-uniformity of heating causes in-plane variations in the effect of implanting impurity ions. This in-plane variation in the effect of implanting impurity ions causes unevenness in display and unclearness in display in the case of an active matrix liquid crystal display device.

An object of the invention disclosed in this specification is to solve the problem of non-uniformity of heating which is carried out in advance when implanting the impurity ions. It is another object of the present invention to provide a technique that solves the problem of heating non-uniformity and at the same time does not cause the device to be complicated and the manufacturing cost to be increased.

[0018]

The invention disclosed in this specification is characterized by implanting hydrogen ions before implanting impurity ions to preheat a sample. By performing the heating by implanting the hydrogen ions, the entire sample can be heated with high uniformity.

As a secondary effect, by implanting hydrogen ions, the implanted hydrogen atoms can be used as a hydrogen supply source for hydrogenation in the hydrogenation heat treatment in the final step. , Effective hydrogenation can be performed.

Data showing that the sample is heated by implanting hydrogen ions is shown in FIG. FIG. 2 shows the temperature of the sample when hydrogen ions are implanted into the sample in a state before implanting impurity ions to form the source and drain regions.

As is apparent from FIG. 2, by implanting hydrogen ions, the temperature of the sample rises in proportion to the dose amount.

By using this method, even if the sample has a large area, heating can be performed with high uniformity over the entire surface.

It is important that the heating by the implantation of hydrogen ions is performed in advance before the implantation of impurity ions. By heating the sample in advance before implanting the impurity ions, the effect of implanting the impurity ions and its reproducibility can be enhanced.

Further, it is possible to reduce the energy required for annealing the implanted region and activating the implanted impurities, which is required after the implantation of the impurity ions. Specifically, if the heat treatment is performed after the implantation of the impurity ions, the heating temperature can be lowered. Further, if the annealing by the irradiation of the laser light is performed after the implantation of the impurity ions, the irradiation energy density and the irradiation frequency can be reduced.

Such an effect enhances the reproducibility of the process,
In addition, the burden on a device used in a manufacturing process (a semiconductor device manufacturing apparatus) is reduced, and further, the occurrence of process defects is significantly reduced.

Other than hydrogen ions, ions of an element selected from helium, argon and halogen elements can be used. It is necessary to use, as the implanted ions for heating, those ions that are combined with the semiconductor material and do not impair the semiconductor characteristics.

For example, when silicon is used as the semiconductor material, nitrogen or oxygen cannot be used as the implantation ions for heating. This is because silicon nitride and silicon oxide are formed.

[0028] One of the inventions disclosed in this specification is to implant impurity ions for deteriorating the semiconductor material and preheat the semiconductor material by implanting hydrogen ions before implanting the impurity ions. It is characterized by

Specific examples of modifying the semiconductor material by implanting impurity ions include implanting an impurity imparting P or N type to an application or substantially intrinsic semiconductor material. Further, a case where an impurity imparting N or P type is injected into a semiconductor material having P or N type and the conductivity type is inverted can be given.

Another structure of the invention is a method of implanting impurity ions imparting one conductivity type into a non-single-crystal silicon thin film formed on a substrate having an insulating surface, before implanting the impurity ions. It is characterized in that the non-single-crystal silicon thin film is heated in advance by implantation of hydrogen ions.

By heating the non-single-crystal silicon film in advance by implanting hydrogen ions, it is possible to increase the activation rate of impurity ions implanted later. Further, the effect of implanting the impurity ions can be obtained with high reproducibility.

Generally, in the case of a non-single crystal silicon film, many levels due to defects are formed in the film. Here, by implanting hydrogen ions, it is possible to obtain an effect of annealing defects by hydrogen later.

As the non-single crystal silicon thin film, a crystalline silicon film obtained by using a silicon film generally formed by a sputtering method or a vapor phase method as a starting film can be mentioned. These crystalline silicon films are generally called a microcrystalline silicon film or a polycrystalline silicon film.

The heating of the sample by implantation of hydrogen ions is preferably performed at 250 ° C. or higher. The specific dose of hydrogen ions is 2 × 10 ¹⁶ ions
/ Cm ² or more is preferable.

The basis for this limited range of dose is obtained from the data shown in FIG. FIG. 3 shows that the OFF current value drastically decreases when the dose of hydrogen ions is set to 3 × 10 ¹⁶ ions / cm ² or more.

From FIG. 3, the hydrogen ion dose meter 2 ×
It is concluded that the OFF current value can be reduced by setting 10 ¹⁶ ions / cm ² or more.

Further, in FIG. 2, when hydrogen ions are implanted at a dose of about 2 × 10 ¹⁶ ions / cm ² , the sample is 25
It is shown to be heated to about 0 ° C.

The upper limit of the dose of hydrogen ions is limited by the process time and the performance of the apparatus. Generally 1x
The upper limit is about 10 ¹⁸ ions / cm ² . Generally, the upper limit of the dose amount of hydrogen ions may be determined with the upper limit of the temperature that the sample withstands. For example, when aluminum is used as the gate electrode, the upper limit of the heat resistant temperature is about 450 ° C. This temperature is also limited by the type of substrate used.

[0039]

【Example】

[Embodiment 1] In this embodiment, an example of manufacturing a thin film transistor by utilizing the invention disclosed in this specification will be described.

Although FIG. 1 shows an example in which one thin film transistor is manufactured, in practice, several hundreds × several hundreds or more of thin film transistors are formed on the same substrate having a size of several hundreds mm × several hundreds mm. Made simultaneously on top.

First, as shown in FIG. 1A, a silicon oxide film 3000 is formed as a base film 102 on a glass substrate 101.
The film is formed to a thickness of Å. A sputtering method is used as a method for forming this silicon oxide film.

Next, plasma C is applied to an amorphous silicon film (not shown).
A film is formed to a thickness of 1000 Å by the VD method or the low pressure thermal CVD method. After forming the amorphous silicon film (not shown), the amorphous silicon film (not shown) is crystallized by using heat treatment, laser light irradiation, or a method in which heat treatment and laser light irradiation are used in combination. Thus, a crystalline silicon film (not shown) is obtained.

Next, a crystalline silicon film (not shown) is patterned to form the active layer 103 of the thin film transistor. In this way, the state shown in FIG.

Next, a silicon oxide film functioning as the gate insulating film 104 is formed to a thickness of 1000 Å by the plasma CVD method.

Further, the gate electrode 105 is formed by using an appropriate metal material or silicide material. Thus, the state shown in FIG. 1B is obtained.

After obtaining the state shown in FIG. 1B, the sample is placed in the doping apparatus. Here, hydrogen ions are first implanted by the plasma doping method. Then, phosphorus ions are implanted next.

First, hydrogen gas is introduced into the chamber of the doping apparatus, and hydrogen ions are injected into the sample. The dose amount of hydrogen ions and the heating temperature of the sample have a relationship as shown in FIG.

Here, the heating temperature of the sample is set to about 280 ° C. in consideration of the effect of improving the OFF current characteristics shown in FIG. That is, as shown in FIG. 3, the dose of hydrogen ions is set to 3
× 10 ¹⁶ ions / cm ² .

By performing the hydrogen ion doping in this manner, the sample in the state of FIG. 1C is heated.
This heating uniformly heats the entire sample.

Then, the doping gas is phosphine (P
H ₃ ), and then P ion implantation is performed.
At this time, the sample is naturally heated by the implantation of the implanted phosphorus ions and the hydrogen ions generated by the decomposition of phosphine.

The feature of this embodiment is that the heating by the implantation of hydrogen ions is carried out in advance before the heating carried out at the implantation of the phosphorus ions.

The dose of phosphorus may be determined in consideration of the characteristics required of the thin film transistor.

By performing phosphorus ion doping shown in FIG. 1D, the source region 108 and the channel formation region 1 are formed.
09, the drain region 110 is formed in a self-aligned manner.

If a P-channel type is to be manufactured, B (boron) ions may be implanted in the step shown in FIG.

After the doping of impurity ions shown in FIG. 1D is completed, laser light irradiation is performed. By irradiating this laser beam, the region damaged by the impact of the impurity ions is annealed and the implanted impurity ions are activated. Laser light has a wavelength of 248n
A KrF excimer laser having m may be used.

The annealing by the irradiation of the laser light is
The required effect can be enhanced with lower energy as compared with the conventional method. This is shown in Figure 1 (C).
By implanting the hydrogen ions of the above, the activation rate of the impurity ions can be increased at the time of implanting the impurity ions of FIG. This is because it is possible to reduce

Next, the interlayer insulating film 111 is formed by the plasma CVD method. As the interlayer insulating film 111, a stacked film of a silicon nitride film and a silicon oxide film can be used. Alternatively, a stacked film of a silicon nitride film or a silicon oxide film and a resin film can be used.

After forming the interlayer insulating film 111, a contact hole is formed and a source electrode 112 and a drain electrode 113 are formed. These electrodes are composed of a laminated film of a titanium film, an aluminum film and a titanium film.

Thus, the state shown in FIG. 1 (E) is obtained. After obtaining the state shown in FIG. 1E, heat treatment is performed at 350 ° C. in a 5% hydrogen atmosphere for 1 hour. In this step, the hydrogen ions implanted in the step shown in (C) above are activated and contribute to the annealing of defects existing in the active layer. In addition, hydrogen is diluted with an inert gas (for example, nitrogen) to a predetermined concentration.

Conventionally, the above-mentioned hydrogen heat treatment has been performed in an atmosphere having a high hydrogen concentration of 100% or 50% or more. This is because the effect of hydrogen heat treatment could not be obtained unless such a high concentration was used.

However, in the case of this embodiment, the hydrogen ions implanted in the step shown in FIG. 1C are used in the above hydrogenation step (become a hydrogen supply source), so the hydrogen concentration in the atmosphere should be lowered. You can

As a result, it is possible to avoid raising the atmosphere containing hydrogen at a high concentration to a high temperature of 350 ° C. (or higher). This will be very useful in improving the safety of the process.

Thus, the thin film transistor is completed.
The characteristics of the thin film transistor thus obtained largely depend on the dose amount in the hydrogen ion implantation performed in FIG.

FIG. 3 shows the relationship between the dose of hydrogen ions and the drain current of the completed thin film transistor.

As is apparent from FIG. 3, the value of the OFF current drops significantly when the dose amount of hydrogen ions is set to 3 × 10 ¹⁶ cm ^-3 or more. At this time, the ON current value also decreases, but the ratio is too small.

From FIG. 3, it can be seen that it is effective to reduce the OFF current value by setting the dose amount of hydrogen ions to 2 × 10 ¹⁶ cm ⁻³ or more. Therefore, it is turned off from FIG.
To reduce the current value, the sample is
It is concluded that heating above 50 ° C is effective.

The characteristics of the thin film transistor obtained by the manufacturing process shown in this embodiment are shown in FIGS. 9B and 10B.
Shown in The presence / absence of hydrogen doping in FIGS. 9 and 10 means whether or not the hydrogen ion implantation shown in FIG. 1C was performed.

As is clear from comparison between FIGS. 9A and 9B, in the case of an N-channel thin film transistor, hydrogen ion implantation shown in FIG. It is possible to suppress the variation in the characteristics of, and further improve the OFF current characteristics.

Further, as is clear from comparison between FIGS. 10A and 10B, in the case of a P-channel thin film transistor, by implanting hydrogen ions shown in FIG. 1C, After all, we suppress the variation in the characteristics of each element,
Further, the OFF current characteristic can be improved.

[Embodiment 2] This embodiment relates to an ion implantation apparatus used in the invention disclosed in this specification.
FIG. 4 shows an outline of an apparatus for performing ion implantation. This apparatus has a type called a plasma doping apparatus.

The plasma doping apparatus shown in FIG. 4 comprises a housing 215 having airtightness. The equipment includes
An exhaust system 218 for arranging the required reduced pressure state is arranged.

The doping is carried out by ionizing the doping gas by high frequency energy and electrically accelerating the ionized ions to inject them into the sample.

The doping gas introduced from the gas introduction system 200 is uniformly emitted to the regions of the gas emission ports 206 to 207 and ionized there.

In the region 207, a pair of electrodes 206 and 2
A high-frequency discharge is performed between the two and the doping gas is decomposed and ionized. This high-frequency discharge is generated by the high-frequency power source 211 from the impedance matching device 21.
It is performed by the high frequency power supplied via 0.

The ionized dopant ions are extracted to the acceleration region 220 by the extraction electrode 202.
Then, the dopant ions extracted to the acceleration region 220 by the extraction electrode 202 are accelerated by the acceleration electrode 203. Further, the injection energy (acceleration voltage) required for the deceleration electrode 208 is adjusted.

The potential of each electrode is set with reference to the electrode indicated by 209.

The dopant ions accelerated in the acceleration region 220 are implanted into the sample 216 with a predetermined acceleration voltage. The stage 217 on which the sample 216 is placed has a rotating mechanism in order to improve the uniformity of injection.

Reference numeral 219 is an ammeter for measuring the ion current. The amount of ions injected into the sample 216 can be measured based on the ion current measured by the ammeter 219.

In the apparatus shown in FIG. 4, reference numeral 212 is a power supply for applying a drawing voltage. Also, 2
Reference numeral 13 is a power source for applying a deceleration voltage. Reference numeral 214 is a power supply for applying an acceleration voltage.

In order to carry out the invention disclosed in this specification using the apparatus shown in FIG. 4, hydrogen is first introduced as a doping gas from the gas introduction system 200, and hydrogen ions are implanted into the sample 216. .

By this hydrogen ion implantation, the sample is preheated to a predetermined temperature. Next, switch the doping gas to a gas containing the specified dopant (phosphorus or boron),
Doping with a predetermined dopant is performed.

The gas containing the predetermined dopant is
It is usually diluted with hydrogen gas to the required concentration.

A heating means may be arranged in the stage 217 to promote heating by implantation of hydrogen ions. That is, the uniformity of heating may be maintained by implanting hydrogen ions, and the heating means in the stage 217 may be used supplementarily.

[Embodiment 3] This embodiment is an example in which the annealing after the implantation of the impurity ions shown in (D) is performed by a heat treatment in the manufacturing process of the thin film transistor shown in FIG. Generally, when the annealing after the impurity ions is performed by a heat treatment, the heating temperature is required to be 800 ° C. or 900 ° C. or higher in order to obtain a predetermined annealing effect.

However, when preheating is performed by implanting hydrogen ions as shown in FIG. 1C, the activation rate of the impurity ions implanted in the semiconductor layer is high, and the semiconductor layer is not damaged by the implanting of the impurity ions. Since it is mitigated, the heating temperature of the annealing required after the above-mentioned impurity ion implantation can be lowered.

For example, in the case of manufacturing a thin film transistor using a crystalline silicon film as shown in FIG.
The temperature of the heat treatment performed after the step can be set to approximately 450 ° C to 600 ° C.

[Embodiment 4] In this embodiment, a process of manufacturing P-channel and N-channel thin film transistors at the same time by utilizing the invention disclosed in this specification will be described.
The manufacturing process of this embodiment is shown in FIG.

First, as shown in FIG. 5A, an oxide silicified film is formed as a base film 502 on a glass substrate 501 by a sputtering method to a thickness of 3000 Å. Next, an amorphous silicon film (not shown) is formed by plasma CVD or low pressure thermal CVD.
Method to form a film with a thickness of 500Å.

Then, the amorphous silicon film is crystallized by performing heat treatment and laser light irradiation to obtain a crystalline silicon film (not shown). Further, by patterning this crystalline silicon film, an active layer 503 of a P-channel type thin film transistor and an active layer 504 of an N-channel type thin film transistor are formed.

After forming the active layer, a gate insulating film 505 is formed so as to cover the active layer. Here, as the gate insulating film 505, a silicon oxide film is formed to a thickness of 1000 Å by the plasma CVD method.

Further, in order to form a gate electrode, an aluminum film (not shown) is formed by sputtering to a thickness of 5000 Å. This aluminum film contains 0.1% by weight of scandium in order to suppress abnormal growth of aluminum. Then, an anodic oxide film having an extremely thin and dense film quality is formed on the surface of the aluminum film (not shown). (This anodized film is shown at 507 and 508)

This anodic oxidation process is carried out by using an ethylene glycol solution containing 3% tartaric acid neutralized with aqueous ammonia as an electrolytic solution. During this electrolysis, anodization is performed using the aluminum film as the anode and platinum as the cathode. The thickness of the anodic oxide film formed here can be controlled by the applied voltage.

This anodic oxide film functions to enhance the adhesiveness of the resist mask formed later.

Next, resist masks 509 and 510 are arranged, and patterns 506 and 500 made of aluminum are formed. (FIG. 5 (A))

In FIG. 5 (A), reference numerals 507 and 508 are the anodic oxide films formed previously and having an extremely thin and dense film quality.

After obtaining the state shown in FIG. 5A, anodization is performed again. In this step, a 3% oxalic acid aqueous solution is used as the electrolytic solution. The electrolytic solution formed in this step is porous (porous).

This porous anodic oxide film is formed on the side surface of the aluminum pattern as indicated by 511 and 512 due to the presence of dense anodic oxide films 507 and 508 and resist masks 509 and 510. .

As a result, a porous anodic oxide film 511 is formed on the side surface of the aluminum pattern 513. A porous anodic oxide film 512 is formed on the side surface of the aluminum pattern 514.

The porous anodic oxide films 511 and 512
Has a thickness of 5000Å. The thickness of the porous anodic oxide film can be controlled by the anodic oxidation time.

Here, the aluminum pattern 513 serves as the gate electrode of the P-channel type thin film transistor. The aluminum pattern 514 serves as a gate electrode of the N-channel type thin film transistor.

Thus, the state shown in FIG. 5B is obtained. Next, the resist masks 509 and 510 are removed with a dedicated stripping solution. Thus, the state shown in FIG. 5C is obtained.

Next, the anodic oxide film is formed again under the condition that the anodic oxide film having a dense film quality is formed. In this step, since the electrolytic solution penetrates into the porous anodic oxide films 511 and 512, 515 and 51 in FIG.
As shown by 6, an anodic oxide film having a dense film quality is formed. That is, dense anodic oxide films 505 and 516 are formed so as to cover the gate electrodes 513 and 514.

The anodic oxide films 515 and 516 are integrated with the first dense anodic oxide films 507 and 508.
The film thickness of the anodic oxide films 515 and 516 is 1000 Å. The control of the film thickness of the anodic oxide film having this dense film quality can be performed by controlling the applied voltage during anodic oxidation.

When the state shown in FIG. 5D is obtained, P is applied to the entire surface.
(Phosphorus) ion is implanted. In this process, 51
P ions are implanted in the regions indicated by 7 and 519, 520 and 522. (FIG. 5E)

In this step, hydrogen ions are implanted before implanting P ions, and the sample is heated in advance. Then, while the sample is heated, the doping gas is switched and P ions are implanted.

Then, the porous anodic oxide films 511 and 512 are removed using a mixed acid obtained by mixing acetic acid, phosphoric acid and oxalic acid. Thus, the state shown in FIG. 6A is obtained.

Next, P ions are implanted again under the condition of light doping rather than the doping shown in FIG. 5 (E).
In this step as well, preheating by implanting hydrogen ions is performed in advance. (Fig. 6 (B))

This P ion implantation step results in 523
And 525, and regions 526 and 528 are weak N type regions (low concentration impurity regions) represented by N ⁻ type. Further, the regions 524 and 527 are not implanted with P ions I
It becomes the area of the mold. Note that the region 524 serves as a channel formation region of a P-channel thin film transistor. Also 52
The region 7 serves as a channel formation region of the N-channel thin film transistor. (Fig. 6 (B))

Next, a region to be an N-channel thin film transistor is covered with a resist mask 529. Then, B (boron) ions are implanted. In this step, B ions are implanted with a dose amount that inverts the N-type region obtained by previously implanting P ions. (Fig. 6 (C))

Also in this step, preheating is performed by implanting hydrogen ions before implanting B ions. After preheating by hydrogen ion implantation, the gas is replaced with diborane (B ₂ H
Change to ₆ ) and implant B ions.

As a result of this B ion implantation step, the P-type region 530, the regions 531 and 533 having a P-type stronger than the region 530, and the region 534 having a P-type having the same degree as that of the region 530 are self-aligned. It is formed. In addition, the region indicated by 532 which becomes the channel formation region is formed in a self-aligned manner.

Thus, a prototype of the left P-channel thin film transistor and the right N-channel thin film transistor is formed.

When the implantation of B ions shown in FIG. 6C is completed, the resist mask 529 is removed, and the state shown in FIG. 7A is obtained. Then, laser light irradiation is performed to anneal the region damaged by the implantation of the impurity ions and activate the implanted impurity ions.

Next, as the interlayer insulating film 535, a laminated film of a silicon nitride film and a silicon oxide film is formed by the plasma CVD method. Thus, the state shown in FIG. 7B is obtained.

Then, a contact hole is formed, and the source electrode 53 of the P-channel type thin film transistor is formed by a laminated film of a titanium film, an aluminum film and a titanium film.
6 and the drain electrode 527 are formed. At the same time, a source electrode 539 and a drain electrode 528 of the N-channel thin film transistor are formed. (FIG. 7 (C))

Here, by connecting the drain electrode 537 of the P-channel thin film transistor and the drain electrode 538 of the N-channel thin film transistor, a complementary type CMOS circuit can be obtained.

In the structure shown in FIG. 7C, the low concentration impurity regions 526 and 52 are formed only in the N-channel type thin film transistor.
8 are formed. Here, the low concentration impurity region 526 on the drain region 520 side is generally referred to as an LDD (lightly doped drain) region.

By arranging this LDD region, the effects of reducing the OFF current value, suppressing deterioration due to hot carriers, and lowering the mobility can be obtained.

In general, between an N-channel type thin film transistor and a P-channel type thin film transistor, deterioration of the N-channel type thin film transistor is large and mobility is large.

By adopting the structure shown in this embodiment, it is possible to suppress the deterioration of the N-channel type thin film transistor and further reduce its mobility. On the other hand, in the P-channel type thin film transistor, since the low concentration impurity region is not arranged, the mobility does not decrease. Therefore, as a whole, it is possible to correct the variation in the characteristics of the P-channel type and N-channel type thin film transistors.

[0121]

EFFECTS OF THE INVENTION By utilizing the invention disclosed in this specification, heating at the time of implanting impurity ions can be performed uniformly over a large area. Further, this heating does not need to make the apparatus complicated and the process complicated since only the gas is switched at the time of implanting the impurity ions.

That is, it is possible to perform the impurity ion implantation with high uniformity over a large area and with high reproducibility while suppressing an increase in cost.

[Brief description of drawings]

FIG. 1 illustrates a manufacturing process of a thin film transistor.

FIG. 2 is a diagram showing a relationship between a dose amount of hydrogen ions and a heating temperature of a sample.

FIG. 3 is a diagram showing a relationship between a dose amount of hydrogen ions and a drain current.

FIG. 4 is a diagram showing an outline of an apparatus for performing ion implantation.

5A to 5C are diagrams illustrating a manufacturing process of a thin film transistor.

6A to 6C are diagrams illustrating a manufacturing process of a thin film transistor.

FIG. 7 illustrates a manufacturing process of a thin film transistor.

FIG. 8 is a diagram showing a conventional manufacturing process of a thin film transistor.

FIG. 9 is a graph showing characteristics of a thin film transistor.

FIG. 10 is a graph showing characteristics of a thin film transistor.

[Explanation of symbols]

101 Glass Substrate 102 Base Film (Silicon Oxide Film) 103 Active Layer (Crystalline Silicon Film) 104 Gate Insulating Film (Silicon Oxide Film) 105 Gate Electrodes 106 and 107 Regions Heated by Hydrogen Ion Implantation 108 Drain Regions 109 Channel Formation Region 110 Drain region 111 Interlayer insulating film 112 Source electrode 113 Drain electrode 501 Glass substrate 502 Base film (silicon oxide film) 503 P-channel thin film transistor active layer (crystalline silicon film) 504 P-channel thin film transistor active layer ( (Crystalline silicon film) 505 Gate insulating film 506, 500 Aluminum pattern forming gate electrode 507, 508 Anodized film having a dense film quality 509, 510 Resist mask 511, 512 Porous anodized film 513 P-channel type Thin film Gate electrode of transistor 514 Gate electrode of N-channel thin film transistor 515, 516 Dense anodic oxide film 517 N-type impurity region 518 Region where P ions were not implanted 519 N-type impurity region 520 N-type impurity region (drain region) 521 P-ion-implanted region 522 N-type impurity region (source region) 523, 525 Low-concentration impurity region 526, 528 Low-concentration impurity region 524 P-channel thin film transistor channel formation region 527 N-channel thin film transistor channel formation Region 529 Resist mask 530, 531 Source region 532 Channel formation region 533, 534 Drain region 535 Resist mask 536 Source electrode 537 Drain electrode 539 Source electrode 538 Drain electrode

Claims (6)

[Claims] 1. A method for manufacturing a semiconductor device, wherein in the step of implanting impurity ions for modifying a semiconductor material, the semiconductor material is heated in advance by implanting hydrogen ions before the impurity ions are implanted. . 2. In the step of implanting impurity ions for altering the semiconductor material, helium, argon, and
A method for manufacturing a semiconductor device, which comprises heating a semiconductor material by implanting ions of an element selected from halogen elements. 3. A method for manufacturing a semiconductor device according to claim 1, wherein N or P type is imparted to the semiconductor material by implanting impurity ions. 4. A method of implanting impurity ions imparting one conductivity type to a non-single-crystal silicon thin film formed on a substrate having an insulating surface, wherein hydrogen ions are implanted in advance before implanting the impurity ions. A method for manufacturing a semiconductor device, which comprises heating a non-single crystal silicon thin film by implantation. 5. The method for manufacturing a semiconductor device according to claim 4, wherein the non-single crystal silicon thin film is heated to a temperature of 250 ° C. or higher by implanting hydrogen ions. 6. The method according to claim 4, wherein the hydrogen ions are 2 × 10.
^A method for manufacturing a semiconductor device, which comprises implanting with a dose amount of ¹⁶ cm ^-2 or more.