JPH09248719A - Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor - Google Patents

Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor

Info

Publication number
JPH09248719A
JPH09248719A JP5433896A JP5433896A JPH09248719A JP H09248719 A JPH09248719 A JP H09248719A JP 5433896 A JP5433896 A JP 5433896A JP 5433896 A JP5433896 A JP 5433896A JP H09248719 A JPH09248719 A JP H09248719A
Authority
JP
Japan
Prior art keywords
wire electrode
semiconductor ingot
wire
cutting
ingot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5433896A
Other languages
Japanese (ja)
Inventor
Hitoshi Misaka
仁 三阪
Yasuyoshi Kuroda
泰嘉 黒田
Fumihiko Hasegawa
文彦 長谷川
Shoji Futamura
昭二 二村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute of Technology Precision Electrical Discharge Works
Shin Etsu Handotai Co Ltd
Original Assignee
Institute of Technology Precision Electrical Discharge Works
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Technology Precision Electrical Discharge Works, Shin Etsu Handotai Co Ltd filed Critical Institute of Technology Precision Electrical Discharge Works
Priority to JP5433896A priority Critical patent/JPH09248719A/en
Publication of JPH09248719A publication Critical patent/JPH09248719A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce a cutting margin to reduce the cutting time by applying a voltage between each wire and a semiconductor ingot for every wire of wire electrode to thereby generate electric discharge, resulting in cutting of the ingot into several pieces. SOLUTION: A wire electrode 9 is wound around between a guide roller 4, 5 through an aligning roller 13 and moves along a guide groove in order to reach a take-up reel 14, and a plurality of wires of wire electrode 9 are formed in parallel between the roller 4, 5. A d.c. power source voltage is applied between each wire of the electrode 9 and a semiconductor ingot 7, then the ingot 7 mounted on a work table 6 is raised, and the ingot 7 is cut into several pieces with a specified thickness by electric discharge machining.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、例えばエピタキシ
ャル・ウエハ用単結晶シリコンのような半導体インゴッ
トから薄肉寸法のウエハを製造する場合の、半導体イン
ゴットの切断方法およびその装置に関するものであり、
特にワイヤ電極との間の放電によって切断を行うエピタ
キシャル・ウエハ用半導体インゴットおよびその装置に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for cutting a semiconductor ingot and a device therefor when a thin wafer is manufactured from a semiconductor ingot such as single crystal silicon for an epitaxial wafer.
In particular, the present invention relates to a semiconductor ingot for an epitaxial wafer which is cut by electric discharge between the wire electrode and the device, and a device therefor.

【0002】[0002]

【従来の技術】従来、例えばエピタキシャル・ウエハ用
単結晶シリコンのようなインゴットからLSI用シリコ
ンウエハを切り出す場合には、例えば高純度の多結晶シ
リコンを石英るつぼ中で溶融し、これに種子結晶をつ
け、例えばチュクラルスキー法により、種子結晶とるつ
ぼとを相互に逆方向に回転して引き上げたインゴット
に、外径研削とオリエンテーションフラットを加工した
後、内周スライサによって所定の厚さ寸法のウエハを切
り出す方法が最も一般的である。
2. Description of the Related Art Conventionally, when a silicon wafer for LSI is cut out from an ingot such as single crystal silicon for epitaxial wafer, for example, high-purity polycrystalline silicon is melted in a quartz crucible and seed crystals are added thereto. For example, by the Czochralski method, the seed crystal and the crucible were rotated in opposite directions and pulled up, and then the outer diameter was ground and the orientation flat was processed. The most common method is to cut out.

【0003】上記内周スライサは、例えば厚さ300〜
350μmの中空円板状のステンレス鋼製のブレードか
らなり、このブレードの内周にダイヤモンド砥粒の電着
層が形成されている。そしてブレードの外周に張力を付
与し、剛性を高めた状態で回転させ、研削加工により前
記インゴットの切断を行うのである。
The inner peripheral slicer has a thickness of 300 to 300, for example.
The blade is made of a hollow disc-shaped stainless steel blade having a diameter of 350 μm, and an electrodeposition layer of diamond abrasive grains is formed on the inner circumference of the blade. Then, tension is applied to the outer circumference of the blade to rotate the blade with increased rigidity, and the ingot is cut by grinding.

【0004】一方、近年においては、ワイヤガイドロー
ラ間に巻回した多数本のワイヤをインゴットに押し付
け、ワイヤを往復運動させながら研磨剤または砥粒を供
給し、研磨加工により一度に多数枚を切断するワイヤソ
ー加工技術が注目されている(例えば精密工学会誌 Vo
l.60, No.2, 1994, P.182〜187 参照)。
On the other hand, in recent years, a large number of wires wound between wire guide rollers are pressed against an ingot, abrasives or abrasive grains are supplied while reciprocating the wires, and a large number are cut at a time by polishing. Wire saw processing technology has attracted attention (for example, Journal of Precision Engineering Vo
l.60, No.2, 1994, P.182-187).

【0005】[0005]

【発明が解決しようとする課題】上記内周スライサによ
る半導体インゴットの切断方法においては、ウエハを1
枚宛切断するものであるため、能率が低いと共に、ブレ
ードの内周によって切断するため、近年大口径化(例え
ば12in以上)の傾向がある半導体インゴットには対
応できないという問題点がある。この理由は、上記の寸
法以上の内径を有するブレードの生産ができないことに
起因している。
In the method of cutting a semiconductor ingot by the above inner peripheral slicer, a wafer is cut into 1 pieces.
Since the cutting is performed for individual sheets, there is a problem that the efficiency is low, and since the cutting is performed by the inner circumference of the blade, it cannot be applied to a semiconductor ingot which has a tendency to have a large diameter (for example, 12 inches or more) in recent years. The reason for this is that it is impossible to produce a blade having an inner diameter larger than the above size.

【0006】また内周スライサのブレードの厚さ寸法に
相当する半導体インゴットの部分は、いわゆる切り屑と
して消失するため、ブレードの厚さ寸法を極力小寸法に
形成する必要がある。しかしながらブレードの厚さ寸法
を前記の寸法以下に形成することは、ブレードの強度上
の理由から殆ど不可能である。このためウエハ製造のた
めの材料歩留が著しく低下すると共に、製作コストが高
騰せざるを得ないという問題点がある。
Further, the portion of the semiconductor ingot corresponding to the thickness dimension of the blade of the inner peripheral slicer disappears as so-called chips, so that the thickness dimension of the blade must be made as small as possible. However, it is almost impossible to form the thickness of the blade to be smaller than the above-mentioned size because of the strength of the blade. For this reason, there are problems that the material yield for wafer manufacturing is significantly reduced and the manufacturing cost is inevitably increased.

【0007】一方前記ワイヤソーによる切断方法におい
ては、前記内周スライサによるものと比較して切断幅
を、例えば100〜250μm程度に小にすることがで
き、材料歩留を向上させ得る利点がある。しかしながら
切断に要する時間が長く、研磨剤または砥粒と切り屑と
が混在するスラリーの処理が煩雑である等の問題点があ
る。
On the other hand, the cutting method using the wire saw has an advantage that the cutting width can be reduced to, for example, about 100 to 250 μm as compared with the cutting method using the inner peripheral slicer, and the material yield can be improved. However, there are problems such that the time required for cutting is long and the processing of a slurry in which abrasives or abrasive grains and chips are mixed is complicated.

【0008】またワイヤが加工中に断線することがあ
り、このような場合には復旧までに比較的長時間を要す
ると共に、砥粒費やワイヤ費などのランニングコストの
点においては、前記内周スライサと比較して割高である
という問題点がある。更にオフアングル・カットの精度
が十分でないという問題点もある。
Further, the wire may be broken during processing, and in such a case, it takes a relatively long time to recover, and in terms of running cost such as abrasive grain cost and wire cost, the inner circumference is There is a problem that it is more expensive than a slicer. Further, there is a problem that the accuracy of off-angle cutting is not sufficient.

【0009】なお前記内周スライサおよびワイヤソーの
何れにおいても、切断は研削または研磨(ラップ)によ
る機械的な加工原理に基づくものであり、近年における
大口径化が著しい半導体インゴットの切断に際しては、
切断作業に要するエネルギーが大きくなるという問題点
がある。
In both the inner peripheral slicer and the wire saw, the cutting is based on the mechanical processing principle by grinding or polishing (lap). When cutting a semiconductor ingot, which has a remarkable increase in diameter in recent years,
There is a problem that the energy required for cutting work becomes large.

【0010】本発明は、上記従来技術に存在する問題点
を解決し、切り代が小であると共に、切断に要するエネ
ルギーも小であり、切断時間も速く材料歩留が高く、か
つ切断コストを低減させ得るエピタキシャル・ウエハ用
半導体インゴットの切断方法およびその装置を提供する
ことを課題とする。
The present invention solves the above-mentioned problems existing in the prior art, has a small cutting margin, a small energy required for cutting, a short cutting time, a high material yield, and a cutting cost. An object of the present invention is to provide a semiconductor ingot cutting method for an epitaxial wafer and a device therefor which can be reduced.

【0011】[0011]

【課題を解決するための手段】上記の課題を解決するた
めに、まず第1の発明においては、支持部材間にワイヤ
電極を長手方向走行可能に張設支持し、これら支持部材
間において張設支持されるワイヤ電極が複数条存在する
ように構成すると共に、前記ワイヤ電極の走行方向と直
交する方向に半導体インゴットを相対移動させ、前記ワ
イヤ電極の各条毎に当該各条と半導体インゴットとの間
に電圧を印加し放電を発生させて前記半導体インゴット
を同時に3個以上の複数個に切断する、という技術的手
段を採用した。
In order to solve the above-mentioned problems, in the first aspect of the invention, first, a wire electrode is stretched and supported between support members so as to be capable of running in the longitudinal direction, and the wire electrodes are stretched between these support members. The wire electrode to be supported is configured such that there are a plurality of strips, the semiconductor ingot is relatively moved in a direction orthogonal to the traveling direction of the wire electrode, and each strip and the semiconductor ingot for each strip of the wire electrode. A technical means is adopted in which a voltage is applied between them to generate a discharge and simultaneously cut the semiconductor ingot into three or more pieces.

【0012】次に第2の発明においては、複数個のガイ
ドローラを軸線を平行に所定間隔を介して回転可能に配
設すると共に、これらのガイドローラ間にワイヤ電極を
巻掛けて複数条のワイヤ電極が長手方向走行可能に形成
し、前記ガイドローラ間において半導体インゴットを前
記ワイヤ電極の走行方向と直交する方向に移動可能に形
成した加工テーブルを設け、放電用電源と電気的に接続
されてなる通電部材を前記ワイヤ電極の各条と接触する
ように設け、前記ワイヤ電極の各条と半導体インゴット
との間に電圧を印加し放電を発生させて切断する、とい
う技術的手段を採用した。
Next, in a second aspect of the invention, a plurality of guide rollers are rotatably arranged parallel to each other along an axis line at a predetermined interval, and a wire electrode is wound between these guide rollers to form a plurality of strips. A wire electrode is formed so that it can travel in the longitudinal direction, and a processing table is provided in which the semiconductor ingot is movable between the guide rollers in a direction orthogonal to the running direction of the wire electrode, and is electrically connected to a discharge power source. The present invention employs a technical means in which a current-carrying member is provided so as to be in contact with each strip of the wire electrode, and a voltage is applied between each strip of the wire electrode and the semiconductor ingot to generate a discharge and cut.

【0013】上記第2の発明において、ガイドローラの
外周に複数個のガイド溝を設け、ワイヤ電極を供給リー
ルから前記ガイド溝を順次移動して巻取リールに至るま
で連続するように、かつ前記ガイドローラ間において複
数条が夫々平行するように巻掛けた構成とすることがで
きる。
In the second aspect of the invention, a plurality of guide grooves are provided on the outer circumference of the guide roller so that the wire electrode is continuously moved from the supply reel to the take-up reel by sequentially moving through the guide groove. A plurality of threads may be wound in parallel between the guide rollers.

【0014】またこの場合において、連続するワイヤ電
極を複数組平行させて夫々ガイドローラ間に巻掛けると
共に、夫々連続するワイヤ電極の組毎に電気的に絶縁さ
れた構成とすることができる。
Further, in this case, a plurality of sets of continuous wire electrodes may be arranged in parallel and wound around the respective guide rollers, and each set of continuous wire electrodes may be electrically insulated.

【0015】更に上記の発明において、ワイヤ電極の走
行方向において半導体インゴットの直前および直後に通
電部材を設けた構成とすることができる。上記の構成に
より、ワイヤ電極と被加工体である半導体インゴットと
の間に電圧を印加することによる放電現象により、半導
体インゴットの切断を行うことができる。すなわち、放
電に伴う電子の流れにより、半導体インゴットの切断対
象部位の発熱、溶融および加工液の急激な気化、膨張に
よる溶融部分の飛散を、印加電圧の1パルス毎に繰り返
すことによって切断が進行するのである。
Further, in the above invention, the current-carrying member may be provided immediately before and immediately after the semiconductor ingot in the traveling direction of the wire electrode. With the above configuration, the semiconductor ingot can be cut by the discharge phenomenon caused by applying a voltage between the wire electrode and the semiconductor ingot that is the workpiece. That is, the cutting proceeds by repeating the heat generation of the cutting target portion of the semiconductor ingot, the rapid vaporization of the working liquid, and the rapid vaporization of the working liquid, and the scattering of the melting portion due to the expansion due to the flow of electrons accompanying the discharge for each pulse of the applied voltage. Of.

【0016】これにより、切断に要する電気エネルギー
が小であり、切断対象部位は加工液によって冷却される
ため、半導体インゴットに非所望な熱的変質を与えるこ
となく、容易に切断を行い得るのである。
As a result, the electric energy required for cutting is small and the portion to be cut is cooled by the working liquid, so that the semiconductor ingot can be easily cut without causing undesired thermal alteration. .

【0017】[0017]

【発明の実施の形態】図1は本発明の実施の形態におけ
る装置を示す要部斜視図である。図1において、1はベ
ースであり、床面に設置されると共に、このベース1の
一方の端部にはコラム2が立設されている。次に3はワ
イヤ電極支持装置であり、コラム2の側面に設けられ、
2個のガイドローラ4,5を各々軸線を平行に、かつ所
定間隔を介して回転可能に支持するように形成されてい
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a main part perspective view showing an apparatus according to an embodiment of the present invention. In FIG. 1, reference numeral 1 is a base, which is installed on the floor surface, and a column 2 is erected on one end of the base 1. Next, 3 is a wire electrode supporting device, which is provided on the side surface of the column 2,
The two guide rollers 4 and 5 are formed so as to rotatably support the axes parallel to each other and at a predetermined interval.

【0018】6は加工テーブルであり、前記ワイヤ電極
支持装置3の下方に設けられ、コラム2の側面に沿って
上下方向(Z方向)および水平方向(X方向)に移動可
能に構成されている。7は半導体インゴットであり、加
工テーブル6上に適宜の支持治具を介して着脱可能に取
り付けられている。8は加工液槽であり、半導体インゴ
ット7を包囲するように加工テーブル6上に設けられ
る。
A working table 6 is provided below the wire electrode supporting device 3 and is movable along the side surface of the column 2 in the vertical direction (Z direction) and the horizontal direction (X direction). . Reference numeral 7 denotes a semiconductor ingot, which is detachably attached to the processing table 6 via an appropriate supporting jig. Reference numeral 8 denotes a processing liquid tank, which is provided on the processing table 6 so as to surround the semiconductor ingot 7.

【0019】次に9はワイヤ電極であり、コラム2に設
けられた複数個の供給リール10から、中間ローラ1
1、整列ローラ12,13を介して前記ガイドローラ
4,5間に複数回巻掛けられ、コラム2内を経て巻取リ
ール14に至るように配設されている。この場合、ガイ
ドローラ4を駆動ローラ、ガイドローラ5を従動ローラ
とする。
Next, 9 is a wire electrode, which comprises a plurality of supply reels 10 provided on the column 2 and an intermediate roller 1
1, the guide rollers 4 and 5 are wound around the guide rollers 4 and 5 through the alignment rollers 12 and 13 so as to reach the take-up reel 14 through the column 2. In this case, the guide roller 4 is a driving roller and the guide roller 5 is a driven roller.

【0020】図2は図1におけるワイヤ電極支持装置3
およびワイヤ電極9の走行経路を示す要部構成説明図で
あり、同一部分は前記図1と同一の参照符号で示す。図
2において、15,16は各々ワイヤガイドであり、例
えばダイヤモンド、サファイヤ等の硬質材料によって形
成され、ワイヤ電極9の走行方向において半導体インゴ
ット7の直前直後に設けられ、ワイヤ電極9と接触し、
かつこれを緊張させ得るように配設される。
FIG. 2 shows the wire electrode supporting device 3 in FIG.
FIG. 3 is an explanatory diagram of a main part configuration showing a traveling path of the wire electrode 9 and the same portions are denoted by the same reference numerals as those in FIG. In FIG. 2, reference numerals 15 and 16 denote wire guides, which are formed of a hard material such as diamond or sapphire, are provided immediately before and after the semiconductor ingot 7 in the traveling direction of the wire electrode 9, and contact the wire electrode 9,
And it is arranged so that it can be tensioned.

【0021】17,18は各々通電部材であり、導電性
硬質材料によって形成され、各々ガイドローラ4とワイ
ヤガイド15との間およびガイドローラ5とワイヤガイ
ド16との間において、ワイヤ電極9と接触し、これに
所定の電圧を印加可能に形成されている。19はガイド
ローラ、20は引張ローラであり、電極ワイヤ9の走行
終端部近傍に設けられている。21はテークアップ装置
であり、ガイドローラ5を外方に付勢するように設けら
れ、ワイヤ電極9に所定の張力を付与するものである。
Reference numerals 17 and 18 denote current-carrying members, which are made of a conductive hard material and contact the wire electrode 9 between the guide roller 4 and the wire guide 15 and between the guide roller 5 and the wire guide 16, respectively. However, a predetermined voltage can be applied to this. Reference numeral 19 is a guide roller, and 20 is a tension roller, which are provided near the running end of the electrode wire 9. Reference numeral 21 is a take-up device, which is provided so as to urge the guide roller 5 outward and applies a predetermined tension to the wire electrode 9.

【0022】図3は図2におけるガイドローラ4,5を
示す要部拡大側面図、図4は図3におけるガイド溝の拡
大断面図である。図3および図4において、ガイドロー
ラ4,5の外周には複数個のガイド溝22を軸線方向等
ピッチで刻設すると共に、数個のガイド溝22毎に絶縁
部材23を介装させてある。ガイド溝22,22間のピ
ッチ寸法は、半導体インゴット7(図2参照)の切断幅
の寸法と対応させて設定される。
FIG. 3 is an enlarged side view of essential parts showing the guide rollers 4 and 5 in FIG. 2, and FIG. 4 is an enlarged sectional view of the guide groove in FIG. 3 and 4, a plurality of guide grooves 22 are formed on the outer circumference of the guide rollers 4 and 5 at equal pitches in the axial direction, and an insulating member 23 is provided for each of the guide grooves 22. . The pitch dimension between the guide grooves 22, 22 is set in correspondence with the dimension of the cutting width of the semiconductor ingot 7 (see FIG. 2).

【0023】図2ないし図4において、ワイヤ電極9は
巻掛始端から巻掛終端に至るまで連続するように形成す
る。すなわち、ワイヤ電極9は供給リール(図示せず、
図1における符号10参照)から整列ローラ13を介し
てガイドローラ4,5間に巻掛けられるのであるが、図
3および図4に示すガイド溝22を順次移動して巻取リ
ール14に至ると共に、ガイドローラ4,5間において
複数条が夫々平行するように形成する。
2 to 4, the wire electrode 9 is formed so as to be continuous from the winding start end to the winding end. That is, the wire electrode 9 is a supply reel (not shown,
Although it is wound around the guide rollers 4 and 5 via the aligning roller 13 from the reference numeral 10 in FIG. 1, the guide groove 22 shown in FIGS. 3 and 4 is sequentially moved to reach the take-up reel 14. A plurality of threads are formed in parallel between the guide rollers 4 and 5.

【0024】そして上記のような連続するワイヤ電極9
を複数組使用する場合には、夫々のワイヤ電極9の組毎
に図3に示す絶縁部材23を介して、電気的に絶縁状態
に保持するのである。なお通電部材17,18もガイド
ローラ4,5と同様に、ワイヤ電極9の組毎に絶縁状態
となるように構成する。また通電部材17,18および
ワイヤガイド15,16は回転可能または非回転の何れ
でもよい。
And the continuous wire electrode 9 as described above.
When a plurality of sets are used, each set of wire electrodes 9 is held in an electrically insulated state via the insulating member 23 shown in FIG. Note that the current-carrying members 17 and 18, like the guide rollers 4 and 5, are also configured to be in an insulating state for each set of wire electrodes 9. The energizing members 17 and 18 and the wire guides 15 and 16 may be rotatable or non-rotatable.

【0025】図5は本発明の実施の形態における放電用
電源とワイヤ電極との接続状態を示す説明図であり、同
一部分は前記図1ないし図4と同一の参照符号で示す。
図5においてワイヤ電極9a,9b,9c…、通電部材
17a,17b,17c…,18a,18b,18c…
は夫々相互間を絶縁状態に形成されている。
FIG. 5 is an explanatory view showing a connection state between the discharge power source and the wire electrode in the embodiment of the present invention, and the same portions are denoted by the same reference numerals as those in FIGS. 1 to 4.
5, the wire electrodes 9a, 9b, 9c ..., The current-carrying members 17a, 17b, 17c ..., 18a, 18b, 18c ...
Are insulated from each other.

【0026】次に24a,24b,24c…は直流電源
であり、一方の端子をトランジスタ25a,25b,2
5c…、抵抗26a,26b,26c…を介して夫々通
電部材17a,18a;17b,18b;17c,18
c;…と、他方の端子を夫々半導体インゴット7と接続
する。27a,27b,27c…は夫々発振回路であ
り、トランジスタ25a,25b,25c…と接続す
る。
Next, reference numerals 24a, 24b, 24c ... Are DC power supplies, and one terminal has transistors 25a, 25b, 2
5c, and resistors 26a, 26b, 26c, ..., Conducting members 17a, 18a; 17b, 18b; 17c, 18 respectively.
, and the other terminals are connected to the semiconductor ingot 7, respectively. 27a, 27b, 27c ... Are oscillation circuits, respectively, which are connected to the transistors 25a, 25b, 25c.

【0027】上記の構成により、図1および図2に示す
ようにワイヤ電極9を供給リール10から巻取リール1
4に至るまで巻掛け、図5に示すように直流電源24a
〜24cの電圧をワイヤ電極9a〜9cと半導体インゴ
ット7との間に印加し、図1に示す加工テーブル6上に
取り付けられた半導体インゴット7を上昇させれば、所
定の厚さに半導体インゴット7を放電加工により切断す
ることができる。
With the above structure, the wire electrode 9 is wound from the supply reel 10 to the take-up reel 1 as shown in FIGS.
4 up to DC power source 24a as shown in FIG.
If a voltage of 24 to 24c is applied between the wire electrodes 9a to 9c and the semiconductor ingot 7 and the semiconductor ingot 7 mounted on the processing table 6 shown in FIG. 1 is raised, the semiconductor ingot 7 has a predetermined thickness. Can be cut by electrical discharge machining.

【0028】この場合連続するN組のワイヤ電極9を、
半導体インゴット7にn本が臨むようにワイヤガイド
4,5に巻掛ければ、加工テーブル6の1回の上昇によ
り(N×n)枚のウエハを同時に切断することができ
る。1回の切断工程が終了した後には、加工テーブル6
をX方向に所定量を移動させて再び切断作業を行うので
ある。
In this case, N consecutive wire electrodes 9 are
By winding the wire guides 4 and 5 so that n semiconductor ingots 7 face each other, it is possible to simultaneously cut (N × n) wafers by raising the processing table 6 once. After finishing one cutting process, the processing table 6
By moving a predetermined amount in the X direction, the cutting operation is performed again.

【0029】[0029]

【実施例】図1に示す装置により、結晶方位<111
>、P型(ボロン)、固有電気抵抗0.015 Ω・cm、直
径100mmの単結晶シリコンインゴットを切断した。
この場合、ワイヤ電極9として直径150μm、鉄心に
真鍮メッキしたもの(藤倉電線製 CSX)を使用し、
電源電圧20V、パルス電流0.1 Aを印加した。なおワ
イヤ電極9,9間のピッチは900μmとし、1時間5
8分で切断を完了した。
EXAMPLE With the apparatus shown in FIG. 1, crystal orientation <111
>, P type (boron), specific electric resistance of 0.015 Ω · cm, and a single crystal silicon ingot having a diameter of 100 mm were cut.
In this case, a wire electrode 9 having a diameter of 150 μm and an iron core plated with brass (CSX manufactured by Fujikura Electric Wire) is used.
A power supply voltage of 20 V and a pulse current of 0.1 A were applied. The pitch between the wire electrodes 9, 9 is 900 μm, and 5 hours for 1 hour.
The cutting was completed in 8 minutes.

【0030】切断したウエハを評価した結果、厚さ寸法
をウエハの中心と、周辺部4個所を測定したところ、5
個所の最大寸法差5.2 〜7.5 μmであった。またウエハ
面内の変位を測定したところ、前記インゴットの送り方
向(図1におけるZ方向)において最大変位差5.2 〜5.
3 μm(標準偏差1.35〜1.42μm)、ワイヤ電極の走行
方向において最大変位差5.7 〜7.4 μm(標準偏差1.36
〜2.26μm)であった。
As a result of evaluating the cut wafer, the thickness dimension was measured at the center of the wafer and at four peripheral portions.
The maximum dimensional difference between the parts was 5.2 to 7.5 μm. Further, when the displacement in the wafer surface was measured, the maximum displacement difference in the feeding direction of the ingot (Z direction in FIG. 1) was 5.2 to 5.
3 μm (standard deviation 1.35 to 1.42 μm), maximum displacement difference in the running direction of the wire electrode 5.7 to 7.4 μm (standard deviation 1.36)
Was about 2.26 μm).

【0031】上記の結果、インゴットの送り方向におけ
る、ワイヤ放電加工特有の中央部が凹むといういわゆる
大鼓現象が殆ど認められず、またワイヤ電極の走行方向
においても面内変位が小であることが確認された。なお
ウエハに発生するクラックの深さを25μm以下に抑え
得ると共に、カーフロスを201μmとすることができ
た。
As a result, it was confirmed that in the feed direction of the ingot, the so-called drum phenomenon that the central portion peculiar to the wire electric discharge machining is recessed was hardly recognized, and the in-plane displacement was small in the traveling direction of the wire electrode. Was done. The depth of cracks generated on the wafer could be suppressed to 25 μm or less, and the kerf loss could be 201 μm.

【0032】[0032]

【発明の効果】本発明は以上記述のような構成および作
用であるから、微小直径寸法のワイヤ電極の使用によ
り、従来における最小値であるワイヤソーの場合のカー
フロス250μmを更に20%低減することができ、ウ
エハ製造のための材料歩留を大幅に向上させることがで
きる。また切断時間についても、従来のワイヤソーによ
るものと比較して1割程度に短縮することができ、ウエ
ハの製作コストを大幅に低減させ得るという効果を奏し
得る。
Since the present invention has the structure and operation as described above, the use of a wire electrode having a minute diameter can further reduce the kerf loss of 250 μm in the case of a wire saw, which is the minimum value in the prior art, by 20%. Therefore, the material yield for wafer production can be significantly improved. Further, the cutting time can be shortened to about 10% as compared with the conventional wire saw, and there is an effect that the wafer manufacturing cost can be significantly reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施の形態における装置を示す要部斜
視図である。
FIG. 1 is a perspective view of essential parts showing an apparatus according to an embodiment of the present invention.

【図2】図1におけるワイヤ電極支持装置3およびワイ
ヤ電極9の走行経路を示す要部構成説明図である。
FIG. 2 is an explanatory diagram of a main part configuration showing traveling paths of a wire electrode supporting device 3 and a wire electrode 9 in FIG.

【図3】図2におけるガイドローラ4,5を示す要部拡
大側面図である。
FIG. 3 is an enlarged side view of essential parts showing guide rollers 4 and 5 in FIG.

【図4】図3におけるガイド溝の拡大断面図である。FIG. 4 is an enlarged cross-sectional view of the guide groove in FIG.

【図5】本発明の実施の形態における放電用電源とワイ
ヤ電極との接続状態を示す説明図である。
FIG. 5 is an explanatory diagram showing a connection state between a discharge power source and a wire electrode according to the embodiment of the present invention.

【符号の説明】[Explanation of symbols]

4,5 ガイドローラ 7 半導体インゴット 9,9a,9b,9c ワイヤ電極 4, 5 Guide roller 7 Semiconductor ingot 9, 9a, 9b, 9c Wire electrode

───────────────────────────────────────────────────── フロントページの続き (72)発明者 黒田 泰嘉 福島県西白河郡西郷村大字小田倉字大平 150番地信越半導体株式会社半導体白河研 究所内 (72)発明者 長谷川 文彦 福島県西白河郡西郷村大字小田倉字大平 150番地信越半導体株式会社半導体白河研 究所内 (72)発明者 二村 昭二 神奈川県川崎市幸区下平間283番地 株式 会社放電精密加工研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuka Kuroda, Daigo 150, Odaira, Nishigokawa-mura, Nishishirakawa-gun, Fukushima Prefecture Shirakawa Lab, Shin-Etsu Semiconductor Co., Ltd. (72) Fumihiko Hasegawa Nishigo-mura, Nishishirakawa-gun, Fukushima Prefecture Odakura, Ohira 150, Shin-Etsu Semiconductor Co., Ltd., Semiconductor Shirakawa Laboratory (72) Inventor, Shoji Nimura, 283 Shimohirama, Sachi-ku, Kawasaki, Kanagawa

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 支持部材間にワイヤ電極を長手方向走行
可能に張設支持し、これら支持部材間において張設支持
されるワイヤ電極が複数条存在するように構成すると共
に、前記ワイヤ電極の走行方向と直交する方向に半導体
インゴットを相対移動させ、前記ワイヤ電極の各条毎に
当該各条と半導体インゴットとの間に電圧を印加し放電
を発生させて前記半導体インゴットを同時に3個以上の
複数個に切断することを特徴とするエピタキシャル・ウ
エハ用半導体インゴットの切断方法。
1. A wire electrode is stretched and supported between support members so as to be capable of running in the longitudinal direction, and a plurality of wire electrodes stretched and supported between these support members are provided, and the wire electrode is run. The semiconductor ingot is relatively moved in a direction orthogonal to the direction, and a voltage is applied between each strip of the wire electrode and the semiconductor ingot to generate a discharge so that three or more semiconductor ingots are simultaneously formed. A method for cutting a semiconductor ingot for an epitaxial wafer, which comprises cutting into individual pieces.
【請求項2】 複数個のガイドローラを軸線を平行に所
定間隔を介して回転可能に配設すると共に、これらのガ
イドローラ間にワイヤ電極を巻掛けて複数条のワイヤ電
極が長手方向走行可能に形成し、前記ガイドローラ間に
おいて半導体インゴットを前記ワイヤ電極の走行方向と
直交する方向に移動可能に形成した加工テーブルを設
け、放電用電源と電気的に接続されてなる通電部材を前
記ワイヤ電極の各条と接触するように設け、前記ワイヤ
電極の各条と半導体インゴットとの間に電圧を印加し放
電を発生させて切断することを特徴とするエピタキシャ
ル・ウエハ用半導体インゴットの切断装置。
2. A plurality of guide rollers are rotatably arranged parallel to an axis line at a predetermined interval and a wire electrode is wound between these guide rollers so that a plurality of wire electrodes can run in the longitudinal direction. And a machining table in which the semiconductor ingot is formed to be movable between the guide rollers in a direction orthogonal to the traveling direction of the wire electrode, and a current-carrying member electrically connected to a discharge power source is provided on the wire electrode. The apparatus for cutting a semiconductor ingot for an epitaxial wafer, which is provided so as to be in contact with each strip of the wire electrode, and applies a voltage between each strip of the wire electrode and the semiconductor ingot to generate a discharge for cutting.
【請求項3】 ガイドローラの外周に複数個のガイド溝
を設け、ワイヤ電極を供給リールから前記ガイド溝を順
次移動して巻取リールに至るまで連続するように、かつ
前記ガイドローラ間において複数条が夫々平行するよう
に巻掛けたことを特徴とする請求項2記載のエピタキシ
ャル・ウエハ用半導体インゴットの切断装置。
3. A plurality of guide grooves are provided on the outer periphery of the guide roller, and a plurality of wire electrodes are continuously moved from the supply reel to the guide groove to reach the take-up reel. The semiconductor ingot cutting device for an epitaxial wafer according to claim 2, wherein the strips are wound so as to be parallel to each other.
【請求項4】 連続するワイヤ電極を複数組平行させて
夫々ガイドローラ間に巻掛けると共に、夫々連続するワ
イヤ電極の組毎に電気的に絶縁された構成としたことを
特徴とする請求項3記載のエピタキシャル・ウエハ用半
導体インゴットの切断装置。
4. A structure in which a plurality of continuous wire electrodes are arranged in parallel and wound around guide rollers, respectively, and each continuous wire electrode group is electrically insulated. A semiconductor ingot cutting device for an epitaxial wafer as described above.
【請求項5】 ワイヤ電極の走行方向において半導体イ
ンゴットの直前および直後に通電部材を設けたことを特
徴とする請求項2ないし4何れかに記載のエピタキシャ
ル・ウエハ用半導体インゴットの切断装置。
5. The semiconductor ingot cutting device for an epitaxial wafer according to claim 2, wherein a current-carrying member is provided immediately before and immediately after the semiconductor ingot in the traveling direction of the wire electrode.
JP5433896A 1996-03-12 1996-03-12 Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor Pending JPH09248719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5433896A JPH09248719A (en) 1996-03-12 1996-03-12 Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5433896A JPH09248719A (en) 1996-03-12 1996-03-12 Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor

Publications (1)

Publication Number Publication Date
JPH09248719A true JPH09248719A (en) 1997-09-22

Family

ID=12967830

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5433896A Pending JPH09248719A (en) 1996-03-12 1996-03-12 Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor

Country Status (1)

Country Link
JP (1) JPH09248719A (en)

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6242709B1 (en) 1998-07-29 2001-06-05 Sumitomo Special Metals Co., Ltd. Method for manufacturing conductive wafers, method for manufacturing thin-plate sintered compacts, method for manufacturing ceramic substrates for thin-film magnetic head, and method for machining conductive wafers
WO2007057948A1 (en) 2005-11-16 2007-05-24 Mitsubishi Denki Kabushiki Kaisha Wire electrical discharge machining method, semiconductor wafer manufacturing method and solar battery cell manufacturing method
KR100728891B1 (en) * 2005-09-09 2007-06-14 주식회사 실트론 Apparatus for cutting silicon single crystal ingot
JP2010023218A (en) * 2008-07-24 2010-02-04 Mitsubishi Electric Corp Electric discharge machining device
JP2010260151A (en) * 2009-05-11 2010-11-18 Okayama Univ Wire electric discharge machining device and method for electric discharge machining
DE112009001483T5 (en) 2008-06-16 2011-04-21 Mitsubishi Electric Corp. A wire electric discharge machining apparatus and a wire electric discharge machining method, a semiconductor wafer manufacturing apparatus and a semiconductor wafer manufacturing method, and a solar cell wafer manufacturing apparatus and a solar cell wafer manufacturing method
DE112009001764T5 (en) 2008-07-24 2011-05-12 Mitsubishi Electric Corporation Spark erosion device, spark erosion method and method for producing a semiconductor substrate
US20110114603A1 (en) * 2009-11-18 2011-05-19 Industrial Technology Research Institute Wire cut electrical discharge machine
JP2011131319A (en) * 2009-12-24 2011-07-07 Okayama Univ Wire for discharge machining and multi-discharge machining method
JP2011240486A (en) * 2011-09-05 2011-12-01 Mitsubishi Electric Corp Electric discharge machining device
JP2012125880A (en) * 2010-12-15 2012-07-05 Tokyo Cathode Laboratory Co Ltd Multiwire electric discharge machining apparatus and method for manufacturing silicon carbide plate using the same
JP2012125879A (en) * 2010-12-15 2012-07-05 Tokyo Cathode Laboratory Co Ltd Multiwire electric discharge machining apparatus and method for manufacturing silicon carbide plate using the same
CN102672291A (en) * 2012-06-01 2012-09-19 浙江约特工具有限公司 Efficient linear tooth tip-cutting device
JP2012240128A (en) * 2011-05-16 2012-12-10 Toyo Advanced Technologies Co Ltd Electric discharge wire saw device and electrical discharge machining method
DE112011101259T5 (en) 2010-04-09 2013-05-02 Mitsubishi Electric Corporation Electroerosive processing device and electroerosive processing method
JP2013208701A (en) * 2012-03-01 2013-10-10 Canon Marketing Japan Inc Multi-wire electrical discharge machining system, multi-wire electrical discharge machining apparatus, power supply device, multi-wire electrical discharge machining method, semiconductor substrate, solar cell substrate, substrate manufacturing system and substrate manufacturing method
CN103372694A (en) * 2012-04-26 2013-10-30 佳能市场营销日本株式会社 Wire electrical discharge machining system, wire electrical discharge machining method, and workpiece
JP2014065143A (en) * 2014-01-20 2014-04-17 Canon Marketing Japan Inc Wire electric discharge machining system, and wire electric discharge machining method
JP2014094447A (en) * 2014-01-20 2014-05-22 Canon Marketing Japan Inc Wire electric discharge machining system, and wire electric discharge machining method
US9089916B2 (en) 2010-10-01 2015-07-28 Mitsubishi Electric Corporation Wire electric discharge machining apparatus, wire electric discharge machining method, thin plate manufacturing method, and semiconductor wafer manufacturing method
JP2016083773A (en) * 2016-02-18 2016-05-19 キヤノンマーケティングジャパン株式会社 Multiple wire electric discharge machining system and multiple wire electric discharge machining method
TWI581881B (en) * 2014-04-30 2017-05-11 佳能市場營銷日本股份有限公司 Power supply unit and multi-wire electrical discharge machining apparatus
US10052703B2 (en) 2014-07-16 2018-08-21 Korea Institute Of Energy Research Silicon wafer slicing device using wire discharge machining

Cited By (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1101738C (en) * 1998-07-29 2003-02-19 住友特殊金属株式会社 Production of sintered conductive thin-sheet and thin-plate and ceramic substrate and processing method thereof
US6242709B1 (en) 1998-07-29 2001-06-05 Sumitomo Special Metals Co., Ltd. Method for manufacturing conductive wafers, method for manufacturing thin-plate sintered compacts, method for manufacturing ceramic substrates for thin-film magnetic head, and method for machining conductive wafers
KR100728891B1 (en) * 2005-09-09 2007-06-14 주식회사 실트론 Apparatus for cutting silicon single crystal ingot
US8138442B2 (en) 2005-11-16 2012-03-20 Mitsubishi Electric Corporation Wire electric discharge machining method, semiconductor wafer manufacturing method, and solar battery cell manufacturing method
WO2007057948A1 (en) 2005-11-16 2007-05-24 Mitsubishi Denki Kabushiki Kaisha Wire electrical discharge machining method, semiconductor wafer manufacturing method and solar battery cell manufacturing method
US9050672B2 (en) 2008-06-16 2015-06-09 Mitsubishi Electric Corporation Wire discharge-machining apparatus with parallel cutting wires
DE112009001483T5 (en) 2008-06-16 2011-04-21 Mitsubishi Electric Corp. A wire electric discharge machining apparatus and a wire electric discharge machining method, a semiconductor wafer manufacturing apparatus and a semiconductor wafer manufacturing method, and a solar cell wafer manufacturing apparatus and a solar cell wafer manufacturing method
US9643270B2 (en) 2008-06-16 2017-05-09 Mitsubishi Electric Corporation Wire discharge-machining apparatus with parallel cutting wires
DE112009001483B4 (en) 2008-06-16 2020-01-09 Mitsubishi Electric Corp. WIRE ELECTROEROSION MACHINING DEVICE, WIRE ELECTROEROSION MACHINING METHOD, THIN-PLATE MANUFACTURING METHOD AND SEMICONDUCTOR WAFER MANUFACTURING METHOD
JP2010023218A (en) * 2008-07-24 2010-02-04 Mitsubishi Electric Corp Electric discharge machining device
DE112009001764B4 (en) 2008-07-24 2023-01-19 Mitsubishi Electric Corporation Electrical discharge machining apparatus, electrical discharge machining method and method for manufacturing a semiconductor substrate
DE112009001764T5 (en) 2008-07-24 2011-05-12 Mitsubishi Electric Corporation Spark erosion device, spark erosion method and method for producing a semiconductor substrate
US9550245B2 (en) 2008-07-24 2017-01-24 Mitsubishi Electric Corporation Electric discharge machining apparatus, electric discharge machining method, and semiconductor substrate manufacturing method
JP2010260151A (en) * 2009-05-11 2010-11-18 Okayama Univ Wire electric discharge machining device and method for electric discharge machining
US20110114603A1 (en) * 2009-11-18 2011-05-19 Industrial Technology Research Institute Wire cut electrical discharge machine
JP2011131319A (en) * 2009-12-24 2011-07-07 Okayama Univ Wire for discharge machining and multi-discharge machining method
DE112011101259T5 (en) 2010-04-09 2013-05-02 Mitsubishi Electric Corporation Electroerosive processing device and electroerosive processing method
US9089916B2 (en) 2010-10-01 2015-07-28 Mitsubishi Electric Corporation Wire electric discharge machining apparatus, wire electric discharge machining method, thin plate manufacturing method, and semiconductor wafer manufacturing method
JP2012125879A (en) * 2010-12-15 2012-07-05 Tokyo Cathode Laboratory Co Ltd Multiwire electric discharge machining apparatus and method for manufacturing silicon carbide plate using the same
JP2012125880A (en) * 2010-12-15 2012-07-05 Tokyo Cathode Laboratory Co Ltd Multiwire electric discharge machining apparatus and method for manufacturing silicon carbide plate using the same
JP2012240128A (en) * 2011-05-16 2012-12-10 Toyo Advanced Technologies Co Ltd Electric discharge wire saw device and electrical discharge machining method
JP2011240486A (en) * 2011-09-05 2011-12-01 Mitsubishi Electric Corp Electric discharge machining device
JP2013208701A (en) * 2012-03-01 2013-10-10 Canon Marketing Japan Inc Multi-wire electrical discharge machining system, multi-wire electrical discharge machining apparatus, power supply device, multi-wire electrical discharge machining method, semiconductor substrate, solar cell substrate, substrate manufacturing system and substrate manufacturing method
US9375799B2 (en) 2012-03-01 2016-06-28 Canon Marketing Japan Kabushiki Kaisha Multi-wire electrical discharge machining system, multi-wire electrical discharge machining apparatus, power supply device, multi-wire electrical discharge machining method, semiconductor substrate, solar cell substrate, substrate manufacturing system, and substrate manufacturing method
TWI508834B (en) * 2012-03-01 2015-11-21 Canon Marketing Japan Kk A multi-wire discharge machining system, a multi-line discharge processing apparatus, a power supply apparatus, a semiconductor substrate, or a solar cell substrate, and a discharge machining method
CN103372694B (en) * 2012-04-26 2015-09-23 佳能市场营销日本株式会社 Line electrical discharge machining system, wire electric discharge machining method, workpiece
CN103372694A (en) * 2012-04-26 2013-10-30 佳能市场营销日本株式会社 Wire electrical discharge machining system, wire electrical discharge machining method, and workpiece
CN102672291A (en) * 2012-06-01 2012-09-19 浙江约特工具有限公司 Efficient linear tooth tip-cutting device
JP2014094447A (en) * 2014-01-20 2014-05-22 Canon Marketing Japan Inc Wire electric discharge machining system, and wire electric discharge machining method
JP2014065143A (en) * 2014-01-20 2014-04-17 Canon Marketing Japan Inc Wire electric discharge machining system, and wire electric discharge machining method
TWI581881B (en) * 2014-04-30 2017-05-11 佳能市場營銷日本股份有限公司 Power supply unit and multi-wire electrical discharge machining apparatus
US10052703B2 (en) 2014-07-16 2018-08-21 Korea Institute Of Energy Research Silicon wafer slicing device using wire discharge machining
JP2016083773A (en) * 2016-02-18 2016-05-19 キヤノンマーケティングジャパン株式会社 Multiple wire electric discharge machining system and multiple wire electric discharge machining method

Similar Documents

Publication Publication Date Title
JPH09248719A (en) Cutting method and device of semiconductor ingot for epitaxial wafer semiconductor
JP3498638B2 (en) Wire saw equipment
JPH08323741A (en) Wire saw device and work-cutting method
US20130043217A1 (en) Workpiece retainer, wire electric discharge machining device, thin-plate manufacturing method, and semiconductor-wafer manufacturing method
JP2010097976A (en) Method of cutting out silicon block
KR20120068709A (en) Method and device for producing thin silicon rods
JP4411837B2 (en) Semiconductor substrate manufacturing method and manufacturing apparatus
JPH1110510A (en) Wire saw device and method for cutting workpiece
WO2014034841A1 (en) Method for cutting high-hardness material by multi-wire saw
JP4912729B2 (en) Outline processing method of silicon carbide single crystal ingot
JP6397738B2 (en) Wafer manufacturing method
JP2000109397A (en) Ingot having electric conductivity and method for slicing the same
JPH1140521A (en) Manufacture of semiconductor chip
JP2003159642A (en) Work cutting method and multi-wire saw system
JP5151059B2 (en) Outline processing method of silicon carbide single crystal wafer
JP3760187B2 (en) Processing method of single crystal ingot
CN210256793U (en) Large-size silicon carbide wafer diamond wire cutting machine tool
JP6395497B2 (en) Wafer manufacturing method
JP6275551B2 (en) Multi-wire electric discharge machine
JPH1055508A (en) Method for cutting wafer for thin film magnetic head and its device
JP5843889B2 (en) Wire electrical discharge machine
JP6705399B2 (en) Wafer manufacturing method
EP0781619A1 (en) Method of making silicone carbide wafers from silicon carbide bulk crystals
JP2013166193A (en) Method for cutting hard brittle ingot
JPH1076517A (en) Cutting of work by wire saw