JPH09246243A - Ion beam processing method and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a resist process in gate formation of a semiconductor device. SOLUTION: Pattern ion beams 5, 5' which passed through a stencil mask are projected to a second insulation film 4, in a sample having a lamination part of a semiconductor substrate 1, a first insulation film 2, a conductive layer 3 and the second insulation film 4. Pattern ion beam projection 6, 6' regions are removed and a gate 9 of a conductive layer is formed by dry-etching the conductive layer 3 using the remaining second insulation film 4 as a mask.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ion beam processing method and a semiconductor device for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art First, a conventional method for forming a silicon gate will be described with reference to FIGS. As shown in FIG. 3A, the silicon substrate 41 is entirely oxidized and a silicon oxide film 42 is deposited. On top of that, a polycrystalline silicon layer 43
Is deposited by thermal decomposition of SiH ₄ gas. To reduce the resistivity of this polycrystalline silicon layer, phosphorus is added to about 1 ×.
Dope 10 ²¹ (/ cm ³ ). Next, the polycrystalline silicon layer 4
After forming a silicon oxide film 44 having a thickness of about 300 nm on the upper surface of 3, the photoresist 45 is applied by about 1 μm and baked as shown in FIG.

Next, the photoresist 45 is exposed by a reduction exposure device that generates a pattern corresponding to the gate region. In FIG. 3 (c), 46 and 46 'are projected lights, 47 and 4
7'is the exposed portion of the photoresist. Furthermore, after exposure,
By developing, the photoresists 47, 47 'in the exposed portions can be removed as shown by 48, 48' in FIG. 3 (d).

Next, using the remaining photoresist 45 as a mask, the silicon oxide film 44 is dry-etched to form openings 49 and 49 '(FIG. 4A), and then the photoresist 45 is removed by ashing. (FIG. 4B).

Further, by using the remaining silicon oxide film 44 as a mask, the polycrystalline silicon layer 43 is dry-etched to remove the polycrystalline silicon layer 43 corresponding to the openings 49, 49 ', and the openings 50, 49'. 50 'is formed and the silicon gate 51 can be formed. In this way, the silicon gate forming process is completed (FIG. 4C).

[0006]

As described above, the conventional silicon gate forming method requires a series of resist steps such as resist coating, exposure, development and removal prior to patterning the silicon oxide film. Since there is a resist process, there are problems that defective products are generated between the time-consuming resist processes, and that the use of the resist causes contamination by resist residues.

In order to produce a large number of non-defective semiconductor devices in a short time, it is essential to reduce the number of steps until the completion of the semiconductor devices. Above all, a new process which does not go through a resist step at the time of forming a gate is required. A method was desired.

In view of the above problems, the first object of the present invention is to achieve an ion beam processing method for forming a gate in a semiconductor device manufacturing process without the conventional resist process. And a second object is to provide an ion beam processing apparatus for achieving the first object. Furthermore, the third purpose is 0.1 μm without using photoresist.
The purpose is to accurately form the following gate pattern.

[0009]

The first object is achieved by the following method.

(1) An ion beam processing method for forming a gate of a semiconductor device without using a resist process, the sample having a laminated portion of a silicon substrate, a first insulating film, a conductive layer and a second insulating film. On the other hand, the stencil mask having the opening pattern is irradiated with the ion beam extracted from the ion source, and the pattern ion beam passing through the opening pattern is formed on the second insulating film by the projection lens to form the patterned ion beam irradiation region. An ion beam processing method for forming a gate of the conductive layer by including the step of:

(2) An ion beam processing method for forming a gate of a silicon semiconductor device without using a resist process, which comprises a step of forming a first insulating film on a silicon substrate, and a step of forming a first insulating film on the first insulating film. A step of forming a conductive layer, a step of forming a second insulating film on the conductive layer, a stencil mask having an opening pattern is irradiated with an ion beam extracted from an ion source, and a patterned ion beam passing through the opening pattern A projection lens onto the second insulating film, a step of removing the second insulating film subjected to the patterned ion beam projection, the second insulating film remaining after the step as a mask, An ion beam processing method including a step of dry etching a conductive layer.

(3) A gate processing method according to (1) or (2) above, wherein the first insulating film is any one of a silicon oxide film, a tantalum oxide film, and a high dielectric constant film.

(4) The ion beam processing method according to (1) or (2), wherein the conductive layer is either polycrystalline silicon or metal salicide.

(5) The ion beam processing method according to (1) or (2), wherein the ion species of the patterned ion beam is either phosphorus or arsenic.

(6) In the ion beam processing method of (5),
Ion implantation amount by the patterned ion beam is 1 × 1
Ion beam processing method of 0 ¹⁴ / cm ² or more.

The steps (7) and (2) of removing the second insulating film which has been subjected to the patterned ion beam projection are an ion beam processing method by wet etching.

The above second object is achieved by the following device.

(8) An ion source, a mass separator for mass-separating ions emitted from the ion source, a mask stage for holding a stencil mask having an opening pattern,
An irradiation optical system that extracts an ion beam from the ion source and irradiates the stencil mask, a sample stage that holds the sample and slightly moves, and a projection optical system that injects the patterned ion beam that has passed through the opening pattern into the sample. An ion beam processing apparatus comprising at least the electron beam processing apparatus, comprising an electron source for supplying electrons to the sample surface.

Further, the above third object is (9) (1).
It is realized by a semiconductor device provided with a conductor layer formed by using the ion beam processing method of (7) to (7).

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an ion beam projection method according to the present invention will be described with reference to FIGS.

FIG. 2 is a schematic configuration of an ion beam processing apparatus 20 used for ion beam processing according to the present invention. The ion beam processing apparatus 20 includes an ion source 21, a mask stage 24 holding a stencil mask 23 having an opening pattern 22, an ion irradiation optical system 26 for irradiating the stencil mask 23 with an ion beam 25 emitted from the ion source 21, An ion projection optical system 29 that projects the patterned ion beam 27 that has passed through the stencil mask 23 onto the sample 28 to form an aperture pattern 22 of the stencil mask 23 and a reduced projection area, and a sample stage 28 that moves while holding the sample 28. ′ Etc.

The ion irradiation optical system 26 and the ion projection optical system 29 are composed of various optical parts.
Is composed of, for example, a mass separator 30 for separating desired ions and unnecessary ions, an irradiation lens 31 for converging a spread ion beam and irradiating the stencil mask, and the ion projection optical system 29 uses the pattern ion beam 27.
A focusing lens 32 for focusing the beam, a projection lens 33 for projecting the patterned ion beam 27 onto the sample 28, a mass separation aperture (not shown) for passing only desired ions, and the like.

The electron beam supply source 34 supplies electrons 35 to prevent the sample 28 from being charged when the pattern beam is irradiated. In addition, an aligner (not shown) for adjusting the beam position, a blanker (not shown) for blocking the ion beam from reaching the sample, and a mechanical shutter (not shown) may be included.

As the ion source 21, a liquid metal ion source, a field ionized gas ion source, or a plasma ion source having a minute generation source is used.

The stencil mask 23 has an opening pattern 22 which is substantially similar to the desired ion projection area. The size of the aperture pattern 22 is determined by the irradiation size of the ion beam and the reduction ratio of the ion optical system. A square rectangular opening pattern may be provided.

The lenses 31, 32, and 33 are electrostatic electrode groups, and the electrode configuration, arrangement, and applied voltage can be variously modified to form a patterned ion beam with little distortion. The lens arrangement is such that the size of the image formed on the sample 27 is reduced from a fraction of the pattern formed on the stencil mask to a few tenths.

The sample stage 28 'holds the sample 28 and can be moved in a step-and-repeat manner. After performing ion beam projection once, the ion beam is once made into a blanking state and the sample is projected onto the next projection area. The stage is moved to perform ion beam projection. By repeating this, the patterned ion beam projection region can be formed on the entire surface of the sample without passing through the resist process.

Further, if the insulating portion is exposed at the pattern beam irradiation portion of the sample, charge-up occurs, causing deviation of the pattern beam trajectory and blurring. The electron source 34 can supply the electrons 35 to a range including at least the patterned ion beam irradiation region in order to prevent charge-up.

Next, a method for forming a silicon gate of a semiconductor device using the ion beam processing method according to the present invention will be described with reference to FIG.

First, as shown in FIG. 1A, the silicon substrate 1 is entirely oxidized to deposit a first insulating film (gate oxide film) 2, and then a conductive layer 3 is deposited. Further, the second insulating film 4 is deposited on the upper surface of the conductive layer 3. Although the silicon oxide film is used as the first insulating film in the present embodiment, the first insulating film is not limited to the silicon oxide film, and a tantalum oxide film or another high dielectric constant film may be used. In addition, polycrystalline silicon was used for the conductive layer 3. This is not limited to polycrystalline silicon,
Metal salicide such as titanium salicide, nickel salicide, cobalt salicide, and other metals may be used. A silicon oxide film was used for the second insulating film 4. Any other oxide film or a film in which the ion beam irradiation portion and the non-irradiation portion exhibit high selectivity by etching may be used. For example, when a silicon oxide film is used as the second insulating film 4, by introducing phosphorus ions or arsenic ions at a volume density of 10 ²⁰ cm ⁻³ or more,
The etching amount during hydrofluoric acid etching is about 10 times that of the non-irradiated portion.

Next, pattern ion projection is performed on the second insulating film 4 by an ion beam processing apparatus equipped with a stencil mask having an opening pattern having a reciprocal relation with the gate region. Reference numerals 5 and 5'represent the projected patterned ion beam. The projected ion species is phosphorus, and the injection amount is about 5 ×.
It was 10 ¹⁵ / cm ² (Fig. 1 (b)).

Next, the pattern ion beam projection area 6,
6'is etched. In this case, wet etching using a hydrofluoric acid-based chemical having a high selectivity between a silicon oxide film and polycrystalline silicon was adopted. By this process,
The patterned ion beam projection areas 6 and 6'can be removed, and openings 7 and 7'are formed (FIG. 1C).

In this embodiment, the polycrystalline silicon layer has a thickness of 100 nm and the silicon oxide film has a thickness of 15 nm. The length of the non-ion-irradiated region (gate pattern width) is 0.05 μm (= 50 nm). Even if 20% over-etching is performed to remove the silicon oxide film in the irradiation region by the above-mentioned wet etching, the thickness of the silicon oxide film in the non-irradiation region is reduced by about 2 nm only in 20%, Further, the pattern width of the non-irradiated region only decreases by about 4 nm, which is within 10% of the gate pattern width.

Then, the remaining second silicon oxide film 4 is used as a mask to perform dry etching to remove the polycrystalline silicon layer 3 corresponding to the portion irradiated with the ion beam, thereby forming the polycrystalline silicon gate 9. Yes (Fig. 1 (d)). In this anisotropic etching of the polycrystalline silicon layer, an etching rate 30 times higher than that of the silicon oxide film can be secured, and therefore the polycrystalline silicon layer can be sufficiently patterned even with the remaining film of 13 nm.

As described above, according to the ion beam forming method of the present invention, since the resist process is not required when forming the gate of the semiconductor device, the forming process is simplified and the required time is shortened. In addition, defective products that have been generated in the conventional resist process are eliminated, and there is no fear of contamination due to resist residues.

Further, although the details of fine processing of the polycrystalline silicon layer have been described in this embodiment, a well-known technique can be applied to apply this to a semiconductor device such as a CMOS circuit or DRAM as a gate electrode or a wiring layer. Needless to say, it is easy.

According to the present invention, it is possible to process a gate pattern of 0.1 μm or less, which is difficult with the conventional resist method, with an accuracy of 10% or less.

[0038]

According to the ion beam projection method of the present invention, a gate can be formed without going through the resist steps of resist coating, exposure, development and resist removal which have been conventionally performed, and until the completion of a semiconductor device. The number of working steps can be reduced.

[Brief description of drawings]

FIG. 1 is an explanatory view showing a gate forming process using an ion beam processing method according to an embodiment of the present invention.

FIG. 2 is a sectional view of an ion beam processing apparatus according to an embodiment of the present invention.

FIG. 3 is an explanatory view of a conventional silicon gate forming process.

FIG. 4 is an explanatory diagram of a conventional procedure for forming a silicon gate.

[Explanation of symbols]

1 ... Silicon substrate, 2 ... First insulating film, 3 ... Conductive layer, 4
... second insulating film, 5, 5 '... patterned ion beam, 9
... Gate, 20 ... Ion beam processing device, 21 ... Ion source, 23 ... Stencil mask, 27 ... Pattern ion beam, 28 ... Sample, 34 ... Electron source.

Claims (9)

[Claims] 1. An ion beam processing method for forming a gate of a semiconductor device without using a resist process, for a sample having a laminated portion of a silicon substrate, a first insulating film, a conductive layer and a second insulating film. The stencil mask having an opening pattern is irradiated with the ion beam extracted from the ion source, and the pattern ion beam passing through the opening pattern is projected onto the second insulating film by a projection lens to form the pattern ion beam irradiation region. An ion beam processing method comprising forming a gate of the conductive layer including a step of forming. 2. An ion beam processing method for forming a gate of a silicon semiconductor device without using a resist step, the step of forming a first insulating film on a silicon substrate, wherein a conductive layer is formed on the first insulating film. Forming step, forming a second insulating film on the conductive layer, irradiating an ion beam extracted from an ion source onto a stencil mask having an opening pattern, and projecting a patterned ion beam passing through the opening pattern into a projection lens The step of projecting onto the second insulating film, the step of removing the second insulating film subjected to the pattern ion beam projection, and the step of removing the second insulating film, the second insulating film remaining. And a step of dry-etching the conductive layer using the mask as a mask. 3. The gate processing method according to claim 1, wherein the first insulating film is any one of a silicon oxide film, a tantalum oxide film and a high dielectric constant film. 4. The ion beam processing method according to claim 1, wherein the conductive layer is either polycrystalline silicon or metal salicide. 5. The ion beam processing method according to claim 1, wherein the ion species of the patterned ion beam is either phosphorus or arsenic. 6. The ion beam processing method according to claim 5, wherein the ion implantation amount by the patterned ion beam is 1 × 10 ¹⁴ / cm ² or more. 7. The ion beam processing method according to claim 2, wherein the step of removing the second insulating film subjected to the patterned ion beam projection is wet etching. 8. An ion source, a mass separator for mass-separating the ions emitted from the ion source, a mask stage for holding a stencil mask having an opening pattern, and an ion beam for extracting the ion beam from the ion source. An irradiation optical system that irradiates a mask, a sample stage that holds and moves the sample finely, a projection optical system that projects the patterned ion beam that has passed through the aperture pattern onto the sample, and an electron source that supplies electrons to the sample surface. An ion beam processing apparatus including at least. 9. A semiconductor device comprising a conductor layer formed by using the ion beam processing method according to claim 1. Description: