JPH09246209A - Manufacture of semiconductor integrated circuit device and semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a barrier property if a barrier film inside a connection hole performing a film-forming treatment for forming one layer barrier film divided in a plurality followed by performing a stabilizing treatment of the barrier film concerned after the respective film-forming treatments. SOLUTION: Prior to formation of an electrode wiring on a semiconductor substrate 2, a barrier film 8a is formed on an underlayer of the electrode wiring. At this time, a film-forming treatment for forming one layer barrier film 8a is performed being divided in a plurality and after the respective film-forming treatment a stabilizing treatment of the barrier film 8a is performed. For instance, after carrier films 8a1 consisting of TiN are heaped, atmospheric idling treatment or oxidation treatment is performed so as to stabilize the barrier film 8a1 . Next, after the barrier films 8a2 consisting of TiN are heaped, the barrier films 8a2 stabilized by performing the atmospheric idling treatment or the oxidation treatment. Next, conductor films 8b for forming the electrode wiring consisting of Al or an Al-Si Cu alloy are heaped by a sputtering method or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing technique of a semiconductor integrated circuit device, and more particularly to a technique effectively applied to a method of forming a barrier film.

[0002]

2. Description of the Related Art With the miniaturization of elements and wirings of semiconductor integrated circuit devices, the dimensions of connection holes have become finer. There is a technique of providing a barrier film between the electrode wiring and the semiconductor substrate in such a fine connection hole, for example, when connecting the electrode wiring and the semiconductor substrate. According to the technique studied by the present inventor, there are, for example, the following two methods for forming such a barrier film.

One is a method in which a barrier film is deposited by a sputtering method, and subsequently, an oxidation treatment is continuously performed in the same sputtering apparatus, and a conductor film for electrode wiring is further deposited by a sputtering method. In this case, the effect of improving the throughput and improving the yield by reducing foreign matter can be obtained.

The other is a method of depositing a barrier film by a sputtering method, then leaving it in the air once, and then depositing a conductor film for electrode wiring by a sputtering method in another sputtering apparatus. Since this method can obtain a higher yield than the above method, this method is currently mainly used.

[0005]

However, in any of the above methods for forming a barrier film, the coverage of the barrier film in the connection hole cannot be said to be sufficient, and for example, a pinhole may be formed in the barrier film. The present inventor has found that a contact leak defect occurs in the connection hole portion due to release of constituent atoms of the barrier film.

An object of the present invention is to provide a technique capable of improving the barrier property of the barrier film in the connection hole.

[0007] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0008]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

In the method of manufacturing a semiconductor integrated circuit device according to the present invention, prior to forming the electrode wiring on the semiconductor substrate,
A step of performing a film forming process for forming a barrier film of one layer in a plurality of times when forming a barrier film under the electrode wiring, and performing a stabilizing process of the barrier film after each film forming process. Is to have.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings (note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments. , The repeated explanation is omitted).

FIG. 1 is a circuit diagram of a component of a semiconductor integrated circuit device according to an embodiment of the present invention, FIG. 2 is a sectional view of a main part of the semiconductor integrated circuit device of FIG. 1, and FIGS. FIG. 3 is a cross-sectional view of essential parts in the process of manufacturing the semiconductor integrated circuit device of No. 1.

In the present embodiment, the case where the present invention is applied to, for example, a Schottky Barrier Diode (SBD) of SRAM (Static Random Access Memory) will be described.

A circuit diagram of a memory cell in the SRAM of this embodiment is shown in FIG. The memory cell MC is basically composed of a flip-flop circuit including two multi-emitter bipolar transistors (hereinafter, simply referred to as transistors) Q1 and Q2.

Both collectors of the transistors Q1 and Q2 are electrically connected to the information holding current supply side. Further, one emitters of the transistors Q1 and Q2 are electrically connected to the data lines DL1 and DL2, respectively.

The other emitters of the transistors Q1 and Q2 are electrically connected to the cathode electrode of the SBD 1 via the load resistance RL. A transistor Q3 is connected in parallel between the anode electrode and the cathode electrode of SBD1.

A capacitor C1 and a resistor RM are connected in parallel between the emitters of the transistors Q1 and Q2 and the SBD1. Further, the word line WL is electrically connected to the anode of the SBD 1.

In FIG. 1, reference numerals a to e indicate points corresponding to the reference numerals a to e in the cross section of the main part of the semiconductor integrated circuit device of FIG. Here, the structure of the semiconductor integrated circuit device according to the present embodiment will be described with reference to FIG.

[0018] The semiconductor substrate 2 is, for example, p ^- made form of silicon (Si) single crystal, in its main surface, the semiconductor substrate 2
The convex portions 2a1 and 2a2 formed by a part of the are formed.

The convex portions 2a1 and 2a2 are formed of, for example, an epitaxial layer made of n-type Si single crystal, and a field insulating film 3 for element isolation or element isolation is formed on the outer periphery thereof. There is. Field insulating film 3
Is made of silicon dioxide (SiO ₂ ).

The SBD 1 described above includes a buried region 4, a shield layer 5, a semiconductor region 6, a Schottky junction 7,
It has an anode electrode 8 and a cathode lead-out region 9.

The buried region 4 contains, for example, n-type impurity antimony (Sb), and also serves as the collector region of the transistor Q3. Embedded region 4 on the convex portion 2a1 side
The shield layer 5 is formed immediately above the layer.

The shield layer 5 is an impurity layer for suppressing noise generated in the semiconductor substrate 2 due to α rays or the like from entering the cathode side of the SBD 1, and is formed by containing, for example, p-type impurity boron. ing. This shield layer 5
Also serves as the base region of the transistor Q3.

In the shield layer 5, a p ^{+ type} semiconductor region 5a is formed on the side surface of the convex portion 2a1. The p + type semiconductor region 5a is electrically connected to the conductor film 10a provided on the side surface of the convex portion 2a1. The conductor film 10a is made of, for example, p-type low resistance polysilicon.

A semiconductor region 6 is formed on the shield layer 5.
Are formed. The semiconductor region 6 contains, for example, n-type impurity phosphorus or arsenic (As). The n-type semiconductor region 6 also serves as the emitter region of the transistor Q3.

The semiconductor region 6 is electrically connected to the conductor film 11a through the n ^{+ type} semiconductor region 6a formed on the semiconductor region 6. The conductor film 11a is made of, for example, n-type low resistance polysilicon, and a part of the conductor film 11a has a resistance RL.
Is formed.

A part of the conductor film 11a also serves as the lower electrode of the capacitor C1. This capacitor C1
Is composed of a conductor film 11a, an insulating film 12a above it, and a conductor film 11b above it.

The insulating film 12a is a dielectric film for capacitors and is made of, for example, silicon nitride (Si ₃ N ₄ ).
The conductor film 11b is the upper electrode of the capacitor,
For example, it is made of low resistance polysilicon.

On the upper layer of this semiconductor region 6, a Schottky junction 7 is formed. The Schottky junction portion 7 is made of, for example, platinum silicide (PtSi ₂ ), and the Schottky contact portion is formed at this junction interface. The Schottky junction 7 is electrically connected to the anode electrode 8 described above.

The anode electrode 8 is constructed by depositing a conductor film 8b on a barrier film 8a. This barrier film 8a
Is a film that mainly suppresses the constituent atoms in the conductor film 8b from moving to the semiconductor substrate 2 side and the constituent atoms in the semiconductor substrate 2 to move to the conductor film 8b side. For example, titanium nitride (TiN) Etc.

In the present embodiment, as will be described later, this one-layer barrier film 8a is formed by, for example, two film forming processes, and the barrier film is formed every two film forming processes. It is formed by performing a stabilization process. Therefore, the barrier film 8a has a very high barrier property.

The conductor film 8b is made of, for example, aluminum (Al) or Al-Si-copper (Cu) alloy. Note that such an anode electrode 8 is also electrically connected to the above-described conductor film 10a.

On the other hand, the buried region 4 below the formation region of the convex portion 2a2 is provided on the side surface side of the convex portion 2a2 through the side surface portion of the cathode extraction region 9 formed on the upper portion of the convex portion 2a2. And is electrically connected to the conductor film 10b. The conductor film 10b is made of, for example, n-type low resistance polysilicon.

In FIG. 2, reference numerals 12b to 12d.
Indicates an insulating film. The insulating films 12b to 12d are
For example, it is made of SiO ₂ . Reference numeral 13 indicates a surface protective film. The surface protection film 13 is formed of, for example, SiO ₂
Of a single layer film or a laminated film formed by depositing a silicon nitride film on a SiO ₂ film.

Next, a method of manufacturing the semiconductor integrated circuit device of this embodiment will be described with reference to FIGS. It should be noted that, for simplicity of explanation, the SBD portion will be taken out and described here.

FIG. 3 is a cross-sectional view of an essential part of the semiconductor substrate 2 during the manufacturing process of the semiconductor integrated circuit device. The semiconductor substrate 2 is made of, for example, p ⁻ -type Si single crystal, and the embedded region 4, the shield layer 5, and the semiconductor region 6 described above are formed in this order from the lower layer on the upper portion thereof.

On the semiconductor substrate 2, for example, SiO
_An insulating film 12 made of ₂ is deposited. This insulating film 1
2 is a collective description of the insulating films 12a to 12d shown in FIG.

In this insulating film 12, a connection hole 14 is formed in the SBD formation region so that a part of the semiconductor region 6 is exposed. The size of this connection hole is, for example, 2.0 μm.
It is about m × 3.0 μm.

First, as shown in FIG.
As shown in, the conductor film 15 made of platinum (Pt) or the like is deposited by the sputtering method. The thickness of the conductor film 15 is, for example, about 250Å.

Subsequently, the semiconductor substrate 2 is heat-treated to form a Schottky junction 7 made of, for example, PtSi _{2 at} the contact portion between the conductor film 15 and the semiconductor region 6.
To form

The heat treatment temperature at this time is, for example, 475.degree.
At 530 ° C., the gas atmosphere is, for example, an oxygen gas atmosphere, the gas pressure is, for example, 10 liters / minute, and the processing time is, for example, about 10 minutes.

After that, the unreacted portion of the conductor film 15 is removed by etching. As a result, the conductor film 15 is removed leaving the Schottky junction 7 at the bottom of the connection hole 14. At this time, the processing temperature is, for example, 50 ° C. to 54 ° C., the etching solution is nitric acid (HNO ₃ ) or hydrochloric acid (HCl), and the processing time is, for example, about 15 minutes.

Next, a barrier film is formed. Here, it has been confirmed that in the case of a barrier film made of TiN or the like formed by the current sputtering method, about several percent of free Ti is present. If the conductor film for electrode wiring made of Al or the like is continuously formed on the barrier film without oxidizing the free Ti, the free Ti diffuses to the Schottky junction or the electrode wiring side during the subsequent heat treatment, and However, since the reaction temperature of Si with Al is low and the silicide or aluminide is formed, the electrical characteristics of the SBD 1 change.

For this reason, under the present circumstances, after the barrier film is finally formed to a required thickness, the barrier film is stabilized by subjecting it to an oxidation treatment or an atmospheric standing treatment.

However, according to the study by the present inventor, the coverage of the barrier film becomes low due to the miniaturization of the connection hole 14, and the barrier property of the barrier film cannot be said to be sufficient. It has been found that the above-mentioned problems occur at the bottom corners.

Therefore, in the present embodiment, the film forming process for forming the barrier film for one layer is performed, for example, twice, and the barrier film stabilizing process is performed after each film forming process. To give.

As a result, the number of pinholes in the barrier film can be significantly reduced and the trapping property of free Ti can be improved, so that the barrier property of the barrier film can be further improved. Therefore,
Even if the connection hole 14 is miniaturized, it is possible to suppress the deterioration of the electrical characteristics of the SBD 1.

Specifically, for example, the following is performed. First, as shown in FIG. 5, a barrier film 8a1 made of, for example, TiN is deposited by a sputtering method or the like.

In the film forming process at this time, the thickness of the barrier film 8a1 is about half of the designed value. The thickness of the barrier film 8a1 at this stage is, for example, about 500Å. The processing gas in this film forming process is, for example, argon (A
r) and nitrogen (N ₂ ) mixed gas is used, and the gas pressure is
For example, it is about 4 to 12 mTorr.

Then, in the present embodiment, the barrier film 8a1 is stabilized by subjecting the semiconductor substrate 2 to atmospheric treatment or oxidation treatment.

This atmospheric exposure treatment is performed, for example, on the semiconductor substrate 2.
Is left in a clean room for about 1 hour.
The oxidation treatment is performed by, for example, leaving the semiconductor substrate in the oxidation treatment chamber to which a mixed gas of N ₂ and O ₂ is supplied for about 60 to 120 seconds. The pressure in the oxidation treatment chamber is set to, for example, about 10 mmTorr, and the treatment temperature is set to, for example, about room temperature.

Then, as shown in FIG. 6, for example, TiN
A barrier film 8a2 made of is deposited by a sputtering method or the like. In the film forming process at this time, the film is deposited by the remaining thickness of the barrier film 8a. Barrier film 8a at this stage
The thickness of 2 is, for example, about 500Å.

Next, in the present embodiment, the barrier film 8a2 is stabilized by subjecting the semiconductor substrate 2 to atmospheric treatment or oxidation treatment. At this time, the conditions of the atmospheric treatment and the oxidation treatment are the same as those described above.

Subsequently, as shown in FIG. 7, the semiconductor substrate 2
A conductor film 8b made of, for example, Al or Al-Si-Cu alloy or the like for electrode wiring formation is deposited thereon by a sputtering method or the like. The thickness of the conductor film 8b is, for example, 1000
It is about 0 °. Ar gas is used as the gas during the sputtering process, and the gas pressure is, for example, 4 to 12 m.
It is about Torr.

Thereafter, the laminated film of the conductor film 8a and the conductor film 8b is patterned by the photolithography technique and the dry etching technique to form the anode electrode 8 and the like shown in FIG. 2 by patterning.

After that, the semiconductor integrated circuit device is manufactured according to the usual manufacturing process of the semiconductor integrated circuit device.

As described above, in the present embodiment, the following effects can be obtained.

(1). The film forming process for forming the one-layer barrier film 8a is divided into two steps, and each of the barrier films 8a1 and 8a
By performing the stabilization process on the barrier films 8a1 and 8a2 after the film formation process of a2, the number of pinholes in the barrier film 8a can be significantly reduced and the barrier film 8a can be significantly reduced.
Since the trapping property of free Ti in a can be improved, the barrier property of the barrier film 8a can be improved.

(2) By the above (1), even if the connection hole 14 is miniaturized, the trapping property of the free Ti in the barrier film 8a can be improved, so that the electrical characteristics of the SBD 1 can be improved. It will be possible.

(3). The barrier film 8 is formed by the above (1) and (2).
It is possible to improve the yield and reliability of the semiconductor integrated circuit device having a.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, in the above-mentioned embodiments, the case where the barrier film is made of TiN has been described, but the present invention is not limited to this, and various modifications are possible, for example titanium tungsten (TiW).

In the above description, SRA, which is the field of application behind the invention made mainly by the present inventor, is the background.
The case of application to M has been described, but the present invention is not limited to this, and various applications are possible.
It is also applicable to other semiconductor memories such as (Dynamic Random Access Memory) and logic circuits such as microprocessors. The present invention can be applied to a semiconductor integrated circuit device having at least a barrier film.

[0063]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1). The number of pinholes in the barrier film can be reduced by stabilizing the barrier film during the film forming process for forming the one-layer barrier film. Since the constituent atoms of the barrier film can be prevented from being released, the barrier property of the barrier film can be improved. Therefore, the yield and reliability of the semiconductor integrated circuit device having the barrier film can be improved.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a component of a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of main parts of the semiconductor integrated circuit device of FIG.

3 is a fragmentary cross-sectional view of the semiconductor integrated circuit device of FIG. 1 during a manufacturing step thereof;

FIG. 4 is a cross-sectional view of essential parts in the manufacturing process of the semiconductor integrated circuit device of FIG. 1 subsequent to FIG. 3;

5 is a fragmentary cross-sectional view of the semiconductor integrated circuit device of FIG. 1 during a manufacturing step following that of FIG. 4;

6 is a fragmentary cross-sectional view of the semiconductor integrated circuit device of FIG. 1 during a manufacturing step following that of FIG. 5;

7 is a main-portion cross-sectional view of the semiconductor integrated circuit device of FIG. 1 during the manufacturing process following that of FIG. 6;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Schottky barrier diode 2 Semiconductor substrate 3 Field insulating film 4 Buried region 5 Shield layer 5a p ^{+ type} semiconductor region 6 Semiconductor region 6a n ^{+ type} semiconductor region 7 Schottky junction (compound film) 8 Anode electrode 9 Extraction region 10 Conductive film 10 11 conductor film 12a-12d insulating film 13 surface protection film 14 connection hole

Claims (5)

[Claims] 1. When forming a barrier film in a lower layer of the electrode wiring prior to forming the electrode wiring on a semiconductor substrate, a film forming process for forming one barrier film is divided into a plurality of steps. The method for manufacturing a semiconductor integrated circuit device, further comprising the step of performing a stabilization treatment for the barrier film after each film formation treatment. 2. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the stabilizing process is an atmospheric exposure process or an oxidation process. 3. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein (a) after depositing an insulating film on the semiconductor substrate, a part of the insulating film is removed to remove the semiconductor. Forming a connection hole so that the diode formation region on the substrate is exposed, and (b) depositing a predetermined conductor film on the semiconductor substrate after the exposure process of the diode formation region, A step of forming a compound film at a contact portion between the conductor film and the semiconductor substrate by performing heat treatment, and (c) a step of etching and removing an unreacted portion of the conductor film after the step of forming the compound film. And (d) a step of depositing a barrier film on the semiconductor substrate after the step of removing the unreacted portion of the conductor film according to the method of forming the barrier film, and (e) an electrode wiring on the semiconductor substrate after the barrier film is formed. The step of depositing a conductor film for use, (f)
And a step of forming the electrode wiring by patterning the barrier film and the electrode wiring conductor film. 4. The method for manufacturing a semiconductor integrated circuit device according to claim 1, 2 or 3, wherein the barrier film is titanium nitride or titanium tungsten. 5. A semiconductor integrated circuit device in which a barrier film is provided in a lower layer of electrode wiring formed on a semiconductor substrate, wherein the barrier film is composed of a plurality of stabilized barrier films. Integrated circuit device.