JPH09232962A - Method and device for transmitting signal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable the mixing of an arbitrary channel and the reception/ reproduction of the arbitrary number of the channels. SOLUTION: A ΣΔ modulation part 25 performs ΣΔmodulation processing respectively to analog audio signals of 4 channels. A changeover switch 31 synthesizes 1-bit audio signals of 4 channels, and outputs a main data stream Ds. A CPU 33 generates the sub-data of the 1-bit audio signals of 4 channels. A transmission data generating part 36 adds an error correction signal, and generates a digital data string. A data separator 51 receives the transmitted digital data string, and separates and outputs 1-bit main data D's and the sub- data. A control CPU 52 extracts number-of-channels information N. A latch 53 takes out the data stream of 1 line corresponding to the number of receivable/reproducible channels M (=1).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal transmission method and apparatus for transmitting a digital data string containing 1-bit digital data which has been sigma-delta modulated.

[0002]

2. Description of the Related Art Generally, as a method of digitizing a voice signal, a method of converting an analog audio signal into a multi-bit audio signal having a sampling frequency of 44.1 KHz and a data word length of 16 bits is known.

On the other hand, recently, the sigma delta (Σ
It has become possible to convert a 1-bit audio signal obtained by digitizing an audio signal by a method called Δ) modulation into an analog audio signal as it is.

The ΣΔ-modulated 1-bit audio signal has, for example, a sampling frequency of 64 times 44.1 KHz and a data word length of 1 bit as compared with the data format used in the conventional multi-bit audio signal. It has a very high sampling frequency and a short data word length, and features a wide transmittable frequency band. Further, even if it is a 1-bit audio signal by ΣΔ modulation, it is possible to secure a high dynamic range in an audio band which is a low band with respect to an oversampling frequency of 64 times. The 1-bit audio signal obtained by ΣΔ modulation by utilizing this feature can be applied to a recorder with high sound quality and data transmission.

The ΣΔ modulation circuit itself is not a new technology, its circuit configuration is suitable for integration into an IC, and the accuracy of AD conversion can be obtained relatively easily. This is the circuit used. The 1-bit audio signal obtained by ΣΔ modulation can be returned to an analog audio signal by passing through a simple analog low-pass filter.

[0006]

In the data format used in the conventional digital audio, if the audio data to be transmitted is LR 2-channel stereo, the L channel and the R channel are, for example, 16-bit data. Recording and transmission were performed at different locations and different timings for each bit number, and both were separately processed during reception / reproduction. Further, as the number of channels increases, the recording / transmission side requires a plurality of transmission lines and complicated timing processing.

Further, in order to reproduce with a D / A converter for a smaller number of channels, a plurality of signals are mixed into one, so that a separate signal processing device is required.

The present invention has been made in view of the above circumstances, and enables recording / transmission in a single-system data stream. Further, an arbitrary latch signal is generated and the data stream is re-latched to generate a plurality of data streams. It is an object of the present invention to provide a signal transmission method and device which can generate an arbitrary channel mix and receive / reproduce an arbitrary number of channels by generating the signals.

[0009]

SUMMARY OF THE INVENTION In order to solve the above problems, a signal transmission method and apparatus according to the present invention include a plurality of channels obtained by subjecting audio signals of a plurality of channels having a high correlation to a sigma-delta modulation process. When recording / transmitting and reproducing / receiving the 1-bit audio signal of, the channel number information of the 1-bit audio signal is added to the 1-bit audio signal of the plurality of channels and recorded / transmitted in one continuous data stream. Then, at the time of reception / reproduction, the 1-bit data stream is taken out and the reproduction rate is controlled by the signal channel number information and the reception / reproducible channel number information.

In a system for transmitting a high-speed 1-bit audio signal which is sigma-delta modulated, when a plurality of high-speed 1-bit audio signals which are sigma-delta modulated are transmitted, 1-bit data is sequentially alternated by 1 bit for the number of channels. By transmitting and recording each of them, it is possible to transmit the data stream of one system.

Further, this data stream is received / reproduced at a rate as high as the number of channels corresponding to the rate of the original high-speed 1-bit audio signal, so that it is reproduced as a monaural audio signal in which a plurality of these channels are mixed. .

Furthermore, by combining the latch signals for the number of transmitted channels, a completely independent multi-channel output can be obtained from this data stream.

By devising the latch signal, a plurality of signals in which arbitrary channels are mixed can be obtained.

Therefore, an arbitrary latch signal is generated by the signal channel number information and the receivable / reproducible channel number information added to the data stream, and the data stream is re-latched to generate a plurality of data streams. It is possible to mix channels and receive / play back any number of channels.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a signal transmission method and apparatus according to the present invention will be described below with reference to the drawings. First, the principle of the present invention will be described with reference to FIGS. deep.

In FIG. 1, a stereo 2-channel (ch) analog audio signal supplied from the input terminal 1 and the input terminal 2 is a sigma-delta (ΣΔ) modulator 4 and a ΣΔ modulator using a clock of frequency F _S. 5 by ΣΔ modulation, Lch 1-bit audio signal L _n and Rch
It becomes a 1-bit audio signal R _n . Where the frequency F _S
Is a sampling frequency f _S (= 44.1 KHz) of 6 used in compact discs, for example.
It is a clock CK ₁ having a frequency of 4 times 64 f _S and is supplied from the clock input terminal 3. The Lch 1-bit audio signal L _n and the Rch 1-bit audio signal R _n are switched by the clock input terminal 7 by the changeover switch 6.
L according to 128 f _S clock CK ₂ supplied from
128 bits as shown in FIG.
It becomes the 1-ch data stream D _{S at} the f _S rate and is derived from the output terminal 8. Details of the ΣΔ modulators 4 and 5 will be described later.

Lch 1-bit audio signal L _n , Rc
The signal waveforms when the h1 bit audio signal R _n and the 1ch data stream D _S are D / A converted are shown in FIGS. 3A, 3B and 3C. Also,
The frequency spectrum is shown in FIG. 4 (A), FIG. 4 (B) and FIG. 4 (C). Lch is a sine wave signal having a frequency of 1 KHz as shown in FIG. 3A, Rch is a sine wave signal having a frequency of 2 KHz as shown in FIG. 3B, and a signal obtained by combining these signals is shown in FIG. As in C), the signal is a signal obtained by adding a 1 KHz sine wave and a 2 KHz sine wave. The phase difference between the respective components is one 128 f _S clock, but this is not a problem for an audio band that is sufficiently low with respect to 128 f _S. That is, here, the reproduction rate may be doubled by the number of channels. This can be applied not only to the two channels of stereo LR but also to a plurality of highly correlated channels.

An embodiment in which the above principle is applied to perform multi-channel transmission will be described below. In this embodiment, a 4-channel 1 channel obtained by subjecting a 4-channel (ch) audio signal having high correlation to ΣΔ processing
It is a digital data transmission device 10 having the configuration shown in FIG. 5, which transmits a bit audio signal and reproduces it on one channel.

The digital data transmission device 10 comprises a transmitter 20, a transmitter 40, and a receiver 50. The transmitter 20 converts the 4-ch 1-bit audio signal into serial data and supplies the serial data to the receiver 50 via the transmitter 40. The receiving unit 50 sets the number of receivable and reproducible channels M to 1
And perform monaural playback.

Although the transmission unit 40 is used as a transmission line and data is transmitted and received between the transmission unit 20 and the reception unit 50 here, the transmission unit 40 may be used as a recording unit for recording and reproducing digital data. .

First, the transmitting section 20 uses four channels (c
h) a ΣΔ modulation section 25 for performing ΣΔ modulation processing on each analog audio signal, and 4 from the ΣΔ modulation section 25.
A changeover switch 31 serving as a main data stream synthesizing means for synthesizing a 1-bit audio signal of ch and outputting a main data stream D _S, and a sub-data generating for generating sub-data including channel number information of a 1-bit audio signal of 4 ch Central processing unit (C
PU) 33, a sub data output from the CPU 33, and a transmission data generation function as a digital data sequence generation means for generating a digital data sequence by adding an error correction signal to the combined output of the main data stream D _S and the synchronization signal. And a section 36.

The ΣΔ modulator 25 includes a ΣΔ modulator 26, ΣΔ
It is composed of a modulator 27, a ΣΔ modulator 28, and a ΣΔ modulator 29. The ΣΔ modulator 26, the ΣΔ modulator 27, the ΣΔ modulator 28, and the ΣΔ modulator 29 have input terminals 21, 22, and 2 respectively.
Channel (ch) 1 analog audio signal, ch2 analog audio signal, c supplied from 3 and 24
The 64 f _S clock CK ₁ from the clock input terminal 30 is used to perform ΣΔ modulation processing on the h3 analog audio signal and the ch4 analog audio signal, respectively.

Here, the ΣΔ modulator 26 and the ΣΔ modulator 2
7, the ΣΔ modulator 28 and the ΣΔ modulator 29 have the same configuration and are as shown in FIG. Here, the ΣΔ modulator 2
The configuration of No. 6 will be described as a representative. That is, the input terminal 21
The ch1 analog audio signal from is supplied to the integrator 13 via the adder 12. The signal from the integrator 13 is supplied to the comparator 14 and is compared with, for example, the midpoint potential of the input audio signal and quantized by 1 bit for each sampling period. Here, as the frequency (sampling frequency) of the sampling period, a frequency that is 64 times that of the sampling frequency of 44.1 kHz for CD is used as described above.

This quantized data is a 1-sample delay unit 15
And is delayed by one sample period. This delay data is converted into an analog signal by the 1-bit D / A converter 16 and supplied to the adder 12 to be added to the ch1 analog audio signal from the input terminal 21. Then, the quantized data output from the comparator 14, that is, ch1
The -1 bit audio signal is supplied to the changeover switch 31.

Therefore, the ΣΔ modulator 26 performs Σ
According to the Δ modulation, by sufficiently increasing the sampling frequency, it is possible to obtain an audio signal having a wide dynamic range even with a small number of bits, for example, 1 bit. Moreover, it is possible to have a wide transmittable frequency band.

The change-over switch 31 is provided with a ch1-1 bit audio signal D _0n and a ch2-1 bit audio signal D _1n , c from the ΣΔ modulator 25 as shown in FIG.
The h3-1 bit audio signal D _2n and the ch4-1 bit audio signal D _3n are switched by the 256f _S clock CK ₃ supplied from the clock input terminal 32 to synthesize the main data stream D _S. This is one in which 4ch 1-bit audio signals are alternately arranged one bit at a time for the number of channels. The main data stream D _S is supplied to the transmission data generator 36.

The CPU 33 uses the information of 4 channels, that is, the number-of-channels information of the 1-bit audio signal (=
4) including 4) is generated as shown in FIG. This sub-data consists of 4-bit channel number information, 4-bit sampling frequency information, 1-bit emphasis, and 15-bit accompanying data, and has a total of 3 bytes. The CPU 33 also generates a 1-byte sync signal. The sub data and the sync signal generated by the CPU 33 are supplied to the transmission data generation unit 36.

The transmission data generator 36 comprises a RAM 34 and an error correction signal adder 35. The RAM 34 synthesizes the main data stream D _S from the changeover switch 31, the sub data from the CPU 33, and the synchronization signal.
The error correction signal adder 35 adds an error correction signal to the combined output. That is, the transmission data generation unit 36 generates a digital data string in which one block has, for example, 2048 bytes as shown in FIG. Here, this digital data string is a 1-byte sync signal, 3-byte sub-data,
It is composed of a 2038-byte main data stream and a 16-byte error correction signal. This digital data string is transmitted to the receiver 50 by the transmitter 40.

Next, the receiving unit 50 includes a data separator 51 separates and outputs a transmitted digital data stream to receive 1 bit main data D _^'S and the sub data to the transmission section 40, the data separator From the control CPU 52, which is an extracting means for extracting the channel number information N (= 4) from the sub data separated by 51, and the 1-bit main data D ^′ _S separated by the data separator 51,
The number of receivable / reproducible channels M (=
1), a latch 53 serving as a data fetching unit for fetching an M (= 1) column data stream, a D / A converter 55 for converting the one column data stream fetched by the latch 53 into an analog signal, and a control C
Channel number information N (= 4) extracted by the PU 52
And a latch pulse generator 54 serving as control means for controlling the data separator 51 and the latch 53 according to the number M (= 1) of receivable / reproducible channels.

The latch pulse generator 53 receives N × F _S = 4 × 64f _S = 25 from the channel number information N (= 4).
The 6 f _S clock CK ₃ is supplied to the data separator 51, and the data separation processing of this data separator 51 is controlled. Further, by the number M (= 1) of the receivable / reproducible channels of the latch pulse generator 53, (N / M) · F _S = 4 × 64
The clock signal (latch signal) S _L of f _S = 256f _S is supplied to the latch 53, and the data extraction process of the latch 53 is controlled.

[0031] Data separator 51 in the above 256f _S clock CK ₃ from the digital column read the 1 bit main data D _^'S, supplied to the latch 54. Latch 54
It said latch signal the 1-bit main data D _^'S is S _L
In accordance with the above, only one clock is latched as shown in FIG. The data signal D _{L which} is the latch output of the latch 54 is D
It is supplied to the / A converter 55.

The D / A converter 55 has a 256 f _S clock C
The data signal D _L is converted into an analog audio signal by K ₃ and is derived from the output terminal 56.

[0033] That is, the receiving unit 50 is several times the channel of the sampling frequency 64f _S, that is, if the received reproducing the 1-bit main data D _^'S at four times the rate,
It is possible to obtain a mixed signal of 4ch and 64f _S
The data is read at 256 f _S , which is 4/1 times the
A conversion is sufficient.

Therefore, in the system for transmitting and recording ΣΔ-modulated high-speed 1-bit audio signal, this digital data transmission device 10 sequentially transfers the number of channels N (=
4) By alternately transmitting 1-bit data by 1 bit, it is possible to transmit in a single-system data stream.

Further, the signal channel number information N (=
By additionally transmitting and recording 4), at the time of reception and reproduction, this data stream is reproduced at a rate as high as the number of channels of the rate of the original high-speed 1-bit audio signal, so that these 4ch channels are mixed in monaural. It is played back as an audio signal. That is, during reception / reproduction, it is possible to perform monaural reproduction of one channel by the signal channel number information N and the reception / reproducible channel number information M (= 1).

In the digital data transmission device 10 according to this embodiment, the receiving section 50 may be a receiving section 60 as shown in FIG. A digital data transmission device in this case will be described below as a modified example.

This modification is a digital data transmission device in which the number of channels that can be received and reproduced by the receiving section 60 is 4 ch. Since the configuration of the transmission unit 20 is the same as that of FIG. 5, description thereof will be omitted here.

The receiving unit 60, the data separator outputs the digital data sequence transmitted by the transmission section 40 receives 1-bit main data D ^'by separating the _S and subdata 6
1, the control CPU 62 for extracting the channel number information N (= 4) from the sub data separated by the data separator 61, and the 1-bit main data D ^′ _S separated by the data separator 51 M (= 4) according to the number M (= 4) of receivable / reproducible channels of the receiving unit 60
Data retrieval unit 63 for retrieving a data stream of a column
And a D / A conversion unit 6 for converting the four columns of data streams extracted by the data extraction unit 63 into analog signals.
4 and a latch pulse generator 65 for controlling the data separator 61 and the data extraction unit 63 according to the channel number information (= 4) extracted by the control CPU 62 and the receivable / reproducible channel number M (= 4). And.

Since the number M of receivable and reproducible channels of the receiving section 60 is 4 ch, the number of reproducing systems is four. That is, the data extraction unit 63 and the D / A conversion unit 64 are
As shown, it is divided into four systems.

The data extracting unit 63 is further divided into two parts, one for each system, and the first system is composed of a latch 63 _1a and a latch 63 _1b . The second system has a latch 63
_{From 2a} and the latch 63 _2b , the third system is the latch 63 _3a and the latch 63 _3b, and the fourth system is the latch 63 _4a and the latch 6
3 _4b and.

The D / A converter 64 is the D / A converter 6
4 ₁ , D / A converter 64 ₂ , D / A converter 64 ₃
And a D / A converter 64 ₄ for supplying the data signals D _L11 , D _L12 , D supplied from the data extracting unit 63.
_L13 and D _L14 are converted into analog audio signals and output from output terminals 66 ₁ , 66 ₂ , 66 ₃ and 66 ₄ .

The latch pulse generator 65 receives N × F _S = 4 × 64 f _S = 25 from the channel number information N (= 4).
The 6 f _S clock CK ₃ is supplied to the data separator 61 to control the data separator 61. The data separator 61 reads the 1-bit main data D ^′ _S based on the 256f _S clock CK ₃ supplied from the latch pulse generator 65, as shown in FIG.

Further, the latch pulse generator 65 has a frequency of (4/4) · 64f _S = 64f _S based on the number M (= 4) of receivable and reproducible channels, and the phases are different.
Latch signals SL ₁ , SL ₂ , SL ₃ and SL ₄ as shown in FIG.
3 _1a , 63 _2a , 63 _3a and 63 _4a , and a common latch signal SL _c as shown in FIG. 12 having a frequency of 64f _S is latched 63 _1b , 63 _2b , 63 _3b and 63 _4b.
To supply.

[0044] Therefore, one system of the data extraction unit 63
Latch 63 in front of eyes_1aAs shown in FIG.
Switch signal SL₁According to the above 1-bit main data
D^' _STo data signal D_L01Latch, and latch 6 in the latter stage
3_1bTo enter. Also, the latch 63 at the front stage of the second system_2a
Is the latch signal SL_TwoAccording to the above 1-bit May
Data D^' _STo data signal D_L02Latch the
Latch 63_2bTo enter. Latch 63 at the front stage of the third system
_3aAnd the latch 63 at the front stage of the fourth system_4aSimilarly, above
Switch signal SL_ThreeAnd SL_FourAccording to the above 1-bit May
Data D^' _STo data signal D_L03And D_L04Latch
And the latch 63 in the latter stage_3bAnd latch 63_4bTo enter.

Latches 63 _1b , 63 _2b , 6 at the latter stage of each system
3 _3b and 63 _4b match the phases of the data signals D _L01 , D _L02 , D _L03 and D _L04 according to the common latch signal SL _c for matching the phase between the channels,
The data signals D _L11 , D _L12 , D _L13 and D _L14 are output to the D / A converters 64 ₁ , 64 ₂ , 64 ₃ and 64 ₄ of the D / A conversion unit 64.

For this reason, the digital data transmission device of this modified example has the output terminals 66 ₁ , 66 ₂ , 6 as described above.
6 ₃ and 66 ₄ analog audio signal independent in 4ch from be derived.

Therefore, in the digital data transmission device of this modification, the number of transmitted channels N (= 4).
By combining the minute latch signals, it is possible to obtain outputs of a plurality of four channels completely independent from the data stream.

Further, the digital data transmission device 1 described above
For 0, the receiving unit 50 may be a receiving unit 70 as shown in FIG. The digital data transmission device in this case will be described below as another modification.

Another modification is a digital data transmission device in which the number of channels that can be received and reproduced by the receiving section 70 is 2 ch, that is, half the number of transmitted channels.

The receiving unit 70, the data separator 7 for outputting digital data sequence transmitted by the transmission section 40 receives 1-bit main data D ^'by separating the _S and subdata
1, the control CPU 72 for extracting the channel number information N (= 4) from the sub data separated by the data separator 71, and the 1-bit main data D ^′ _S separated by the data separator 71 M (= 2) according to the number M (= 2) of receivable / reproducible channels of the receiving unit 70
Data retrieval unit 73 for retrieving data stream of column
And a D / A conversion unit 7 for converting the two columns of data streams extracted by the data extraction unit 73 into analog signals.
4 and a latch pulse generator 75 for controlling the data separator 71 and the data extractor 73 according to the channel number information (= 4) extracted by the control CPU 72 and the receivable / reproducible channel number M (= 2). And.

Since the number M of receivable and reproducible channels of the receiving section 70 is 2 ch, there are two reproducing systems. That is, the data extraction unit 73 and the D / A conversion unit 74 are
As shown, it is divided into two systems.

The data fetching section 73 is further divided into two parts for each system, and the first system consists of a latch 73 _1a and a latch 73 _1b . The second system has a latch 73
_2a and a latch 73 _2b .

The D / A converter 74 is used for the D / A converter 7
4 ₁ and a D / A converter 74 ₂ and each data signal d _L11 and d _L12 supplied from the data extracting unit 73.
Is converted into an analog audio signal and derived from output terminals 76 ₁ and 76 ₂ .

The latch pulse generator 75 receives N × F _S = 4 × 64f _S = 25 from the channel number information N (= 4).
The clock CK ₃ of 6f _S is supplied to the data separator 71, and controls the data separator 71. The data separator 71 reads the 1-bit main data D ^′ _S as shown in FIG. 14 based on the 256f _S clock CK ₃ supplied from the latch pulse generator 75.

Further, the latch pulse generator 75 has a frequency of (4/2) · 64f _S = 128f _S based on the number M (= 2) of receivable and reproducible channels and has a different phase as shown in FIG. each latch signal sL ₁ and sL ₂ is supplied to the latch 73 _1a and 73 _2a constituting the timing adjusting unit 73, a common latch signal sL _c whose frequency shown in there 14 at 128f _S latch 73 _1b and 73
Supply to _2b .

[0056] Therefore, first system of the preceding latch 73 _1a of the data extraction unit 73, latches the data signal d _L01 from the 1-bit main data D _^'S according to the above latch signal sL ₁ as shown in FIG. 14 And the latter latch 7
Enter in 3 _1b . Also, the latch 73 _{2a in} the previous stage of the second system
Latches the data signal d _L02 from the 1-bit main data D ^′ _S according to the latch signal sL ₂ and inputs it to the latch 73 _2b in the _subsequent stage.

Latches 73 _1b and 73 at the latter stage of each system
_2b aligns the phases of the data signals d _L01 and d _L02 according to the common latch signal sL _c for aligning the phase between the channels, and transfers the data signals d _L11 and d _L12 to the D / A converter 74. D / A converters 74 ₁ and 74 ₂
Output to

For this reason, the digital data transmission apparatus of the other modification is, as described above, the output terminals 76 ₁ to c.
an analog audio signal that is a mix of h1 and ch3, and an analog audio signal that is a mix of output terminals 76 ₂ to ch2 and ch4 can be derived.

Therefore, in another modified digital data transmission device, by devising the latch signal, two systems of signals in which arbitrary channels are mixed can be obtained.

As described above, according to the above-described embodiment, its modification and other modifications, the signal channel number information is additionally transmitted and recorded in the system for transmitting and recording the ΣΔ-modulated high speed 1-bit audio signal. When receiving and reproducing, it is possible to perform arbitrary channel reproduction by the signal channel number information and the reception and reproducible channel number information.

The signal transmission method and apparatus according to the present invention are not limited to the above-mentioned embodiments, and if the correlation is high, less than 4 channels or 5 or more ΣΔ signals are serially channelized. It may be transmitted together with the numerical information. If the number of reproducible channels on the receiving / reproducing side is less than or equal to the above channel number information, then 4 or 2 above
It is not limited to one channel.

The transmission in the present invention is not limited to transmission / reception, but includes recording / reproducing on / from a recording medium such as a magnetic tape or an optical disk.

[0063]

The signal transmission method and apparatus according to the present invention are
When transmitting a ΣΔ-modulated high-speed 1-bit audio signal, the number of signal channels is additionally transmitted and recorded.
During reception / reproduction, arbitrary channel reproduction can be performed based on the signal channel number information and the reception / reproducible channel number information.

[Brief description of drawings]

FIG. 1 is a block diagram for explaining the principle of a signal transmission method and apparatus according to the present invention.

FIG. 2 is a timing chart for explaining the above principle.

FIG. 3 is a signal waveform diagram for explaining the above principle.

FIG. 4 is a spectrum diagram for explaining the above principle.

FIG. 5 is a block diagram of a digital data transmission device according to an embodiment of the present invention.

FIG. 6 is a block diagram showing a detailed configuration of a ΣΔ modulator used in the above embodiment.

FIG. 7 is a timing chart for explaining the operation of the transmission unit of the above embodiment.

FIG. 8 is a format diagram of sub-data used in the above embodiment.

FIG. 9 is a format diagram of a digital data string used in the above embodiment.

FIG. 10 is a timing chart for explaining the operation of the receiving unit of the above embodiment.

FIG. 11 is a block diagram of a receiving unit according to a modified example of the embodiment of the present invention.

FIG. 12 is a timing chart for explaining the operation of the reception unit of the above modification.

FIG. 13 is a block diagram of a receiving unit according to another modification of the embodiment of the present invention.

FIG. 14 is a timing chart for explaining the operation of the receiving unit of the other modified example.

[Explanation of symbols]

10 digital data transmitter, 20 transmitter, 25
ΣΔ modulator, 26, 27, 28, 29 ΣΔ modulator,
31 changeover switch, 33 CPU, 34 RAM,
35 error correction signal adder, 36 transmission data generator,
40 transmitter, 50 receiver, 51 data separator, 5
2 control CPU, 53 latch pulse generator,
54 Latch, 55 D / A converter

Claims (4)

[Claims] 1. A signal transmission method for recording / transmitting and reproducing / receiving a plurality of channels of 1-bit audio signals obtained by subjecting a plurality of channels of highly correlated audio signals to sigma delta modulation processing. 2. A signal transmission method comprising: recording / transmitting the 1-bit audio signal by adding channel number information of the 1-bit audio signal. 2. The signal transmission method according to claim 1, wherein arbitrary multi-channel reception / reproduction is performed based on the channel number information and the receivable / reproducible channel number information. 3. Digital data consisting of a synchronization signal, sub-data, and a main data stream formed of a plurality of N-channel 1-bit audio signals obtained by sigma-delta modulation using a bit clock having a sampling frequency F _S. In a signal transmission device for recording / transmitting and reproducing / receiving a sequence, the 1-bit audio signals of the plurality of N channels are alternately arranged by switching in synchronization with a clock signal of frequency N · F _S to synthesize the main data stream. Main data stream synthesizing means, sub data generating means for generating the sub data including the channel number information N of 1-bit audio signals of the plurality of N channels, sub data output of the sub data generating means and the main data stream And above sync signal Digital data string generating means for generating a digital data string, transmitting means for recording / transmitting the digital data string generated by the digital data string generating means, and the digital data string recorded / transmitted by the transmitting means from the digital data string Separation means for separating the sub data and the main data stream; extraction means for extracting the channel number information N from the sub data separated by the separation means; and the main data stream separated by the separation means, Data extraction means for extracting M stream data streams according to the number M of receivable / reproducible channels, and digital / digital data conversion means for converting the M stream data streams extracted by the data extraction means into analog signals for each M row.
It is characterized by comprising an analog converting means and a control means for controlling the separating means and the data extracting means according to the channel number information N and the receivable / reproducible channel number M extracted by the extracting means. Signal transmission equipment. 4. The control means supplies a clock signal having a frequency of N · F _{S to} the separating means and a frequency (N /
4. The signal transmission device according to claim 3, wherein a clock signal of M) · F _S is supplied to the data extracting means.