JPH09232428A - Manufacturing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method which simplifies such a complex process as the one where, relating to a wiring groove or a via hole for forming buried- wiring in an insulation film comprising an organic resin by chemical-mechanical grinding method, a mask is formed using photo-resist and it is transferred to an insulation layer. SOLUTION: Relating to a method wherein a buried-wiring is formed on an organic resin insulation layer by a chemical and mechanical grinding method, an organic resin insulation layer 21 which is to be a buried-wiring part is worked as follows. Firstly, a silicon-containing polymer layer 3 is formed on an organic resin insulation layer 2, and the silicon-containing polymer layer 3 is irradiated with an active chemical ray 4 in a specified pattern, so that a latent image 5 is formed in the silicon-containing polymer layer. Then, the mask pattern of a specified pattern is formed on the silicon-containing polymer layer 3 by development. Then, by reactive ion etching of oxygen, the mask pattern is transferred onto the organic resin insulation layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a buried wiring technique using an organic resin such as polyimide for an interlayer insulating film.

[0002]

2. Description of the Related Art A technique for forming a buried wiring in an interlayer insulating film made of an organic resin such as polyimide by using a chemical-mechanical polishing method is disclosed in US Pat. No. 5,397,741. A silicon-containing polymer layer such as polysilsesquioxane is formed on the layer, and the silicon-containing polymer layer is processed into a predetermined pattern by photolithography using a photoresist, and the reaction of oxygen with the pattern as a mask. The organic resin insulating layer in the opening of the silicon-containing polymer layer was etched and removed by reactive ion etching to form a groove or via hole to be a buried wiring portion. The specific silicon-containing polymer layer mentioned in the above-mentioned known example not only serves as a mask when etching the organic resin thereunder, but also when the wiring metal is removed by etching using the chemical-mechanical polishing method. Also plays the role of an etching stop layer.

In this method, a photoresist forming step, a predetermined pattern exposure / developing step, and a resist pattern are transferred to a silicon-containing polymer layer on the organic resin insulating layer before forming a wiring groove in the organic resin insulating layer. An etching step and a step of etching the organic resin insulating layer by oxygen reactive ion etching or the like using the pattern of the silicon-containing polymer layer as a mask are required. As semiconductor integrated circuits become highly integrated, it is required that the precision of fine wiring processing be high. In addition, the wiring layers tend to be multilayered from two layers to three layers for higher performance. As the number of wiring layers increases, it is advantageous in terms of cost to reduce the total number of steps as much as possible.

[0004]

It is known that an organic resin insulating layer is processed by reactive ion etching of oxygen or the like using a pattern of a thin film of a silicon-containing polymer layer formed thereon as a mask. Silicon-containing polymers such as polysiloxane and polysilsesquioxane can easily form a thin film layer, and lose their organic components and become silicon dioxide when exposed to oxygen plasma. The modified silicon dioxide pattern serves as a mask sufficient for processing the organic resin insulating layer. When a silicon-containing polymer such as polysiloxane or polysilsesquioxane is dry-etched with an ordinary photoresist whose main component is an organic polymer, it can be processed with fluorine plasma if it is completely converted to silicon dioxide. Since the polymer layer contains an organic component, it is required to process under the condition that the oxygen and fluorine plasmas are precisely balanced. In the case of a plasma containing oxygen as well as fluorine, the pattern of the photoresist made of an organic resin is affected by the oxygen plasma during etching, and there is a problem in increasing the fine processing accuracy.

An object of the present invention is to form a wiring groove or a via hole for forming a buried wiring with high accuracy in an interlayer insulating film made of an organic resin by using a chemical-mechanical polishing method.

[0006]

[Means for Solving the Problems] The above-mentioned problem is to provide a buried wiring portion in a method of forming a buried wiring using a chemical-mechanical polishing method in an organic resin insulating layer that can be etched by reactive ion etching of oxygen. The processing step of the organic resin insulating layer to be performed is (1) a step of forming a silicon-containing polymer layer on the organic resin insulating layer, (2) irradiating the silicon-containing polymer layer with an active actinic ray in a predetermined pattern. The step of forming a latent image in the silicon-containing polymer layer, (3) the step of forming the mask pattern in the predetermined pattern on the silicon-containing polymer layer by development, (4) the step of reactive ion etching of oxygen. This is achieved by adopting a method including a step of transferring a mask pattern to the organic resin insulating layer.

As the silicon-containing polymer used in the present invention, a silicon-containing resist material capable of forming a fine pattern by exposure to active actinic radiation and development can be used as it is. Polysiloxane or polysilsesquioxane having a phenyl nucleus in the side chain can form a good coating film in a thin film. If these are exposed to a pattern of active actinic radiation such as ArF excimer laser light, the exposed areas are modified and a fine pattern can be directly formed by development.

As the organic resin insulating layer material used in the present invention, a material having a large heat resistance such as polyimide, or a low dielectric constant material such as fluorine-modified polyimide, high density polyethylene or polyquinoline can be used.

As a method of forming the buried wiring using the chemical-mechanical polishing method, a known method using a silicon oxide type insulating material as an etch stop layer can be used.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a process diagram showing Embodiment 1, which is a method of forming a wiring groove in an organic resin interlayer insulating film according to the present invention. As shown in FIG. 1A, an organic resin insulating film 2 made of polyimide is formed on a semiconductor substrate 1 to a thickness of 0.3 μm. In this case, the polyimide layer is sufficiently cured by heat treatment. Polymethylphenylsilsesquioxane is formed thereon as a silicon-containing polymer layer 3 having photosensitivity to ArF excimer laser light to a thickness of 90 nanometers. This silicon-containing polymer was a ladder silicone resin having a methyl group and a phenyl group in the side chain, and the ratio of the methyl group and the phenyl group was about 4: 1. In FIG. 1 (b), the photosensitive silicon-containing polymer layer 3 formed on the organic resin insulating film 2 is subjected to pattern exposure 4 by ArF excimer laser light corresponding to a predetermined wiring groove, and an exposure latent image portion 5 is formed. It is sectional drawing of the structure which formed. Since this silicon-containing polymer has a phenyl nucleus that selectively absorbs light of the wavelength of ArF excimer laser light, the exposed latent image area is extremely effectively modified and photoinduced oxidation is sufficiently advanced. Therefore, the exposed portion can be removed by etching with carbon tetrafluoride gas plasma, like a normal silicon dioxide film. However, the organic component remains in the unexposed portion and is not etched. FIG. 1 (c) is a cross-sectional view in which the substrate is exposed to carbon tetrafluoride gas plasma as a developing process for removing the exposed latent image portion 5 and an opening 6 corresponding to a predetermined wiring groove is formed in the silicon-containing polymer layer. It is a figure. FIG. 1 (d) shows a wiring corresponding to the opening in the organic resin insulating film 2 by further subjecting the substrate having the opening 6 formed by the carbon tetrafluoride gas plasma treatment to reactive ion etching of oxygen. It is sectional drawing which formed the groove | channel 7. This reactive ion etching treatment of oxygen not only removes the organic resin insulating film by etching, but also denatures the silicon-containing polymer layer remaining outside the opening into an almost normal silicon oxide film. Therefore, it becomes an effective etch stop layer in the method of forming the buried wiring by using the chemical-mechanical polishing method.

(Embodiment 2) FIG. 2 is a diagram showing the application of the present invention.
FIG. 6 is a process diagram of forming a wiring groove and a connection hole between wiring layers for simultaneously forming a connection between wiring layers and a buried wiring by using a chemical-mechanical polishing method. 2A shows the silicon-containing polymer layer 3 formed on the organic resin insulating film 9 in which the connection hole is to be formed, and the connection hole portion is formed in the same manner as the process up to FIG. Corresponding opening 8
It is sectional drawing of the structure which formed. FIG. 2 (b) is a cross section of a structure in which an organic resin insulating film 2 for forming a buried wiring is formed on the substrate, and a silicon-containing polymer layer 3 having photosensitivity to ArF excimer laser light is formed on the organic resin insulating film 2. It is a figure. The silicon-containing polymer layer 3 has the same thickness as in Example 1.
Since the thickness is 90 nm, which is sufficiently smaller than the thickness of the organic resin insulating layer 2 on which the embedded wiring is to be formed, which is about 0.3 μm, even if the opening 8 is formed by the development with the carbon tetrafluoride gas plasma. The flatness of the organic resin insulating layer 2 is not impaired. In FIG. 2 (c), pattern exposure is performed in the same manner as in Example 1 using ArF excimer laser light corresponding to predetermined wiring trenches, and the exposed latent image forming portion is etched with carbon tetrafluoride gas plasma. It is sectional drawing of the structure which formed the opening part 6 corresponding to a wiring groove by removing. At this time, the opening 6 corresponding to the wiring groove necessarily covers the opening 8 corresponding to some connection holes. FIG. 2 (d) shows that the substrate is subjected to reactive ion etching of oxygen to form a wiring groove 7 in the organic resin insulating layer 2 in which the wiring groove is to be formed, and a hole to be connected to this wiring groove is formed. It is sectional drawing of the structure which formed the connection hole 10 in the organic resin insulating layer 9 which should be formed.

[0013]

According to the present invention, a wiring groove or a via hole for forming an embedded wiring in an organic resin insulating layer by using a chemical-mechanical polishing method can be formed with high accuracy without increasing the number of steps. Can be formed.

[Brief description of drawings]

FIG. 1 is a process drawing of a method for forming a wiring groove in an organic resin interlayer insulating film according to the present invention.

FIG. 2 is a process drawing of forming a wiring groove and a connection hole between wiring layers in an organic resin interlayer insulating film according to the present invention.

[Explanation of symbols]

 1: Semiconductor substrate 2: Organic resin insulating layer in which embedded wiring is to be formed 3: Photosensitive silicon-containing polymer layer 4: Pattern exposure 5: Exposure latent image part 6: Opening corresponding to wiring groove 7: Wiring groove 8 : Opening corresponding to connection hole 9: Organic resin insulating layer in which connection hole should be formed 10: Connection hole

Claims (3)

[Claims] 1. A method of forming embedded wiring in an organic resin insulating layer that can be etched by reactive ion etching of oxygen using a chemical-mechanical polishing method, wherein the organic resin insulating layer to be the embedded wiring portion is formed. The machining process is
(1) A step of forming a silicon-containing polymer layer on the organic resin insulating layer, (2) A latent image is formed in the silicon-containing polymer layer by irradiating the silicon-containing polymer layer with an actinic ray in a predetermined pattern. Forming step, (3) forming the predetermined pattern-shaped mask pattern on the silicon-containing polymer layer by development, (4) transferring the mask pattern to the organic resin insulating layer by reactive ion etching of oxygen A method of manufacturing a semiconductor device, comprising: 2. The method for manufacturing a semiconductor device according to claim 1, wherein the silicon-containing polymer is made of polysiloxane or polysilsesquioxane having a phenyl nucleus in a side chain. Production method. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the active actinic radiation is excimer laser light having a wavelength of 200 nm or less.