JPH09232279A - Method for flattening wafer by etching and waver flattening device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To flatten a wafer without problems such as warp or contamination of the wafer face, or abrasion of the surface plate, large-size or complexity, instability of an abrasive pad or the like. SOLUTION: In this method, first a thickness distribution of a wafer 3 is measured, and next a photomask 2 is prepared from the thickness distribution data, and the wafer 3 in an etchant 9 is exposed to lights through this photomask 2, whereby the wafer 3 is etched as a temperature distribution in response to the thickness distribution. This device comprises: a light source 1 for exposing the wafer to lights; the photomask 2 for absorbing and intercepting beams irradiated from the light source 1; a wafer holder 4 for holding the wafer 3 in the etchant 9; and an etching bath 5 for flatting the wafer 3 by etching.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for flattening a wafer (uniformizing the thickness), and more particularly to a method for flattening a wafer in a semiconductor silicon mirror surface wafer manufacturing process and a wafer flattening apparatus.

[0002]

2. Description of the Related Art Conventionally, a method for manufacturing a semiconductor silicon mirror-finished wafer is generally a thin disk-shaped wafer obtained by slicing a single crystal rod pulled up by a single crystal pulling apparatus as shown in the flow chart of FIG. And a chamfering step B for chamfering the peripheral edge portion of the wafer obtained in the slicing step A in order to prevent cracking or chipping of the wafer,
Lapping step C for lapping the chamfered wafer to flatten it, etching step D for chamfering and removing processing strain remaining on the surface of the lapped wafer, and one side for primary mirror polishing of one side of the etched wafer Primary mirror-polishing step E, single-side finish mirror-polishing step F for finishing and mirror-polishing one side of the primary-mirror-finished wafer, and cleaning the wafer after single-side finish mirror-polishing to remove abrasives and foreign substances The cleaning step G is performed.

The above-mentioned conventional method for manufacturing a semiconductor wafer has a problem in that it has many steps, is complicated, and has a high manufacturing cost. In particular, the flattening of the wafer required for the semiconductor wafer is ensured in the lapping step C and the primary mirror polishing step E, but each has the following problems.

Lapping is carried out by sandwiching a wafer between platens made of upper and lower cast iron at a predetermined pressure and rotating the upper and lower platens in an appropriate direction at a predetermined number of revolutions while pouring slurry. The primary mirror polishing is basically the same as lapping except that a polishing pad is attached to the surface plate surface and a finer slurry is used.

In the flattening of the wafer by such a mechanical method, the surface of the wafer is distorted, and the contamination by the slurry or the cutting allowance and the adhesion of foreign matter are caused. Therefore, an etching process and a cleaning process are required to remove the strain on the wafer surface and clean it. In addition, the surface of the surface plate gradually wears as it is used, and when it wears, it is extremely difficult to correct it, and it becomes impossible to continue lapping or polishing. Further, in order to cope with the increase in the diameter and the flatness of the wafer accompanying the higher integration of semiconductor devices in the future, a larger surface plate is required, and the apparatus becomes larger and more complicated. In addition to the above, in polishing, the polishing ability of the polishing pad varies widely between pads, and the change over time is severe, so that the operation tends to be unstable.

On the other hand, the so-called PACE (Plasma Assisted) has recently been solved.
A technique called "Chemical Etching" has been developed. This is one of the dry etching methods. After measuring the thickness distribution of a wafer, the amount of etching removal is controlled by plasma by controlling the nozzle traveling speed according to the thickness according to the distribution. Is a technique for making the wafer thickness uniform. According to this method, the wafer can be flattened (the thickness can be made uniform) without using the platen, and the problems of the size increase of the apparatus and the instability of the polishing pad can be solved. However, since the wafer is exposed to high-energy plasma, its surface is likely to have defects and distortions, and after the treatment, post-processes such as polishing and cleaning are required, and the productivity is extremely low and the cost is high.

[0007]

The present invention has been made to solve the above problems, and the problem to be solved by the present invention is a problem in flattening a wafer by the mechanical method. There is no problem such as wafer surface distortion, contamination or surface plate wear, large size and complexity, and polishing pad instability, and defects and distortions on the wafer surface, which are problems in the PACE method, and are low. It is an object of the present invention to provide a wafer flattening method and a wafer flattening apparatus which have no problem of productivity.

[0008]

In order to solve the above-mentioned problems, the invention described in claim 1 of the present invention is a method for flattening a wafer, and 1) first, the thickness distribution of the wafer is measured. 2) Next, a photomask is prepared from the thickness distribution data, and 3) the wafer in the etchant is exposed through the photomask to etch the wafer as a temperature distribution according to the thickness distribution, This is a method for flattening a wafer by etching.

As described above, according to the present invention, by exposing a wafer to a temperature distribution according to the thickness distribution of the wafer (that is, a thick part has a high temperature and a thin part has a low temperature), and the etching rate temperature is changed. Utilizing the dependency (the higher the temperature, the higher the etching rate),
The wafer is flattened by etching.

Therefore, there is no distortion on the surface of the wafer, which is a problem in the mechanical method, and the surface of the wafer is less contaminated due to the acid etching. In addition, as a general rule, there is no need to use a surface plate, there is no need to consider problems such as wear of this product or instability of the polishing pad, and since it is possible to use a so-called single-wafer type, downsizing and simplification of the device is possible. Is possible.

Further, according to the second aspect of the present invention, when the wafer in the etchant is exposed through the photomask, the light flux is formed into a slit shape, and the light source is provided at one end of the wafer relative to the photomask and the wafer. 2. The method for flattening a wafer by etching according to claim 1, wherein the exposure is performed by scanning from to the other end.

As described above, rather than exposing one wafer as a whole at once, a slit is used to form a light beam into a slit, and the wafer is scanned, so that heat conduction in the wafer, convection of an etchant, light beam scattering, etc. Therefore, it is possible to minimize the problem that the temperature distribution in the wafer surface is disturbed, the etching rate varies, and the removal amount varies from a predetermined amount.

Next, the invention described in claim 3 of the present invention is a method for flattening the wafer according to claim 1 or 2, wherein the wafer is a semiconductor silicon wafer. . Further, claim 4 of the present invention
The invention described in (3) is the method for flattening a wafer according to (3), characterized in that a mixed acid of hydrofluoric acid + nitric acid + acetic acid is used as an etchant.

As described above, according to the method of the present invention, it is required to further increase the diameter and the flatness due to the high integration of devices in the future, and to flatten the semiconductor silicon wafer which should not be distorted or contaminated on its surface. It is particularly useful as a method for converting into hydrogen, and as the etchant in this case, it is preferable to use a mixed acid of hydrofluoric acid + nitric acid + acetic acid, which has a strong temperature dependence of the etching rate for silicon.

According to a fifth aspect of the present invention, there is provided a wafer flattening device, which comprises at least a light source for exposing the wafer, a photomask for absorbing and shielding a light beam emitted from the light source, and a wafer. And a wafer holder for holding the wafer in an etchant, and an etching bath for flattening the wafer by etching.

With such an apparatus of the present invention, the light flux emitted from the light source is absorbed and shielded when passing through the photomask having a pattern corresponding to the thickness distribution of the wafer, and the light flux of the wafer is transferred onto the wafer. Draw a light intensity pattern that accurately reproduces the thickness distribution. The wafer is held in a wafer holder and placed in an etching bath filled with an etchant. The thus exposed wafer has a temperature distribution similar to its thickness distribution, and is etched in an etchant whose etching rate has temperature dependence, so that the wafer can be flattened.

The invention described in claim 6 of the present invention is the wafer flattening apparatus according to claim 5, wherein the light source and / or the wafer holder for exposing the wafer are parallel to the wafer surface to be processed. It is characterized by having a movable drive mechanism. As described above, the light source, the wafer holder, or both of them can be moved in parallel to the wafer surface, and the wafer can be scanned for exposure.

The invention according to claim 7 of the present invention is the wafer flattening apparatus according to claim 5 or 6, wherein the etchant in the etching bath is circulated to control the liquid temperature and the etchant concentration. A system is provided. Since the etchant liquid temperature and concentration affect the etching rate, in order to perform accurate etching according to the thickness distribution, the etchant is circulated and a circulation system for controlling the liquid temperature and concentration is provided, and the wafer is It has become possible to achieve more accurate flattening.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto. FIG. 1 shows a schematic flow chart of the method according to the invention. FIG.
FIG. 1 is a schematic sectional view of a wafer flattening device according to the present invention.

As shown in FIG. 1, the method of the present invention comprises: 1) a wafer thickness distribution measuring step; 2) a photomask making step;
3) Etching process step.

First, in the 1) wafer thickness distribution measuring step, the thickness distribution of the wafer is measured, and a map is created by contour lines according to the distribution. The wafer used is shown in FIG.
Although the one obtained in the step A of slicing the silicon single crystal ingot may be used, in order to finally obtain a wafer with a higher degree of flatness, the thickness distribution is measured and the surface to be flattened is measured. In order to eliminate the influence of the opposite surface (back surface) and the influence of the warp of the wafer, after the chamfering step B of FIG.
It is preferable to use one that is lightly wrapped (step C) or lightly etched (step D).

The thickness distribution of the wafer thus prepared is measured. For the measurement, for example, two probes are opposed to each other to generate an electric field, and a capacitance generated between them is detected to measure the thickness. A microscan (trade name of ADE company)
According to the method. By measuring while scanning the wafer surface, it is possible to measure the thickness of several thousand points on one wafer and create a map of contours of the thickness distribution from the results. An example of creating a map from the measurement results is shown in FIG.

Next, based on the thickness distribution data obtained above, 2) a photomask making process is started. The photomask includes a shielding material (absorber) that absorbs and shields a light beam, and a substrate (support). As the shielding material, for example, a metal thin film of chromium or the like, graphite, a pigment, various inks or the like can be used, depending on the wavelength of light used. As the substrate, it is required that it has sufficient transmittance for the light flux used, does not cause deterioration, etc., and has a small coefficient of thermal expansion, and a quartz substrate is most suitable for this, but it is expensive. Other glass materials or various transparent resins can also be used.

The pattern processing may be performed by a general photo-etching process using a drawing device such as a pattern generator. In this case, the patterning is based on the contour map obtained in the 1) wafer thickness distribution measurement step, and the thicker part of the wafer is thinner than the shielding material, and the thinner part of the wafer is It is carried out by thickly attaching the shielding material to the substrate, and draws a shading diagram with the thickness distribution of the shielding material that is completely opposite to that of the measurement wafer.

Thus, the photomask used in the present invention is manufactured. When the wafer is irradiated with light through such a photomask, the wafer has a light intensity pattern having a distribution exactly the same as its thickness distribution. Will be drawn. As a result, the wafer surface has a temperature distribution similar to its thickness distribution.

After the photomask is manufactured, next, 3) the wafer etching process is started. First, FIG.
A wafer flattening apparatus for carrying out the wafer flattening method of the present invention will be described below.

This apparatus includes at least a light source 1 for exposing a wafer 3, a photomask 2 for absorbing and blocking the light flux emitted from the light source 1, and a wafer holder 4 for holding the wafer 3 in an etchant 9. , An etching bath 5 for flattening the wafer 3 by etching.

An ultraviolet lamp, a xenon lamp, a halogen lamp, an infrared lamp or the like can be used as the light source 1, and a lens (not shown) is provided on the side where the light is emitted toward the mask in order to make the light flux parallel rays. Has been.

The photomask 2 is placed on a mask holder 10 located between the light source 1 and the wafer 3, and is cooled by a fan 8 in order to prevent the temperature from rising due to exposure to a light beam. This mask holder 10 ensures that the mask pattern and the wafer can be superimposed.
It is an XY table.

The etching bath 5 is filled with an etchant 9 so that the wafer 3 can be set on the wafer holder 4 dipped in the etching bath 9 for exposure and etching. In this case, as a matter of course, the wafer holder 4 and the etching bath 5 need to be protected from the etchant 9 used. For example,
If a mixed acid of hydrofluoric acid + nitric acid + acetic acid is used as an etchant as in the case of processing silicon, Teflon resin can be used.

Further, in the apparatus shown in the figure, the wafer holder 4 and the mask holder 10 can be moved by the holder driving mechanism 6 in parallel with the surface of the wafer 3 to be processed. In this case, a slit (not shown) is installed between the light source 1 and the mask 2, for example, at the tip of the light source 1 on the exit side, and the holder driving mechanism 6 moves the wafer holder in parallel to the wafer surface. The wafer can be scanned and exposed.

Further, the apparatus shown in FIG. 2 is provided with a cooling bath 7 so that the etchant 9 in the etching bath 5 can be circulated to control the liquid temperature and the etchant concentration. The etchant 9 is circulated by using the pumps 14 and 14 ′ to discharge the etchant from the etching tank 5 to the cooling tank 7 via the discharge pipe 12, and further to return to the etching tank 5 via the supply pipe 13. There is. The cooling tank 7 is cooled by the cooler 15 and is always kept at a constant temperature. Further, by monitoring the etchant concentration in the cooling bath 7, the etchant concentration in the cooling bath 7 can be kept constant and the etchant concentration in the etching bath 5 can be controlled and controlled to be constant.

This is because the etchant liquid temperature and concentration affect the etching rate, so that the etchant is circulated in order to perform accurate etching according to the thickness distribution of the wafer. A control circulation system is provided so that the wafer can be planarized with higher accuracy. Here, the discharge pipe 12
The tip of the is placed close to the surface of the wafer being etched, because the etchant immediately after the treatment has a high liquid temperature and its concentration also fluctuates, so these effects are eliminated. The etchant after processing is immediately circulated so that accurate etching can be performed.

Next, the step of flattening the wafer by using the apparatus of the present invention will be described. The light beam emitted from the light source 1 becomes a parallel light beam by a lens (not shown) provided between the light source 1 and the photomask 2, and enters the photomask 2 perpendicularly. Then, when passing through the photomask 2 having a shielding material pattern corresponding to the thickness distribution of the wafer 3, a light intensity pattern that is absorbed and shielded and accurately reproduces the thickness distribution of the wafer is drawn on the wafer 3. The overlay accuracy of the pattern of transmitted light and the wafer is
Adjust with XY table. The wafer 3 is held by the wafer holder 4 and placed in the etching tank 5 filled with the etchant 9, and the exposed wafer 3 has a temperature distribution similar to its thickness distribution. In general,
Since the etching rate depends on the temperature, the wafer is etched according to its temperature distribution, and the high temperature portion is etched more and the low temperature portion is slightly etched off.
From the measurement result of the thickness distribution of the wafer, the time required for the flattening is calculated in advance, and the etching is performed for that time. Thus, the wafer 3 can be flattened.

In this case, in order to expose the wafer 3 in the etchant 9 through the photomask 2, a slit is provided between the light source 1 and the photomask 2, and the light flux is formed into a slit shape so as to be opposed to the photomask 2 and the wafer 3. Therefore, it is desirable to expose the wafer 3 by scanning the light source 1 from one end to the other end of the wafer 3. This may be done by exposing the entire wafer at one time,
By scanning the light flux as a slit using a slit, the temperature distribution in the wafer surface is disturbed due to heat transfer in the wafer 3, convection of the etchant 9, scattering of light flux, etc. This is to prevent the problem that the depth distribution cannot be reproduced by the temperature distribution or the etching rate varies.

Further, according to the present invention, the temperature dependence of the etching rate is utilized to flatten the wafer. Therefore, the selection of the etchant for the processed wafer, the grasp of the etching rate, the reproducibility, etc. are extremely important. However, in the case of planarizing a semiconductor silicon wafer, it is preferable to use a mixed acid of hydrofluoric acid + nitric acid + acetic acid as an etchant. As the mixing ratio, for example, the volume ratio is 1: 2 :.
It may be set to 1.

As shown in FIGS. 4 and 5, the relationship between the solution temperature and the etching rate and the relationship between the etching solution use time and the etching rate, respectively, show that the etching rate of the etchant depends on the temperature and the concentration. This is because it is accurately and reproducibly grasped (for example, refer to “Precision Processing Technology of Crystal Material for Electronics”, Science Forum, P441). Therefore, if the above-mentioned mixed acid etchant is used and the circulation system is installed in the apparatus to control and control the liquid temperature and concentration of the etchant, accurate etching can be performed and the flatness of the wafer to be processed can be improved. be able to.

Here, when the silicon wafer is flattened by etching in this way, the etchant liquid temperature is set to about 5 ° C. in order to minimize the etching amount of the portion on the wafer not exposed to light. Is preferred. Further, the concentration of the etchant may be such that a predetermined amount of fresh mixed acid is added during the operation in order to make the solubility of silicon and the mixed acid component constant.

The present invention is not limited to the above embodiment. The above embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the scope of the claims of the present invention. It is included in the technical scope of the invention.

For example, in the above embodiment, the case of semiconductor silicon was described as an example of the wafer to be planarized, but the present invention is not limited to this, and other semiconductor materials, compound semiconductor single crystals, and oxides. Even a single crystal or a metal material can be planarized by the etching of the present invention. The light source, the shielding material for the photomask, the substrate, and the etchant used in the present invention may be appropriately selected so that an appropriate temperature distribution and etching rate can be obtained from the type of wafer to be processed, its flatness, and the like. .

Further, in the above embodiment, in measuring the thickness distribution of the wafer and creating the map, two probes are opposed to each other to generate an electric field, and the electrostatic capacitance generated therebetween is detected to measure the thickness. Although the example according to the method has been described, the present invention is not limited to this, and another method may be used as long as it is a method capable of measuring the thickness distribution of the wafer and forming a pattern. For example, it is possible to show a pattern of surface irregularities by a magic mirror topograph.
cal Reflection Projecto
r), or a full surface interferometer may be used.

Further, in the above embodiment, the case where the light flux is formed into a slit shape in the exposure method and the light source is scanned from one end of the wafer to the other end relative to the photomask and the wafer has been described as an example. The present invention is not limited to this, the light flux is a cell of a constant area,
The wafer may be exposed stepwise. As for the driving mechanism for scanning or stepping, the example in which the wafer holder is driven has been described in the above embodiment, but the light source or both the light source and the wafer holder may be driven.

Further, in the above embodiment, the description has been made on the premise that the pattern of the photomask is the same size as the wafer, but the present invention is not limited to this, and the pattern is more accurate. Alternatively, a pattern may be formed on a larger substrate, and the wafer may be exposed through a reduction lens provided between the photomask and the wafer.

Further, in the above embodiment, the case where the etchant is circulated in order to manage and control the liquid temperature and the concentration of the etchant has been described, but the present invention is not limited to this, and the etching bath is not limited to this. Various replacement modes are possible by general techniques, such as placing in a constant temperature bath or mounting a cooler directly in the etching bath.

[0045]

As described above, in the wafer flattening method and the wafer flattening apparatus according to the present invention, since the wafer is flattened by utilizing the temperature dependence of the etching rate, the conventional mechanical flattening method is used. Problems such as wafer surface distortion, contamination or surface plate wear, large size complication, and polishing pad instability, which are problems in flattening the wafer by the method, and further problems in the PACE method. It is possible to solve the problem of low productivity due to defects and distortion.

[Brief description of drawings]

1 is a flow chart showing the general steps of a method according to the present invention.

FIG. 2 is a sectional view schematically showing a wafer flattening apparatus according to the present invention.

FIG. 3 is a diagram showing an example of creating a map by contour lines of thickness distribution from the result of measuring the thickness of a wafer by a microscan method.

FIG. 4 is a diagram showing temperature dependence of etching rate.

FIG. 5 is a diagram showing a relationship between an etching rate and a use time thereof.

FIG. 6 is a flow chart showing a conventional silicon mirror surface wafer manufacturing process.

[Explanation of symbols]

1 ... Light source, 2 ... Photomask, 3 ... Wafer, 4 ... Wafer holder, 5 ... Etching tank, 6 ... Holder drive mechanism, 7 ... Cooling tank,
8 ... fans, 9 ... etchants, 10 ...
Mask holder, 12 ... Discharge pipe,
13 ... Supply pipe, 14, 14 '... Pump, 1
5 ... Cooler.

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[Procedure amendment]

[Submission date] June 20, 1996

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Name of invention

[Correction method] Change

[Correction contents]

Title: Method and wafer flattening apparatus for flattening a wafer by etching

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hitoshi Misaka Odaira, Ogokura, Nishigokawa-mura, Nishishirakawa-gun, Fukushima 150 Inside the Shirakawa Research Center, Semiconductors, Shin-Etsu Semiconductor Co., Ltd. 150 Shin-Etsu Semiconductor Co., Ltd. Semiconductor Shirakawa Research Center

Claims (7)

[Claims] 1. A method for flattening a wafer, which comprises: 1) first measuring the thickness distribution of the wafer; 2) then producing a photomask from the thickness distribution data; and 3) this photomask. A method of flattening a wafer by etching, which comprises exposing the wafer in an etchant through the above to etch the wafer with a temperature distribution according to its thickness distribution. 2. When exposing a wafer in an etchant through a photomask, the light flux is formed into a slit shape, and light is exposed by scanning a light source from one end of the wafer to the other end relative to the photomask and the wafer. A method for flattening a wafer by etching according to claim 1. 3. The method for flattening a wafer by etching according to claim 1 or 2, wherein the wafer is a semiconductor silicon wafer. 4. The method of flattening a wafer by etching according to claim 3, wherein a mixed acid of hydrofluoric acid + nitric acid + acetic acid is used as the etchant. 5. A light source for exposing a wafer, a photomask for absorbing and shielding a light beam emitted from the light source, a wafer holder for holding the wafer in an etchant, and a flattening treatment for the wafer by etching. A wafer flattening apparatus comprising: an etching bath. 6. A light source and / or for exposing a wafer
Alternatively, the wafer flattening apparatus according to claim 5, wherein the wafer holder has a drive mechanism capable of moving parallel to a wafer surface to be processed. 7. The wafer flattening apparatus according to claim 5, further comprising a circulation system for circulating the etchant in the etching bath to control the liquid temperature and the etchant concentration.