JPH09211421A - Active matrix device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an active matrix device of high picture quality and high definition by reducing pixel dimensions without loss of display characteristic. SOLUTION: This device is comprised of a horizontal address circuit 2, a vertical address circuit 3, and an image display part which arrays, like the matrix, pixel unit 30 supplied with a pixel signal and a scanning signal respectively. The pixel unit 30 consists of a switching element 1 provided with the first through third electrodes, a liquid crystal display element 9, and a capacitive element 14. Each scanning line consists of the first and second scanning line parts L1 and L2 divided into two branches, and a first electrode 4 of a switching element 1 is connected with a signal line 5, and a second electrode 6 of the switching element 1 is connected with the first and second scanning line parts L1 and L2 in common and a third electrode 8 of the switching element 1 is connected with one end each of the liquid crystal display element 9 and the capacitive element 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix device for driving a liquid crystal display with active matrix elements.

[0002]

2. Description of the Related Art First, a conventional active matrix device used for liquid crystal display will be described. FIG. 6 is a circuit diagram of an active matrix device used for liquid crystal display.
FIG. 7 shows a partially cutaway perspective view thereof. 1 is a switching transistor (switching element), 2 is a horizontal address circuit, 3 is a vertical address circuit, 4 is a source electrode (first electrode), 4c is a source contact, 5 is a signal line, and 6 is a gate. -Electrode (second electrode), 7 for scanning line, 8 for drain electrode (third electrode), 8c for drain contact, 9 for liquid crystal display element, 10 for pixel electrode, 10c for pixel electrode contact, 11 for Liquid crystal, 12 is a counter electrode, 13 is a counter substrate,
14 is a capacitor, 15 is a Si substrate, 16 is a channel layer, 16a and 16b are upper and lower ends of the channel layer, 17 is an auxiliary capacitance electrode, 17c is an auxiliary capacitance electrode contact, 18 is a gate oxide film, and 19 is An insulating film, 20 is a semiconductor thin film made of polysilicon or amorphous silicon, and 21 is a glass substrate. Further, 30a is one pixel unit of a large number of pixels arranged in a matrix.

Switching transistors 1, which are selectively driven by the horizontal and vertical address circuits 2 and 3, are arranged in a matrix on a Si substrate 15, for example. A signal line 5 is connected to the source electrode 4 of each switching transistor 1, a scanning line 7 is connected to the gate electrode 6, and a pixel electrode 10 is connected to the drain electrode 8. By supplying a selection signal to the scanning line 7, the addressed transistor is turned on, so that the data from the signal line 5 is written to the pixel electrode 10. On the opposite side of the pixel electrode 10 with the liquid crystal 11 interposed therebetween, a counter electrode 12 is arranged so as to face the pixel electrode 10 and cover all pixels, and a liquid crystal capacitor C1 is formed between the counter electrode 12 and the pixel electrode 10. A transparent counter substrate 13 is arranged on the above. The written data is accumulated in the liquid crystal capacitor C1 as an electric charge, and is stored next time (next field).
It is held until it is rewritten. Usually, for the purpose of lengthening this holding time, a capacitor (capacitance element) 14 having an auxiliary capacitance C2 is provided in parallel with the liquid crystal display element 9.

A thin film transistor (TFT) using a semiconductor thin film is often used as the switching transistor 1, but this is a base in a transmissive liquid crystal device.
This is because a quartz substrate is used as the substrate. Since it is not necessary to use a transparent substrate in the reflective liquid crystal device, a semiconductor substrate having excellent characteristics and advanced fine processing technology can be used like a Si substrate.

Next, the layout configuration of each pixel of the reflection type active matrix device when the Si substrate is used for manufacturing the switching transistor will be described with reference to the following drawings. Since each pixel has the same pixel configuration, the one pixel unit 30a will be described as an example. FIG. 8 is a layout plan view in which the liquid crystal display element 9 of the pixel unit 30a of the conventional reflective active matrix device as shown in FIG. 7 using a Si substrate is removed. FIG. 9 shows FIG.
It is the AA sectional view seen from the inside and the left direction. The switching transistor 1, the scanning line 7, and the auxiliary capacitance electrode 17 are all formed on a Si substrate 15 having a gate oxide film 18. The signal line 5 is connected to the source electrode 4, is orthogonal to the scanning line 7, and is formed in the insulating layer 19 so as not to be conductive.

The channel layer 16 of the switching transistor 1 is arranged between the scanning line 7 and the auxiliary capacitance electrode 17, and is embedded in the Si substrate 15 so as to have a rectangular shape. The upper end portion 16a of the channel layer 16 is arranged parallel to and close to the scanning line 7. Channel layer 1
The distance between the lower end 16b of 6 and the scanning line 7 is b '(3 μm)
It is made to become. The scanning line 7 has a width a of 2 μm so as not to be broken, and is branched at approximately the center above the channel layer 16 to form the gate electrode 6. The channel layer 1 is formed so that the switching transistor 1 does not malfunction due to insufficient wiring to the gate electrode 6.
4, the lower end portion 1 of the channel layer 16 on the side of the auxiliary capacitance electrode 17
The wiring is extended by a length c (1 μm) beyond 6b. The auxiliary capacitance electrode 17 has a rectangular shape, is arranged adjacent to the channel layer 16, and is separated from the tip end 6a of the gate electrode 6 branched so as not to be conductive, with a distance d '(1 μm), and the auxiliary pixel electrode of the next pixel. The scanning line 7 and the scanning line 7 are arranged at a distance f (1 μm). The vertical length of the auxiliary capacitance electrode 17 is set to e (6 μm) so that a sufficient storage capacitance can be obtained. As a result, the vertical dimension of one pixel is 14 μm. On the other hand, the horizontal dimension is determined by the horizontal length g of the auxiliary capacitance electrode 17.

Next, the layout configuration of each pixel of the reflection type active matrix device when a TFT (thin film transistor) is used for manufacturing the switching transistor will be described. When a TFT is used, a glass substrate on which a conductive semiconductor thin film is formed is used, which is different from the case where a Si substrate is used. Similar to the case where the Si substrate is used, each pixel has the same pixel configuration, and therefore, one pixel unit will be described as an example. FIG. 10 is a layout plan view in which the liquid crystal display element 9 of the one pixel unit 30a of the conventional reflection type active matrix device when the TFT is used for the switching transistor 1 is removed. 11 is a cross-sectional view taken along the line AA seen from the left side in FIG. When a TFT is used for the switching transistor 1, a semiconductor thin film 20 is formed on a glass substrate to serve as a conductive layer.

That is, the layout is as follows. A drain electrode 8, a source electrode 4 and a gate are formed on a glass substrate 21 on which a semiconductor thin film 20 and a gate oxide film 18 are sequentially formed.
The switching transistor 1 having the gate electrode 6 and the auxiliary capacitance electrode 17 are formed. The auxiliary capacitance electrodes 17 arranged in the horizontal direction of each pixel are connected to each other in a line. The switching transistor 1 is arranged between the scanning line 7 and the auxiliary capacitance electrode 17, and the drain electrode 8 is connected to the auxiliary capacitance electrode 17 via the semiconductor thin film 20. The arrangement of the scanning line 7, the switching transistor 1 and the auxiliary capacitance electrode 17 is the same as in the case of the above-mentioned Si substrate, and therefore the description thereof is omitted. Also in this case, the vertical dimension of one pixel is 14 μm. On the other hand, the horizontal dimension is determined by the horizontal length g of the auxiliary capacitance electrode 17.

[0009]

However, it is necessary to reduce the size of each pixel unit in order to obtain high quality images and high definition images. When is small, the following problems occur. When the scanning line width a is narrowed, the resistance value of the scanning line is increased, and when the interval b ′ is narrowed, the driving ability of the transistor is lowered, which is disadvantageous to the high-speed rewriting response of the liquid crystal 11. c, d ', e
When the width is narrowed, it becomes a factor which significantly reduces the manufacturing yield of the active matrix device. Further, if the vertical length e of the auxiliary capacitance electrode is narrowed, the auxiliary capacitance is reduced, the potential holding capacity of the pixel electrode is reduced, and flicker occurs, which affects display characteristics.

Therefore, the present invention has been made by paying attention to the above points, and provides an active matrix device in which the pixel size is reduced without adversely affecting the transistor characteristics, the pixel potential holding characteristics, the manufacturing yield, and the like. That is the purpose.

[0011]

The present invention has been made in view of such a problem, and the invention according to claim 1 is a horizontal address circuit 2 for sequentially outputting pixel signals via a signal line 5, An active matrix device including a vertical address circuit 3 that sequentially outputs a scanning signal via a scanning line 7, and an image display unit in which pixel units 30 to which the pixel signal and the scanning signal are respectively supplied are arranged in a matrix. Therefore, each of the scanning lines 7 is composed of first and second scanning line portions L ₁ and L _{2 which} are branched into two, and
Is a switching element 1 including first to third electrodes
, A liquid crystal display element 9 and a capacitance element 14, the first electrode 4 of the switching element 1 is connected to the signal line 5, and the second electrode 6 of the switching element 1 is connected to the first and first electrodes. Two scan line portions L ₁ and L ₂ are commonly connected,
The third electrode 8 of the switching element 1 provides an active matrix device connected to one end of each of the liquid crystal display element 9 and the capacitive element 14.

The image signal output from the horizontal address circuit is supplied to the first electrode of the switching element via the signal line, and the scanning signal output from the vertical address circuit is supplied to the first and second scanning line portions. Then, the switching element is turned on, an image signal is supplied to the liquid crystal display element via the second electrode, and an image can be displayed. By adjusting the widths of the first and second scanning line portions, the vertical pixel size of the pixel unit can be reduced. Since the image signal is supplied to the liquid crystal display element even if a disconnection occurs in either the first or second scanning line portion due to the branching of the scanning line portion, no image is displayed.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. A first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a circuit diagram of an active matrix device of the present invention, and FIG. 2 is a layout in which a liquid crystal display element 9 of a one pixel unit 30 of a reflection type active matrix device using the Si substrate of the present invention as shown in FIG. 1 is removed. It is a top view. FIG. 3 is a sectional view taken along the line AA seen from the left side in FIG. The same components as those described above are designated by the same reference numerals, and the description thereof will be omitted. Reference numeral 30 is a pixel unit of a large number of pixels arranged in a matrix, and L ₁ is a first pixel unit.
Scan line, L ₂ is the second scan line. 1 and 2 branch the scanning line 7 in FIGS.
The first scanning line L ₁ and the second scanning line L ₂ are connected to the gate electrode 6 of the switching transistor 1 at a substantially central portion above the channel layer 16 with the channel layer 16 formed therein interposed therebetween. It is equal to the one.

The details will be described below. Two scanning lines L ₁
And the width of each of L ₂ is a / 2 (1 μm), and the total width of the first and second scanning lines L ₁ and L ₂ is equal to the width of the scanning line 7 in FIGS. , The resistance of the scanning line is not changed. First scan line and second
The distance between the scanning line and the scanning line is b (3 μm). As described with reference to FIGS. 8 to 9, the second scanning line L ₂ and the auxiliary capacitance electrode 1
The distance between the auxiliary capacitance electrode 1 and the electrode 7 is d (1 μm).
The vertical length of 7 is e (6 μm), and the auxiliary capacitance electrode 17
And the first scanning line L ₁ of the next pixel unit has a distance of f (1 μm). In addition, the first and second scanning lines L ₁
Further, L ₂ , the gate electrode 6 and the auxiliary capacitance electrode 17 are made of polysilicon of the same material, which facilitates manufacturing.

By doing so, the length c (1 μm) described in FIGS. 8 to 9 is unnecessary, and the dimension of the pixel unit in the vertical direction can be reduced to 13 μm. Therefore,
The pixel unit size in the vertical direction can be reduced by 1 μm.

Next, a second embodiment of the present invention will be described with reference to FIGS. FIG. 4 shows a one-pixel unit 30 when a TFT is used instead of the switching transistor 1.
9 is a layout plan view in which the liquid crystal display element 9 is removed.
FIG. 5 is a sectional view taken along the line AA as seen from the left in FIG. The same components as those described above are designated by the same reference numerals, and the description thereof will be omitted. 4 and 5 show a first scanning line L ₁ and a second scanning line L ₂ that branch the scanning line 7 in FIGS. 10 to 11.
Are wired in parallel with each other with the switching transistor 1 sandwiched therebetween, connected to the gate electrode 6, and are integrated with each other. This will be described in detail below.

The width of each of the first and second scan lines L ₁ and L ₂ is a / 2 (1 μm), and the total width of the first and second scan lines L ₁ and L ₂ is shown in FIGS. It is made equal to the width of the scanning line 7 in FIG. 11 so that the resistance value does not change. The width of the first scanning line L ₁ and the second scanning line is b (3 μm). The distance between the second scanning line L ₂ and the auxiliary capacitance electrode 15 is d (1 μm), the vertical length of the auxiliary capacitance electrode 15 is e (6 μm), and the auxiliary capacitance electrode 1
5 and the scanning line L ₁ of the next pixel unit is separated by f
(1 μm). By doing so, FIG.
The length c (1 μm) described in 1 is unnecessary, and the dimension of the pixel unit in the vertical direction can be reduced to 13 μm. Therefore, the pixel unit size in the vertical direction can be reduced by 1 μm.

According to the first and second embodiments, the following effects can be obtained. By reducing the vertical dimension of each pixel unit by 1 μm, the density can be increased, so that a high-definition and high-resolution image can be obtained. When the pixel unit size is 14 μm, 1 μm for any of a to f
The element performance can be improved by allocating the elements. For example, widening the switching transistor width b can improve the rewriting speed of each pixel unit. Second scanning line L ₁ and auxiliary capacitance electrode 15
A broad interval f between the scanning line L ₁ of the distance d or the auxiliary capacitance electrodes 15 and the next pixel units between, pattern of the substrate - is a margin in manufacturing a down manufacturing yield is improved since it. When the length e of the auxiliary capacitance electrode 17 is widened, the potential holding characteristic of the pixel electrode is improved, and it is possible to improve the image quality such as flicker of the displayed image. When making scan lines,
If the scanning line is cut off due to a foreign substance or other factors on the screen, a signal for displaying an image is not transmitted, resulting in a dot defect. However, by using two scanning lines as in the present invention, Even if one of the wires is broken, the other one holds the continuity, so that it does not become a defect, and a high-resolution image can be maintained. This can improve the manufacturing yield of the device.

[0019]

As described above, according to the active matrix device of the present invention, it is possible to manufacture an active matrix substrate having a reduced pixel size without deteriorating the element characteristics. Therefore, a high definition / high resolution image can be obtained. Is obtained.
Further, if the pixel configuration is performed without reducing the pixel size, it is possible to improve the device performance such as flicker of image display and the manufacturing yield.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an active matrix device of the present invention.

FIG. 2 is a plan layout diagram of a pixel unit showing a first embodiment of an active matrix device using a Si substrate of the present invention.

FIG. 3 is a cross-sectional view taken along the line AA of the pixel unit in FIG.

FIG. 4 is a plan layout view of a pixel unit showing a second embodiment of an active matrix device using the TFT of the present invention.

5 is a cross-sectional view taken along the line AA of the pixel unit in FIG.

FIG. 6 is a circuit diagram of a conventional active matrix device used for liquid crystal display.

7 is a partially cutaway perspective view of the device shown in FIG.

FIG. 8 is a plan layout view of a pixel unit of an active matrix device when a conventional Si substrate is used.

9 is a cross-sectional view taken along the line AA of the pixel in FIG.

FIG. 10 is a plan layout view of a pixel unit of an active matrix device when a conventional TFT is used.

11 is a cross-sectional view taken along the line AA of the pixel unit in FIG.

[Explanation of symbols]

1 ... Switching transistor (switching element), 2 ... Horizontal address circuit, 3 ... Vertical address circuit,
4 ... Source electrode (first electrode), 5 ... Signal line, 6 ...
Electrode (second electrode), 7 ... scanning line, 8 ... drain electrode (third electrode), 9 ... liquid crystal display element, 10 ... pixel electrode,
11 ... Liquid crystal, 12 ... Counter electrode, 13 ... Counter substrate, 14 ...
Capacitor (capacitance element), 15 ... Si substrate, 16 ... Channel layer, 17 ... Auxiliary capacitance electrode, 18 ... Gate oxide film,
19 ... Insulating film, 20 ... Semiconductor thin film, 21 ... Glass substrate,
30, 30a ... Pixel unit, L ₁ ... First scanning line L
₂ ... second scan line

Claims (1)

[Claims] 1. A horizontal address circuit for sequentially outputting a pixel signal via a signal line, a vertical address circuit for sequentially outputting a scan signal via a scan line, and a pixel unit to which the pixel signal and the scan signal are respectively supplied. And an image display section in which the pixels are arranged in a matrix, each scanning line includes first and second scanning line sections that are bifurcated, and the pixel unit includes a first scanning line section. To a switching element having a third electrode, a liquid crystal display element, and a capacitive element, the first electrode of the switching element is connected to the signal line, and the second electrode of the switching element is the second electrode. 1st and 2nd
And a third electrode of the switching element is connected to one end of each of the liquid crystal display element and the capacitive element.