JP4801835B2 - Electrode substrate for display device - Google Patents

Electrode substrate for display device Download PDF

Info

Publication number
JP4801835B2
JP4801835B2 JP2000340936A JP2000340936A JP4801835B2 JP 4801835 B2 JP4801835 B2 JP 4801835B2 JP 2000340936 A JP2000340936 A JP 2000340936A JP 2000340936 A JP2000340936 A JP 2000340936A JP 4801835 B2 JP4801835 B2 JP 4801835B2
Authority
JP
Japan
Prior art keywords
wiring
active element
image display
unit
drive circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000340936A
Other languages
Japanese (ja)
Other versions
JP2002148645A (en
Inventor
和夫 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Display Central Inc
Original Assignee
Toshiba Mobile Display Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Mobile Display Co Ltd filed Critical Toshiba Mobile Display Co Ltd
Priority to JP2000340936A priority Critical patent/JP4801835B2/en
Publication of JP2002148645A publication Critical patent/JP2002148645A/en
Application granted granted Critical
Publication of JP4801835B2 publication Critical patent/JP4801835B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、表示装置用電極基板に関し、詳しくは、駆動回路を内蔵するアクティブマトリクス型液晶表示装置に用いられる表示装置用電極基板に関する。
【０００２】
【従来の技術】
液晶表示装置の一つとして、薄膜トランジスタ（以下、ＴＦＴ）をスイッチング素子とするアクティブマトリクス型液晶表示装置（以下、ＴＦＴ−ＬＣＤ）の開発が盛んである。この表示装置は、例えばガラス等の透明絶縁基板上に設けられたスイッチング素子を用いて一画素の液晶に加わる電圧を制御する方式のため、画質が鮮明であるという特徴を備えており、ＯＡ機器端末やテレビジョン画面等のグラフィックディスプレイとして広く用いられている。
【０００３】
近年では、同一面積の透明絶縁基板上での有効画面領域を広げ、且つ製造コストの低減を図るため、特に多結晶珪素ＴＦＴ（以下、ｐ−ＳｉＴＦＴ）を用いたＴＦＴ−ＬＣＤにおいて、走査線及び信号線の各駆動回路を、画像表示部と同時に透明絶縁基板上に一体形成した駆動回路内蔵型ＴＦＴ−ＬＣＤが開発されている。
【０００４】
図３は、駆動回路内蔵型ＴＦＴ−ＬＣＤの一般的な回路構成図である。透明絶縁基板１０の主面上には、複数本の走査信号線１１と、これに直交する複数本の信号線１２が互いに交差するように配置されており、走査信号線１１の端部は走査線駆動回路１７に、信号線１２の端部は信号線駆動回路１８に接続されている。そして、これら各線の交点近傍には能動素子であるＴＦＴ１３が接続されている（図３では、そのうちの一つを拡大して示している）。ＴＦＴ１３のドレイン電極には液晶容量１５と補助容量１４が電気的に並列に接続されて一つの画素Ａを形成している。この画素Ａの集まりが透明絶縁基板１０上の画像表示部１９となる。また、補助容量１４の他方の電極には補助容量線１６が接続されている。
【０００５】
【発明が解決しようとする課題】
上記のような駆動回路内蔵型ＴＦＴ−ＬＣＤでは、透明絶縁基板上に形成される素子密度及び配線密度が増大するため、同一プロセス条件下では、駆動回路を内蔵しない画像表示部のみの液晶表示装置と比較して、ダストの影響を受けやすくなる。即ち、素子密度及び配線密度の増大により、駆動回路での配線幅が狭くなったり、配線間の間隔が狭くなると、液晶表示装置のパターン形成プロセス等でダストによりパターン形成の一部に欠陥が生じ、例えば図４（ａ）に示すように配線がオープンしてしまったり、或いは図４（ｂ）に示すように配線間が導電性領域でショートしてしまうなどの配線欠陥が起こりやすくなり、製造時の歩留りが低下することになる。
【０００６】
本発明の目的は、製造時に配線欠陥が発生しにくく、歩留まりに優れた表示装置用電極基板を提供することにある。
【０００７】
【課題を解決するための手段】
上記目的を達成するため、請求項１の発明は、能動素子部を含む画素が規則的に複数配置された画像表示部と、前記画像表示部の能動素子部と同一形式の能動素子部を含む駆動回路とを有する表示装置用電極基板において、前記駆動回路の能動素子部のドレインに接続される配線の配線幅を、前記画像表示部の能動素子部のゲートに導通する金属配線の配線幅よりも広くするとともに、前記駆動回路の能動素子部のソースの延長上にある電源電位の配線の配線幅を、前記画像表示部の能動素子部のドレインに導通する配線の配線幅よりも広くすることを特徴とする。
【０００８】
好ましい形態として、前記駆動回路の能動素子部を除く最小配線幅を、前記画像表示部の能動素子部を除く最小配線幅よりも広くする。
【０００９】
請求項２の発明は、能動素子部を含む画素が規則的に複数配置された画像表示部と、前記画像表示部の能動素子部と同一形式の能動素子部を含む駆動回路とを有する表示装置用電極基板において、前記駆動回路の能動素子部の第１のソースの延長上にある電源電位の配線と、前記駆動回路の能動素子部の第２のソースの延長上にある接地電位の配線との間隔を、前記画像表示部の能動素子部のソースと画素電極を接続する金属配線と、前記画像表示部の能動素子部のドレインに導通する配線との間隔よりも広くしたことを特徴とする。
【００１０】
好ましい形態として、前記駆動回路の能動素子部を除く配線の最小間隔を、前記画像表示部の能動素子部を除く配線の最小間隔よりも広くする。
【００１１】
好ましい形態として、上記請求項１及び請求項２における能動素子部を、ｐ−ＳｉＴＦＴにより形成する。
【００１２】
請求項３の発明は、請求項１又は２において、 前記駆動回路の能動素子部のドレインに接続される配線と前記画像表示部の能動素子部のゲートに導通する金属配線とは同一層に形成され、前記駆動回路の能動素子部の前記電源電位の配線と前記画像表示部の能動素子部のソースと画素電極を接続する配線とは同一層に形成されていることを特徴とする。
【００１３】
請求項４の発明は、請求項１乃至３において、前記画像表示部と前記駆動回路が同一プロセスにより形成されることを特徴とする。
【００１４】
【発明の実施の形態】
以下、本発明に係わる表示装置用電極基板を、図３に示すような駆動回路内蔵型ＴＦＴ−ＬＣＤ適用した場合の実施形態について説明する。
【００１５】
図２は、図３に示す画素Ａの詳細を示した概略平面図であり、とくに能動素子部とその周辺の電極パターンを示している（以下、図２に示す電極パターンを画素部と総称する）。図２において、１０１は能動素子であるＴＦＴを構成する多結晶珪素薄膜、１０２は第１金属配線、１０３は第２金属配線、そして１０４はコンタクトホールである。また、二点鎖線で囲まれた領域は図１のＴＦＴ１３が配置されている（画素）能動素子部１である。第１金属配線１０２はＴＦＴ１３のゲートＧにもなり、第２金属配線１０３はコンタクトホール１０４を介してＴＦＴ１３のソースＳを形成する。図に示したＤ、Ｇ、Ｓは、ＴＦＴ１３のドレイン、ゲート、ソースに当たる部分であり、ソースＳの延長線上に補助容量１４を構成する部分が形成されている。ここで、ゲートＧに導通する第１金属配線１０２の幅をＷ１ｐｉｘとし、それとは異なる層に配線されたドレインＤに導通する配線１０５の幅をＷ２ｐｉｘとする。また、この能動素子部１での同一層における配線間の間隔をＳｐｉｘとする。
【００１６】
図１は、図３に示す走査線駆動回路１７の一部分の詳細を示した概略平面図であり、とくに能動素子部とその周辺の電極パターンを示している（以下、図１に示す電極パターンを駆動回路部と総称する）。図１において、二点鎖線で囲まれた領域は（駆動回路）能動素子部２であり、走査線駆動回路１７の終段のインバータを構成するＰ型とＮ型のＴＦＴが形成されている。Ｓｐ、Ｇｐ、ＤはＰ型ＴＦＴトのソース、ゲート、ドレインであり、Ｓｎ、Ｇｎ、ＤはＮ型ＴＦＴのソース、ゲート、ドレインである。両ＴＦＴ共通のドレインは、その延長上にある配線２０１で走査線に接続される。Ｐ型ＴＦＴのソースＳｐの延長上にある配線はＶＤＤ（電源）電位の配線２０２に接続されている。また、Ｎ型ＴＦＴのソースＳｎの延長上にある配線はＧＮＤ（接地）電位の配線２０３に接続されている。ここで、配線２０１の幅をＷ１ｃｉｒとし、配線２０２の幅をＷ２ｃｉｒとする。また、この能動素子部２での同一層における配線２０２、２０３の間隔をＳｃｉｒとする。
【００１７】
なお、図１では走査線駆動回路１７を例に挙げて駆動回路部を説明したが、信号線駆動回路１８についても同様に駆動回路部を構成することができる。
【００１８】
次に、図１に示した駆動回路部と図２に示した画素部における配線幅及び配線間隔について比較する。
【００１９】
図１に示した配線２０１の幅Ｗ１ｃｉｒは、図２に示した第１金属配線１０２の幅Ｗ１ｐｉｘよりも広く、また、図１に示した配線２０２の幅Ｗ２ｃｉｒは、図２に示した配線１０５の幅Ｗ２ｐｉｘよりも広い。更に、図１に示した配線間隔Ｓｃｉｒは図２に示した配線間隔Ｓｐｉｘよりも広くなるように設定されている。
【００２０】
ただし、図１に示す配線２０１と図２に示す第１金属配線１０２は同一層にある。また、図１に示す配線２０２と図２に示す第２金属配線１０３も同一層にある。以上をまとめると、図１の駆動回路部と図２の画素部では以下の関係が成り立つ。
【００２１】
Ｗ１ｃｉｒ＞Ｗ１ｐｉｘ
Ｗ２ｃｉｒ＞Ｗ２ｐｉｘ
Ｓｃｉｒ＞Ｓｐｉｘ
上式の関係を満たすように配線幅及び配線間隔を設定すると、図１に示した駆動回路部の配線幅及び配線間隔は従来構成に比べて広くなる。したがって、この部分は製造時にダストの影響を受けにくくなり、配線オープン、或いは配線のショートなどの配線欠陥の生じる確率を大幅に少なくすることができる。
【００２２】
ここで、図２に示す画素部の配線幅は従来通りで狭いが、仮に配線欠陥が生じて一画素が機能しなくとも、それを視認することはほとんどできないため、品質に余り影響を与えることはない。しかし、例えば走査線駆動回路１７に配線欠陥が生じて一ラインの走査線が駆動されないと、ライン欠陥として視認されることになり、画像品質に影響する。このため、上記した駆動回路部での配線欠陥を無くすことが品質向上に有効と考えられる。
【００２３】
本実施形態によれば、走査線駆動回路や信号線駆動回路などの駆動回路部の配線の幅及び間隔を画素部の配線の幅及び間隔より広くしたので、製造時にダストによる駆動回路部の配線欠陥が発生しにくくなり、歩留りを向上させることができる。
【００２４】
なお、駆動回路部においては、配線の幅と間隔の両方が広くなくとも、どちらか一方を広くすることで、上記効果を得ることができる。
【００２５】
【発明の効果】
以上詳細に説明したように、本発明によれば、製造時にダストの影響を受けにくくなるので、駆動回路での配線オープンや配線ショートなどの配線欠陥が発生しにくくなり、歩留りに優れた表示装置用電極基板を提供することができる。
【図面の簡単な説明】
【図１】図３の走査線駆動回路の一部分の詳細を示した概略平面図。
【図２】図３の画素Ａの詳細を示した概略平面図。
【図３】駆動回路内蔵型ＴＦＴ−ＬＣＤの一般的な回路構成図。
【図４】従来のダストによる配線欠陥例を示す説明図。
【符号の説明】
１…（画素）能動素子部、２…（駆動回路）能動素子部、１１…走査線、１２…信号線、１３…ＴＦＴ（薄膜トランジスタ）、１４…補助容量、１５…液晶容量、１６…補助容量線、１７…走査線駆動回路、１８…信号線駆動回路、１０１…多結晶珪素薄膜、１０２…第１金属配線、１０３…第２金属配線、１０４…コンタクトホール、１０５，２０１，２０２，２０３…配線[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electrode substrate for a display device, and more particularly to an electrode substrate for a display device used for an active matrix liquid crystal display device incorporating a drive circuit.
[0002]
[Prior art]
As one of liquid crystal display devices, active matrix liquid crystal display devices (hereinafter referred to as TFT-LCDs) using thin film transistors (hereinafter referred to as TFTs) as switching elements are actively developed. Since this display device is a system that controls the voltage applied to the liquid crystal of one pixel using a switching element provided on a transparent insulating substrate such as glass, the display device has a feature that the image quality is clear, and is an OA device. Widely used as graphic displays such as terminals and television screens.
[0003]
In recent years, in order to widen the effective screen area on a transparent insulating substrate having the same area and to reduce the manufacturing cost, particularly in a TFT-LCD using a polycrystalline silicon TFT (hereinafter referred to as p-Si TFT), scanning lines and 2. Description of the Related Art A drive circuit built-in type TFT-LCD in which each drive circuit for signal lines is integrally formed on a transparent insulating substrate simultaneously with an image display portion has been developed.
[0004]
FIG. 3 is a general circuit configuration diagram of a drive circuit built-in TFT-LCD. On the main surface of the transparent insulating substrate 10, a plurality of scanning signal lines 11 and a plurality of signal lines 12 perpendicular to the scanning signal lines 11 are arranged so as to intersect each other, and an end portion of the scanning signal line 11 is scanned. The end of the signal line 12 is connected to the line drive circuit 17 and the signal line drive circuit 18. A TFT 13 that is an active element is connected in the vicinity of the intersection of these lines (FIG. 3 shows one of them enlarged). A liquid crystal capacitor 15 and an auxiliary capacitor 14 are electrically connected in parallel to the drain electrode of the TFT 13 to form one pixel A. A collection of the pixels A becomes an image display unit 19 on the transparent insulating substrate 10. An auxiliary capacitance line 16 is connected to the other electrode of the auxiliary capacitance 14.
[0005]
[Problems to be solved by the invention]
In the TFT-LCD with a built-in drive circuit as described above, the element density and the wiring density formed on the transparent insulating substrate increase, and therefore, under the same process conditions, the liquid crystal display device with only the image display unit without the built-in drive circuit Compared to, it becomes more susceptible to dust. That is, if the wiring width in the drive circuit is narrowed or the spacing between the wirings is narrowed due to the increase in the element density and the wiring density, a defect occurs in a part of the pattern formation due to dust in the pattern formation process of the liquid crystal display device. For example, a wiring defect such as a wiring opening as shown in FIG. 4 (a) or a short circuit between wirings in a conductive region as shown in FIG. 4 (b) is likely to occur. The yield of time will decrease.
[0006]
An object of the present invention is to provide an electrode substrate for a display device that is less likely to cause wiring defects during manufacture and that is excellent in yield.
[0007]
[Means for Solving the Problems]
To achieve the above object, the invention of claim 1 includes an image display unit in which a plurality of pixels including the active element unit are regularly arranged, and an active element unit of the same type as the active element unit of the image display unit. In the electrode substrate for a display device having a drive circuit, the wiring width of the wiring connected to the drain of the active element portion of the drive circuit is set to be larger than the wiring width of the metal wiring conducting to the gate of the active element portion of the image display portion. And the wiring width of the power supply potential wiring on the extension of the source of the active element portion of the drive circuit is made wider than the wiring width of the wiring conducting to the drain of the active element portion of the image display portion. It is characterized by.
[0008]
As a preferred embodiment, the minimum wiring width excluding the active element portion of the drive circuit is made wider than the minimum wiring width excluding the active element portion of the image display portion.
[0009]
According to a second aspect of the present invention, there is provided a display device comprising: an image display unit in which a plurality of pixels including an active element unit are regularly arranged; and a drive circuit including an active element unit of the same type as the active element unit of the image display unit. A power supply potential wiring on the extension of the first source of the active element portion of the drive circuit, and a ground potential wiring on the extension of the second source of the active element portion of the drive circuit. The distance between the metal line connecting the source of the active element part of the image display part and the pixel electrode and the line conducting to the drain of the active element part of the image display part is wider than .
[0010]
As a preferred mode, the minimum interval between the wirings excluding the active element part of the drive circuit is made wider than the minimum interval between the wirings excluding the active element part of the image display unit.
[0011]
As a preferred mode, the active element portion in claim 1 and claim 2 is formed by p-Si TFT.
[0012]
According to a third aspect of the present invention, in the first or second aspect, the wiring connected to the drain of the active element portion of the drive circuit and the metal wiring conducting to the gate of the active element portion of the image display portion are formed in the same layer. The power supply potential wiring of the active element portion of the driving circuit and the wiring connecting the source and pixel electrode of the active element portion of the image display portion are formed in the same layer.
[0013]
According to a fourth aspect of the present invention, in the first to third aspects, the image display unit and the driving circuit are formed by the same process.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment in which the electrode substrate for a display device according to the present invention is applied to a TFT-LCD with a built-in driving circuit as shown in FIG. 3 will be described.
[0015]
FIG. 2 is a schematic plan view showing details of the pixel A shown in FIG. 3, and particularly shows an active element portion and its surrounding electrode pattern (hereinafter, the electrode pattern shown in FIG. 2 is generically referred to as a pixel portion). ). In FIG. 2, 101 is a polycrystalline silicon thin film constituting a TFT which is an active element, 102 is a first metal wiring, 103 is a second metal wiring, and 104 is a contact hole. A region surrounded by a two-dot chain line is an active element portion 1 (pixel) in which the TFT 13 of FIG. 1 is arranged. The first metal wiring 102 also becomes the gate G of the TFT 13, and the second metal wiring 103 forms the source S of the TFT 13 through the contact hole 104. D, G, and S shown in the figure are portions corresponding to the drain, gate, and source of the TFT 13, and a portion constituting the auxiliary capacitor 14 is formed on the extension line of the source S. Here, the width of the first metal wiring 102 that is conductive to the gate G is W1pix, and the width of the wiring 105 that is conductive to the drain D wired in a different layer is W2pix. In addition, an interval between wirings in the same layer in the active element unit 1 is Spix.
[0016]
FIG. 1 is a schematic plan view showing details of a part of the scanning line driving circuit 17 shown in FIG. 3, and particularly shows an active element portion and its peripheral electrode pattern (hereinafter, the electrode pattern shown in FIG. Generically referred to as a drive circuit section). In FIG. 1, a region surrounded by a two-dot chain line is the (drive circuit) active element portion 2, and P-type and N-type TFTs constituting the final stage inverter of the scanning line drive circuit 17 are formed. Sp, Gp, and D are the source, gate, and drain of the P-type TFT, and Sn, Gn, and D are the source, gate, and drain of the N-type TFT. The drain common to both TFTs is connected to the scanning line by a wiring 201 on the extension. A wiring on the extension of the source Sp of the P-type TFT is connected to a wiring 202 having a VDD (power supply) potential. A wiring on the extension of the source Sn of the N-type TFT is connected to a wiring 203 having a GND (ground) potential. Here, the width of the wiring 201 is W1cir and the width of the wiring 202 is W2cir. In addition, the interval between the wirings 202 and 203 in the same layer in the active element unit 2 is Scir.
[0017]
In FIG. 1, the driving circuit unit is described by taking the scanning line driving circuit 17 as an example, but the driving circuit unit can be configured similarly for the signal line driving circuit 18.
[0018]
Next, the wiring width and the wiring interval in the driver circuit portion shown in FIG. 1 and the pixel portion shown in FIG. 2 will be compared.
[0019]
The width W1cir of the wiring 201 shown in FIG. 1 is wider than the width W1pix of the first metal wiring 102 shown in FIG. 2, and the width W2cir of the wiring 202 shown in FIG. Wider than W2pix. Further, the wiring interval Scir shown in FIG. 1 is set to be larger than the wiring interval Spix shown in FIG.
[0020]
However, the wiring 201 shown in FIG. 1 and the first metal wiring 102 shown in FIG. 2 are in the same layer. Further, the wiring 202 shown in FIG. 1 and the second metal wiring 103 shown in FIG. 2 are also in the same layer. In summary, the following relationship is established between the drive circuit unit in FIG. 1 and the pixel unit in FIG.
[0021]
W1cir> W1pix
W2cir> W2pix
Scir> Spix
When the wiring width and the wiring interval are set so as to satisfy the relationship of the above formula, the wiring width and the wiring interval of the drive circuit unit shown in FIG. 1 become wider than the conventional configuration. Therefore, this portion is less susceptible to dust during manufacturing, and the probability of occurrence of wiring defects such as wiring open or wiring short can be greatly reduced.
[0022]
Here, the wiring width of the pixel portion shown in FIG. 2 is narrow as usual, but even if a wiring defect occurs and one pixel does not function, it is almost impossible to visually recognize it, so that the quality is greatly affected. There is no. However, for example, when a wiring defect occurs in the scanning line driving circuit 17 and a scanning line of one line is not driven, it is visually recognized as a line defect, which affects the image quality. For this reason, it is considered effective to improve the quality to eliminate the wiring defects in the drive circuit section described above.
[0023]
According to this embodiment, the width and interval of the wiring of the driving circuit unit such as the scanning line driving circuit and the signal line driving circuit are made wider than the width and interval of the wiring of the pixel unit. Defects are less likely to occur and yield can be improved.
[0024]
In the drive circuit portion, even if both the width and the interval of the wiring are not wide, the above effect can be obtained by widening one of them.
[0025]
【The invention's effect】
As described above in detail, according to the present invention, since it is less susceptible to dust during manufacturing, wiring defects such as wiring open and wiring short in the drive circuit are less likely to occur, and the display device has excellent yield. An electrode substrate can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic plan view showing details of a part of the scanning line driving circuit of FIG. 3;
2 is a schematic plan view showing details of a pixel A in FIG. 3;
FIG. 3 is a general circuit configuration diagram of a TFT-LCD with a built-in driving circuit.
FIG. 4 is an explanatory diagram showing an example of wiring defects caused by conventional dust.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... (Pixel) active element part, 2 ... (Drive circuit) Active element part, 11 ... Scanning line, 12 ... Signal line, 13 ... TFT (Thin film transistor), 14 ... Auxiliary capacity, 15 ... Liquid crystal capacity, 16 ... Auxiliary capacity Reference numeral 17 ... Scanning line driving circuit 18 ... Signal line driving circuit 101 ... Polycrystalline silicon thin film 102 ... First metal wiring 103 ... Second metal wiring 104 ... Contact hole 105, 201, 202, 203 ... wiring

Claims (4)

能動素子部を含む画素が規則的に複数配置された画像表示部と、前記画像表示部の能動素子部と同一形式の能動素子部を含む駆動回路とを有する表示装置用電極基板において、
前記駆動回路の能動素子部のドレインに接続される配線の配線幅を、前記画像表示部の能動素子部のゲートに導通する金属配線の配線幅よりも広くするとともに、
前記駆動回路の能動素子部のソースの延長上にある電源電位の配線の配線幅を、前記画像表示部の能動素子部のドレインに導通する配線の配線幅よりも広くすることを特徴とする表示装置用電極基板。In an electrode substrate for a display device having an image display unit in which a plurality of pixels including an active element unit are regularly arranged, and a drive circuit including an active element unit of the same type as the active element unit of the image display unit,
While making the wiring width of the wiring connected to the drain of the active element portion of the drive circuit wider than the wiring width of the metal wiring conducting to the gate of the active element portion of the image display portion,
The wiring width of the power supply potential wiring on the extension of the source of the active element portion of the driving circuit is made wider than the wiring width of the wiring conducting to the drain of the active element portion of the image display portion. Device electrode substrate. 能動素子部を含む画素が規則的に複数配置された画像表示部と、前記画像表示部の能動素子部と同一形式の能動素子部を含む駆動回路とを有する表示装置用電極基板において、
前記駆動回路の能動素子部の第１のソースの延長上にある電源電位の配線と、前記駆動回路の能動素子部の第２のソースの延長上にある接地電位の配線との間隔を、前記画像表示部の能動素子部のソースと画素電極を接続する金属配線と、前記画像表示部の能動素子部のドレインに導通する配線との間隔よりも広くしたことを特徴とする表示装置用電極基板。In an electrode substrate for a display device having an image display unit in which a plurality of pixels including an active element unit are regularly arranged, and a drive circuit including an active element unit of the same type as the active element unit of the image display unit,
The distance between the power supply potential wiring on the extension of the first source of the active element portion of the driving circuit and the ground potential wiring on the extension of the second source of the active element portion of the driving circuit is defined as An electrode substrate for a display device, wherein the distance between a metal wiring connecting a source of an active element part of an image display unit and a pixel electrode and a wiring conducting to a drain of the active element part of the image display part is wider . 前記駆動回路の能動素子部のドレインに接続される配線と前記画像表示部の能動素子部のゲートに導通する金属配線とは同一層に形成され、前記駆動回路の能動素子部の前記電源電位の配線と前記画像表示部の能動素子部のソースと画素電極を接続する配線とは同一層に形成されていることを特徴とする請求項１又は２に記載の表示装置用電極基板。The wiring connected to the drain of the active element portion of the driving circuit and the metal wiring conducting to the gate of the active element portion of the image display portion are formed in the same layer, and the power supply potential of the active element portion of the driving circuit is 3. The electrode substrate for a display device according to claim 1, wherein the wiring and the wiring for connecting the source of the active element portion of the image display portion and the pixel electrode are formed in the same layer. 前記画像表示部と前記駆動回路が同一プロセスにより形成されることを特徴とする請求項１乃至３に記載の表示装置用電極基板。  4. The display device electrode substrate according to claim 1, wherein the image display unit and the drive circuit are formed by the same process.
JP2000340936A 2000-11-08 2000-11-08 Electrode substrate for display device Expired - Fee Related JP4801835B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000340936A JP4801835B2 (en) 2000-11-08 2000-11-08 Electrode substrate for display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000340936A JP4801835B2 (en) 2000-11-08 2000-11-08 Electrode substrate for display device

Publications (2)

Publication Number Publication Date
JP2002148645A JP2002148645A (en) 2002-05-22
JP4801835B2 true JP4801835B2 (en) 2011-10-26

Family

ID=18815765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000340936A Expired - Fee Related JP4801835B2 (en) 2000-11-08 2000-11-08 Electrode substrate for display device

Country Status (1)

Country Link
JP (1) JP4801835B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9666607B2 (en) 2013-01-31 2017-05-30 Samsung Display Co., Ltd. Display device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100846464B1 (en) * 2002-05-28 2008-07-17 삼성전자주식회사 Amorphous silicon thin film transistor-liquid crystal display device and Method of manufacturing the same
KR101759985B1 (en) 2010-10-20 2017-07-21 삼성디스플레이 주식회사 Gate driver and Liquid crystal display comprising thereof
CN110600509A (en) * 2019-08-22 2019-12-20 武汉华星光电半导体显示技术有限公司 Folding OLED display panel

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3489184B2 (en) * 1994-04-22 2004-01-19 セイコーエプソン株式会社 Thin film transistor circuit and liquid crystal display device using the same
JP2000275658A (en) * 1999-03-19 2000-10-06 Toshiba Corp Liquid crystal display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9666607B2 (en) 2013-01-31 2017-05-30 Samsung Display Co., Ltd. Display device

Also Published As

Publication number Publication date
JP2002148645A (en) 2002-05-22

Similar Documents

Publication Publication Date Title
KR101152528B1 (en) Liquid crystal display device capable of reducing leakage current and fabrication method thereof
CN107145014B (en) Display panel and method for manufacturing display panel
JP3267011B2 (en) Liquid crystal display
JP5000650B2 (en) TFT substrate, display panel including the same, display device, and method for manufacturing TFT substrate
US9136279B2 (en) Display panel
JPH1010548A (en) Active matrix substrate and its production
JP2001051303A (en) Liquid crystal display device and its production
US6819385B2 (en) Transflective pixel structure
JP3897873B2 (en) Driving circuit for liquid crystal display device
US8279389B2 (en) Liquid crystal display device having storage lines overlapping active layers formed of polysilicon material
US6121632A (en) Thin-film transistor array and method for manufacturing same
JP2006317867A (en) Thin film transistor board and liquid crystal display panel
JP4801835B2 (en) Electrode substrate for display device
JP3518851B2 (en) Driving method of active matrix substrate
KR100449849B1 (en) Active matrix type display device
JP3286843B2 (en) LCD panel
US6670936B1 (en) Liquid crystal display
US20050030464A1 (en) LCD display of slim frame structure
US6940480B2 (en) Pixel structure
JP5148032B2 (en) Active matrix display device
JP3216053B2 (en) Liquid crystal display
JP2001119032A (en) Active-matrix type display device
JP4468626B2 (en) Display device substrate and display device including the same
JP2000206565A (en) Semiconductor device for display and liquid crystal display using such device
JPH0827466B2 (en) Display device

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20070419

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071025

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20101004

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20101012

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101126

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110222

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110421

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20110712

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110808

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140812

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4801835

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140812

Year of fee payment: 3

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees