JPH09205290A - Circuit substrate with low emi structure - Google Patents
Circuit substrate with low emi structureInfo
- Publication number
- JPH09205290A JPH09205290A JP8010122A JP1012296A JPH09205290A JP H09205290 A JPH09205290 A JP H09205290A JP 8010122 A JP8010122 A JP 8010122A JP 1012296 A JP1012296 A JP 1012296A JP H09205290 A JPH09205290 A JP H09205290A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- conductor pattern
- layer
- ground layer
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【0001】[0001]
【発明が属する技術分野】本発明は、IC,LSI素子
や回路の高速化、高密度化でますます重要となるEMI
対応の電子機器に係わる不要輻射ノイズの抑制方法及び
これを用いた回路基板に関する。TECHNICAL FIELD The present invention relates to EMI, which is becoming more and more important in speeding up and increasing the density of ICs, LSI elements and circuits.
The present invention relates to a method for suppressing unnecessary radiation noise associated with a compatible electronic device and a circuit board using the same.
【0002】[0002]
【従来の技術】ワークステーションやパーソナルコンピ
ュータなどでは、直流が供給される電源層とグランド層
とにより、その回路素子が駆動される。近年、これら素
子の高速化により、素子のスイッチング周波数が高くな
っている。素子が駆動されて電力を消費すると、電源層
に電流が流れ、その結果、電源層とグランド層との間の
電位が変動する。この電位変動がこれら層内を伝播し、
これら層の周辺部で反射する。この反射が繰り返すこと
によって電源層とグランド層からなる部分が共振器とし
て働き、それらの周辺部から周囲に電磁波が輻射され
る。2. Description of the Related Art In a workstation or personal computer, its circuit elements are driven by a power supply layer and a ground layer to which a direct current is supplied. In recent years, due to the increase in speed of these elements, the switching frequency of the elements has increased. When the element is driven to consume power, a current flows in the power supply layer, and as a result, the potential between the power supply layer and the ground layer changes. This potential fluctuation propagates in these layers,
It reflects at the periphery of these layers. By repeating this reflection, the portion composed of the power supply layer and the ground layer functions as a resonator, and electromagnetic waves are radiated from their peripheral portions to the surroundings.
【0003】このような電磁波の輻射の対応策として、
従来、特開平5ー136591号公報に示されるよう
に、シールドを施すことが知られている。この従来技術
では、回路基板から発生する不要輻射が外部へ漏洩する
のを防止するために、回路基板にシールドカバーを取り
付けることにより、輻射面を金属板で覆ってシールドを
施すことが考えられている。As a countermeasure against such electromagnetic wave radiation,
Conventionally, it is known to provide a shield as shown in Japanese Patent Laid-Open No. 5-136591. In this conventional technique, in order to prevent unnecessary radiation generated from the circuit board from leaking to the outside, it is considered that the radiation surface is covered with a metal plate to provide a shield by attaching a shield cover to the circuit board. There is.
【0004】[0004]
【発明が解決しようとする課題】ところで、上記従来技
術では、回路基板をシールドカバーで囲むことによって
シールド効果が得られるとしているが、メカニズムの解
明が遅れているため、必要な周波数領域で充分な効果を
得ることが難しい状況にある。By the way, in the above-mentioned prior art, it is said that the shielding effect can be obtained by enclosing the circuit board with the shield cover, but since the elucidation of the mechanism is delayed, it is sufficient in the necessary frequency range. It is difficult to get the effect.
【0005】本発明の目的は、かかる問題を解消し、必
要とする周波数領域での電磁波の不要輻射を充分に低減
することができるようにした低EMI構造を有する回路
基板を提供することにある。It is an object of the present invention to provide a circuit board having a low EMI structure which solves the above problem and is capable of sufficiently reducing unnecessary radiation of electromagnetic waves in a required frequency range. .
【0006】[0006]
【課題を解決するための手段】上記目的を達成するため
に、本発明は、基板の一方の面に電源層が、他方の面に
グランド層が設けられた回路基板において、該回路基板
の周辺部を微小部分に区分し、隣接する該微小部分間
で、輻射する電磁波の位相が互いに逆位相となる構造と
する。In order to achieve the above object, the present invention provides a circuit board in which a power supply layer is provided on one surface of the board and a ground layer is provided on the other surface, and the periphery of the circuit board is provided. The parts are divided into minute parts, and the phases of radiated electromagnetic waves are opposite to each other between adjacent minute parts.
【0007】基板の一方の面に電源層が、他方の面にグ
ランド層が夫々設けられた回路基板において、該回路基
板の周辺部から電磁波が輻射される現象は、次のように
モデル化して考えることができる。即ち、かかる回路基
板の周辺部は、電源層の微小部分とこれに対向するグラ
ンド層の微小部分とからなる微小な双極子アンテナがこ
の回路基板の周辺に配列されているものと考えられる。
そして、近接した双極子アンテナ間の距離は、遠方から
みると、ほとんど0とみなせるため、この回路基板を遠
方からみると、これは、これら全ての微小双極子からの
電磁波の合成電磁波を輻射する1つの双極子アンテナと
みなすことができる。In a circuit board in which a power supply layer is provided on one surface of the board and a ground layer is provided on the other surface, a phenomenon in which electromagnetic waves are radiated from the peripheral portion of the circuit board is modeled as follows. I can think. That is, it is considered that in the peripheral portion of the circuit board, minute dipole antennas each including a minute portion of the power supply layer and a minute portion of the ground layer facing the power source layer are arranged around the circuit board.
The distance between the dipole antennas that are close to each other can be regarded as almost 0 when viewed from a distance. Therefore, when this circuit board is viewed from a distance, it radiates a composite electromagnetic wave of electromagnetic waves from all these minute dipoles. It can be regarded as one dipole antenna.
【0008】そこで、上記のように、かかる回路基板の
周辺部の隣接する微小双極子から輻射される電磁波の位
相が互いに逆位相となるようにすると、この回路基板か
ら充分遠方にある位置では、隣接微小双極子アンテナか
らの電磁波が互いに充分打ち消し合い、その結果、この
回路基板からの電磁波の影響がほとんどなくなる。Therefore, as described above, when the phases of the electromagnetic waves radiated from the adjacent minute dipoles in the peripheral portion of the circuit board are set to be opposite to each other, at a position sufficiently far from the circuit board, The electromagnetic waves from the adjacent small dipole antennas cancel each other sufficiently, and as a result, the electromagnetic waves from this circuit board have almost no influence.
【0009】[0009]
【発明の実施の形態】以下、本発明の実施形態を図面に
より説明する。図1は本発明による低EMI構造を有す
る回路基板の一実施形態を示す要部斜視図であって、1
は電源層、2はグランド層、3〜6は導体パターン、7
〜10は接続線である。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing a main part of an embodiment of a circuit board having a low EMI structure according to the present invention.
Is a power layer, 2 is a ground layer, 3 to 6 are conductor patterns, 7
Reference numerals 10 to 10 are connecting lines.
【0010】図2はこの実施形態の全体を概略的に示し
た斜視図であって、11は周辺部であり、図1に対応す
る部分には同一符号を付けている。FIG. 2 is a perspective view schematically showing the whole of this embodiment, in which 11 is a peripheral portion, and the portions corresponding to those in FIG. 1 are designated by the same reference numerals.
【0011】まず、図2において、この実施形態は、回
路が形成された図示しない基板の一方の面に電源層1が
設けられ、他方の面にグランド層2が設けられており、
この基板内に図示しない回路素子が設けられて回路基板
を構成している。そして、電源層1に直流電源電圧を供
給し、グランド層2を接地することにより、回路素子が
駆動される。First, in FIG. 2, in this embodiment, a power supply layer 1 is provided on one surface of a substrate (not shown) on which circuits are formed, and a ground layer 2 is provided on the other surface.
A circuit element (not shown) is provided in this board to form a circuit board. Then, the circuit element is driven by supplying a DC power supply voltage to the power supply layer 1 and grounding the ground layer 2.
【0012】かかる回路基板において、その周辺部11
に電磁波の不要輻射を防止するためのEMI構造が形成
されている。In such a circuit board, its peripheral portion 11
Further, an EMI structure is formed to prevent unnecessary radiation of electromagnetic waves.
【0013】次に、図1により、このEMI構造につい
て説明する。Next, the EMI structure will be described with reference to FIG.
【0014】電源層1の周辺部に導体パターン4と導体
パターン5とが交互に配置されている。1つおきの導体
パターン4が図示しない基板に設けられた図示しないス
ルーホールを通る接続線10によってグランド層2と接
続され、他の1つおきの導体パターン5が基板のこの導
体パターン5と同じ面に形成されている接続線8によっ
て電源層1と接続されている。Conductor patterns 4 and conductor patterns 5 are alternately arranged on the periphery of the power supply layer 1. Every other conductor pattern 4 is connected to the ground layer 2 by a connecting line 10 passing through a through hole (not shown) provided in a substrate (not shown), and every other conductor pattern 5 is the same as this conductor pattern 5 on the substrate. It is connected to the power supply layer 1 by the connection line 8 formed on the surface.
【0015】同様にして、グランド層2の周辺部に導体
パターン3と導体パターン6とが交互に配置され、1つ
おきの導体パターン3が図示しない基板に設けられた図
示しないスルーホールを通る接続線9によって電源層1
と接続され、他の1つおきの導体パターン6が基板のこ
の導体パターン6と同じ面に形成されている接続線7に
よってグランド層2と接続されている。Similarly, the conductor patterns 3 and the conductor patterns 6 are alternately arranged in the peripheral portion of the ground layer 2, and every other conductor pattern 3 is connected through a through hole (not shown) provided on a substrate (not shown). Power layer 1 by line 9
And every other conductor pattern 6 is connected to the ground layer 2 by a connection line 7 formed on the same surface of the substrate as this conductor pattern 6.
【0016】グランド層2に接続される電源層1側の導
体パターン4と電源層1に接続されるグランド層2側の
導体パターン3とは互いに対向して配置されており、ま
た、電源層1に接続される電源層1側の導体パターン5
とグランド層2に接続されるグランド層2側の導体パタ
ーン6とは互いに対向して配置されている。The conductor pattern 4 on the side of the power source layer 1 connected to the ground layer 2 and the conductor pattern 3 on the side of the ground layer 2 connected to the power source layer 1 are arranged to face each other, and the power source layer 1 Pattern 5 on the power supply layer 1 side connected to the
And the conductor pattern 6 on the ground layer 2 side connected to the ground layer 2 are arranged to face each other.
【0017】また、各導体パターン3〜6が夫々電源層
1またはグランド層2に接続できるようにするために、
これら電源層1,グランド層2の辺に互いにずれた所定
の間隔で切込みが設けられ、夫々の導体パターン3〜6
はその一部がかかる切込みに入り込むようなパターン形
状をなしている。なお、これら導体パターン3〜6は寸
法形状が互いに等しく、導体パターン4,5と導体パタ
ーン3,6とは、図面上、互いに裏返した関係で配置さ
れている。In order to connect the conductor patterns 3 to 6 to the power supply layer 1 or the ground layer 2, respectively,
Cuts are provided on the sides of the power supply layer 1 and the ground layer 2 at a predetermined interval offset from each other, and the respective conductor patterns 3 to 6 are formed.
Has a pattern shape such that a part of it enters the cut. The conductor patterns 3 to 6 have the same size and shape, and the conductor patterns 4 and 5 and the conductor patterns 3 and 6 are arranged in an inverted relationship in the drawing.
【0018】かかる構造によると、導体パターン3での
グランド層2の切込部分に入り込んだ部分は電源層1に
対向するので、その部分でこれら導体パターン3と電源
層1とをスルーホールを介した接続線9で接続すること
ができるし、また、導体パターン4での電源層1の切込
部分に入り込んだ部分はグランド層2に対向するので、
その部分でこれら導体パターン4とグランド層2とをス
ルーホールを介した接続線10で接続することができ
る。According to such a structure, the portion of the conductor pattern 3 that has entered the cut portion of the ground layer 2 faces the power supply layer 1, so that the conductor pattern 3 and the power supply layer 1 are connected through the through hole at that portion. Since the connection line 9 can be used for connection, and the part of the conductor pattern 4 that is cut into the power supply layer 1 faces the ground layer 2,
At that portion, the conductor pattern 4 and the ground layer 2 can be connected by the connection line 10 via the through hole.
【0019】なお、導体パターン5と電源層1とは、ま
た、導体パターン6とグランド層2とは夫々同一面で対
向しているから、どの位置で接続してもよく、この点か
らすると、これら導体パターン5,6に対し、電源層
1,グランド層2に上記の切込を設ける必要もないが、
後述するように、発生する電磁波の強度が対向する導体
パターン3,4と対向する導体パターン5,6との形状
の違いなどによって異なる影響を受けることがないよう
にするために、これら導体パターン3〜6を等しいパタ
ーン形状としている。Since the conductor pattern 5 and the power supply layer 1 and the conductor pattern 6 and the ground layer 2 face each other on the same plane, they may be connected at any position. From this point, It is not necessary to make the above cuts in the power supply layer 1 and the ground layer 2 for these conductor patterns 5 and 6,
As will be described later, in order to prevent the intensity of the generated electromagnetic wave from being affected differently by the difference in shape between the opposing conductor patterns 3 and 4 and the opposing conductor patterns 5 and 6, these conductor patterns 3 ˜6 have the same pattern shape.
【0020】かかる構成において、電源層1に直流電源
電圧を供給し、グランド層2を接地すると、導体パター
ン3,5の電位が電源層1の電位変動と同相で変動し、
導体パターン4,6の電位もグランド層2の電位変動と
同相で変動する。In this structure, when a DC power supply voltage is supplied to the power supply layer 1 and the ground layer 2 is grounded, the potentials of the conductor patterns 3 and 5 change in the same phase as the potential change of the power supply layer 1,
The potentials of the conductor patterns 4 and 6 also change in the same phase as the potential change of the ground layer 2.
【0021】図3は図1に示した回路基板の周辺部の一
部を矢印Aで示す正面からみた図であって、12,13
は微小双極子アンテナであり、図1に対応する部分には
同一符号を付けている。また、グランド層2に接続され
た導体パターン4,6にはハッチングを施している。FIG. 3 is a front view of a part of the peripheral portion of the circuit board shown in FIG.
Is a small dipole antenna, and the portions corresponding to those in FIG. The conductor patterns 4 and 6 connected to the ground layer 2 are hatched.
【0022】同図において、電源層1(図1)に接続さ
れた導体パターン5とこれに対向しグランド層2(図
2)に接続された導体パターン6との間には、矢印で示
す方向に電界+Eが生じ、電源層1に接続された導体パ
ターン3とこれに対向しグランド層2導体パターン4と
の間には、電界+Eとは逆方向の矢印で示す方向に電界
−Eが生ずる。これら電界±Eが変動すると、電磁波が
輻射される。In the same figure, between the conductor pattern 5 connected to the power source layer 1 (FIG. 1) and the conductor pattern 6 facing the conductor pattern 5 connected to the ground layer 2 (FIG. 2), the direction shown by the arrow is shown. And an electric field + E is generated between the conductor pattern 3 connected to the power supply layer 1 and the conductor pattern 4 facing the ground layer 2 in the direction indicated by the arrow opposite to the electric field + E. . When these electric fields ± E fluctuate, electromagnetic waves are radiated.
【0023】ここで、導体パターン3〜6は微小である
から、導体パターン5,6は微小双極子アンテナ12を
形成し、導体パターン3,4も微小双極子アンテナ13
を形成するが、これら微小双極子アンテナ12,13か
ら輻射される電磁波は互いに逆位相となる。そして、こ
れら微小双極子アンテナ12,13からの電磁波は広が
って空間中を伝搬し、このため、回路基板の遠方では、
互いに逆相の電磁波が打ち消し合って充分小さなものと
なる。Since the conductor patterns 3 to 6 are minute, the conductor patterns 5 and 6 form the minute dipole antenna 12, and the conductor patterns 3 and 4 are also minute dipole antennas 13.
However, the electromagnetic waves radiated from these small dipole antennas 12 and 13 have opposite phases. Then, the electromagnetic waves from these small dipole antennas 12 and 13 spread and propagate in the space. Therefore, in the distance of the circuit board,
Electromagnetic waves having opposite phases cancel each other and become sufficiently small.
【0024】また、基板の同じ面に設けられた導体パタ
ーン(導体パターン4と5、導体パターン3と6)間で
も、微小双極子アンテナが形成され、これらから電磁波
が輻射されるが、この場合でも、隣接する微小双極子ア
ンテナ間の電磁波は位相が互いに逆位相となるので、回
路基板からの遠方位置では、電磁波が充分小さいものと
なる。Micro dipole antennas are also formed between the conductor patterns (conductor patterns 4 and 5 and conductor patterns 3 and 6) provided on the same surface of the substrate, and electromagnetic waves are radiated from these antennas. In this case, However, since the electromagnetic waves between the adjacent minute dipole antennas have opposite phases to each other, the electromagnetic waves are sufficiently small at a position distant from the circuit board.
【0025】以上のことを電源層,グランド層の電位分
布の点から説明すると、従来の回路基板では、電源層,
グランド層での電位分布が、これら層の辺を開放終端と
して、図5(a)に示すようなsin曲線状をなしてお
り、これら層が共振器を構成して、その周辺部からかか
る電位分布による電磁波を輻射する。かかる共振器の共
振周波数はその構造(即ち、電源層やグランド層の辺の
長さ)で決まり、図6に示すように、これら層の縦横の
辺の長さに応じた特定の周波数f1,f2であって、かか
る特定の周波数f1,f2でエネルギーが集中した電磁波
の輻射スペクトルが観測される。To explain the above in terms of the potential distribution of the power supply layer and the ground layer, in the conventional circuit board, the power supply layer,
The potential distribution in the ground layer forms a sin curve as shown in Fig. 5 (a) with the sides of these layers as open ends. These layers form a resonator, and the potential applied from the peripheral portion Radiates electromagnetic waves due to distribution. The resonance frequency of such a resonator is determined by its structure (that is, the lengths of the sides of the power supply layer and the ground layer), and as shown in FIG. 6, a specific frequency f 1 according to the lengths of the vertical and horizontal sides of these layers. , F 2 , and the radiation spectrum of the electromagnetic waves in which the energy is concentrated at the specific frequencies f 1 and f 2 are observed.
【0026】この実施形態では、上記のように、電源層
1とグランド層2の周辺部に微小双極子アンテナを形成
し、隣合う微小双極子アンテナ間で輻射される電磁波の
位相が反転するようにしているため、図5(a)に示し
た電位分布が同図(b)に示すようになり、回路基板か
らの遠方位置では、これにともなう隣合う微小双極子ア
ンテナから輻射される電磁波が互いに相殺し合って、図
6で示した特定の周波数f1,f2でのエネルギーの集中
が大幅に低減され、電磁波の影響がほとんどなくなるの
である。In this embodiment, as described above, minute dipole antennas are formed around the power supply layer 1 and the ground layer 2 so that the phases of electromagnetic waves radiated between adjacent minute dipole antennas are inverted. Therefore, the potential distribution shown in FIG. 5 (a) becomes as shown in FIG. 5 (b), and at a position distant from the circuit board, electromagnetic waves radiated from adjacent micro dipole antennas accompanying this are generated. By canceling each other out, the concentration of energy at the specific frequencies f 1 and f 2 shown in FIG. 6 is greatly reduced, and the influence of electromagnetic waves is almost eliminated.
【0027】図4(a)は図1での分断線B−Bに沿う
断面図、同図(b)は同じく分断線C−Cに沿う断面図
であって、前出図面に対応する部分には同一符号を付け
ている。FIG. 4 (a) is a sectional view taken along the section line BB in FIG. 1, and FIG. 4 (b) is a sectional view taken along the section line C-C, which corresponds to the above-mentioned drawing. Are given the same reference numerals.
【0028】図4(a)に示すように、電源層1とこれ
に接続された導体パターン5とが基板の同一面に互いに
近接して設けられた部分や、グランド層2とこれに接続
された導体パターン6とが基板の同一面に互いに近接し
て設けられた部分では、電源層1,導体パターン5間の
電界も、グランド層2,導体パターン6間の電界もとも
に0であるから、これら間では、電磁波が発生しない、
これに対し、図4(b)に示すように、電源層1とグラ
ンド層2に接続された導体パターン5とが基板の同一面
に互いに近接して設けられた部分や、グランド層2と電
源層1に接続された導体パターン6とが基板の同一面に
互いに近接して設けられ部分では、電界が0とならない
ため、電磁波が生ずる。このため、これらの部分で微小
双極子アンテナが形成されるが、これら微小双極子アン
テナから輻射される電磁波も互いに逆位相となるため、
回路基板の遠方では、これら電磁波が打ち消されて充分
小さくなる。As shown in FIG. 4A, the power supply layer 1 and the conductor pattern 5 connected thereto are provided on the same surface of the substrate in close proximity to each other, and the ground layer 2 and the ground layer 2 are connected thereto. Since the electric field between the power supply layer 1 and the conductor pattern 5 and the electric field between the ground layer 2 and the conductor pattern 6 are both 0 in a portion where the conductor pattern 6 is provided close to each other on the same surface of the substrate, Between these, no electromagnetic waves are generated,
On the other hand, as shown in FIG. 4B, a portion where the power supply layer 1 and the conductor pattern 5 connected to the ground layer 2 are provided close to each other on the same surface of the substrate, and the ground layer 2 and the power supply In the portion where the conductor pattern 6 connected to the layer 1 is provided close to each other on the same surface of the substrate, the electric field does not become 0, so electromagnetic waves are generated. For this reason, micro dipole antennas are formed in these parts, but the electromagnetic waves radiated from these micro dipole antennas also have opposite phases,
In the distance of the circuit board, these electromagnetic waves are canceled and become sufficiently small.
【0029】このようにして、この実施形態では、回路
基板の周辺部から放射される電磁波を充分小さくするこ
とができるが、この電磁波を完全に打ち消すためには、
図1において、さらに、接続部9,10と接続部7,8
のインピーダンスが等しくなるようにする必要がある。
これは、導体パターン3〜6の寸法形状を互いに等しく
する上に、これら接続部の長さの違いに応じて、接続部
9,10の場合には、それらの直径を調整し、または、
接続部7,8の場合には、それらの幅を調整することに
より実現できる。高周波の場合、インピーダンスは、表
皮効果のため、導体の表面積で決定される。従って、接
続部9,10の直径や長さは、その表面積が導体パター
ンの面積と等しくなるように決定される。In this way, in this embodiment, the electromagnetic wave radiated from the peripheral portion of the circuit board can be made sufficiently small, but in order to completely cancel this electromagnetic wave,
In FIG. 1, further, connecting portions 9 and 10 and connecting portions 7 and 8
It is necessary to make the impedances of the two equal.
This not only makes the dimensions of the conductor patterns 3 to 6 equal to each other, but also adjusts the diameters of the connection parts 9 and 10 in the case of the connection parts 9 and 10 according to the difference in the length of these connection parts, or
In the case of the connecting portions 7 and 8, this can be realized by adjusting the widths of them. At high frequencies, the impedance is determined by the surface area of the conductor due to the skin effect. Therefore, the diameter and length of the connecting portions 9 and 10 are determined so that the surface area thereof is equal to the area of the conductor pattern.
【0030】また、この実施形態では、電源層1とグラ
ンド層2の周辺部で電位変動の反射が生じにくくなるよ
うにしている。Further, in this embodiment, the peripheral portions of the power supply layer 1 and the ground layer 2 are made less likely to reflect potential fluctuations.
【0031】即ち、導体パターン3,4の部分と導体パ
ターン5,6の部分とでは、高周波的に終端の状態が異
なっている。従って、回路基板の周辺部11(図2)で
の電位変動の反射が揃わず、層全体が共振器構造とはな
らないので、図6でf1,f2として示したような電磁波
での特定の周波数の成分が増幅されることもなく、エネ
ルギーが広い周波数範囲に分散されることになる。その
ため、従来測定されている特定波長(回路基板の大きさ
で決定される共振周波数)で強度が大きいという輻射の
スペクトルの特性も現れない。That is, the states of the conductor patterns 3 and 4 and the conductor patterns 5 and 6 are different from each other in terms of high frequency. Therefore, the reflection of the potential fluctuation is not uniform in the peripheral portion 11 (FIG. 2) of the circuit board, and the entire layer does not have a resonator structure. Therefore, the electromagnetic wave as indicated by f 1 and f 2 in FIG. Energy is dispersed in a wide frequency range without amplification of the frequency component of. Therefore, the characteristic of the radiation spectrum that the intensity is large at the specific wavelength (resonance frequency determined by the size of the circuit board) that has been conventionally measured does not appear.
【0032】このように、この実施形態では、電磁波の
エネルギーが特定の周波数に集中していた従来の方式と
比べ、このエネルギーを広い周波数範囲に分散させたこ
とになリ、その結果、不要輻射のレベルは低減される。As described above, in this embodiment, as compared with the conventional method in which the energy of the electromagnetic wave is concentrated in a specific frequency, this energy is dispersed in a wide frequency range, and as a result, unnecessary radiation is generated. Level is reduced.
【0033】さらに、この実施形態では、電源層1,グ
ランド層2の周辺部が上記の構成となっているため、周
囲に電磁波を輻射するアンテナとしての損失抵抗を大き
くしたことになる。そして、アンテナの損失抵抗が大き
くなることにより、輻射効率が小さくなり、その結果、
アンテナからの輻射量も小さく抑えられる。Further, in this embodiment, since the peripheral portions of the power supply layer 1 and the ground layer 2 have the above-mentioned structure, the loss resistance as an antenna for radiating electromagnetic waves to the surroundings is increased. And because the loss resistance of the antenna increases, the radiation efficiency decreases, and as a result,
The amount of radiation from the antenna can also be kept small.
【0034】図7は本発明による低EMI構造を有する
回路基板の他の実施形態を示す要部斜視図であって、1
4,15は導体パターン、16,17は接続部であり、
図1に対応する部分には、同一符号を付けている。FIG. 7 is a perspective view showing a main part of another embodiment of a circuit board having a low EMI structure according to the present invention.
4, 15 are conductor patterns, 16 and 17 are connection parts,
The parts corresponding to those in FIG. 1 are designated by the same reference numerals.
【0035】同図において、図示しない基板の一方の面
に電源層1が、他方の面にグランド層2が夫々設けら
れ、この基板の端面全体にわたって微小な導体パターン
14と導体パターン15とが交互に配列されている。そ
して、1つおきの導体パターン14は接続部16によっ
て電源層1と接続され、他の1つおきの導体パターン1
5が接続部17によってグランド層2と接続されてい
る。In the figure, a power supply layer 1 is provided on one surface of a substrate (not shown) and a ground layer 2 is provided on the other surface, and minute conductor patterns 14 and conductor patterns 15 are alternately arranged over the entire end face of the substrate. Are arranged in. Then, every other conductor pattern 14 is connected to the power supply layer 1 by the connecting portion 16, and every other conductor pattern 1 is connected.
5 is connected to the ground layer 2 by the connecting portion 17.
【0036】また、導体パターン14は電源層1から折
り曲げられて基板の端面に固定され、導体パターン15
はグランド層2から折れ曲げられて基板の端面に固定さ
れる構造としてもよく、これら折曲部分が接続部16,
17をなしていることになる。The conductor pattern 14 is bent from the power supply layer 1 and fixed to the end surface of the substrate, and the conductor pattern 15 is formed.
May be bent from the ground layer 2 and fixed to the end surface of the substrate.
You are playing 17.
【0037】なお、導体パターン14の先端部はグラン
ド層2と小さな間隔で離れており、また、導体パターン
15の先端部も電源層1と小さな間隔で離れていること
はいうまでもない。Needless to say, the tip of the conductor pattern 14 is separated from the ground layer 2 by a small distance, and the tip of the conductor pattern 15 is also separated from the power supply layer 1 by a small distance.
【0038】図7に示すこの回路基板の周辺部を矢印D
に示すようにみた場合、図8(a)に示すように、導体
パターン14の先端部とこれに対向するグランド層2の
部分の間で矢印で示す方向に電界が生じ、これらは微小
双極子アンテナ18を形成する。また、この回路基板の
周辺部を矢印C側に示すようにみた場合、図8(b)に
示すように、導体パターン15の先端部とこれに対向す
る電源層1の部分の間で矢印で示す方向に電界が生じ、
これらも微小双極子アンテナ19を形成する。そして、
図8(a),(b)を比較して明らかなように、微小双
極子アンテナ18,19の電界方向は互いに逆方向であ
るので、これらから輻射される電磁波の位相は互いに逆
位相となる。The peripheral portion of this circuit board shown in FIG.
8A, an electric field is generated in the direction indicated by the arrow between the tip of the conductor pattern 14 and the portion of the ground layer 2 facing the tip of the conductor pattern 14 as shown in FIG. The antenna 18 is formed. When the peripheral portion of this circuit board is viewed on the side of arrow C, as shown in FIG. 8B, an arrow is drawn between the tip portion of the conductor pattern 15 and the portion of the power supply layer 1 facing the tip portion. An electric field is generated in the direction shown,
These also form the small dipole antenna 19. And
As is clear from comparison between FIGS. 8A and 8B, the electric fields of the small dipole antennas 18 and 19 are opposite to each other, and thus the phases of electromagnetic waves emitted from them are opposite to each other. .
【0039】そこで、図7においては、回路基板の周辺
部には、導体パターン14による微小双極子アンテナ1
4と導体パターン15による微小双極子アンテナ19と
が交互に配列されていることになり、図1で示した実施
形態と同様に、これら微小双極視アンテナ18,19か
らの電磁波が互いに打つ消され、遠方には届かないこと
になる。Therefore, in FIG. 7, in the peripheral portion of the circuit board, the small dipole antenna 1 with the conductor pattern 14 is formed.
4 and the small dipole antennas 19 by the conductor pattern 15 are arranged alternately, and the electromagnetic waves from these small dipole antennas 18 and 19 cancel each other out, as in the embodiment shown in FIG. , Will not reach far.
【0040】ここで、導体パターン14,15の形状,
寸法を全く等しくし、また、電源層1と導体パターン1
4の接続部16と、グランド層2と導体パターン15の
接続部17とは全く同じ寸法形状とすると、電源層1と
グランド層2とからみた夫々の微小双極子アンテナ1
8,19側のインピーダンスも等しくなるから、これら
電磁波の打ち消しは充分効果的になされ、これによって
遠方での電磁波の影響がなくなる。Here, the shapes of the conductor patterns 14 and 15 are
The dimensions are exactly the same, and the power supply layer 1 and the conductor pattern 1 are
If the connecting portion 16 of No. 4 and the connecting portion 17 of the ground layer 2 and the conductor pattern 15 have exactly the same size and shape, the respective micro dipole antennas 1 as viewed from the power supply layer 1 and the ground layer 2 are formed.
Since the impedances on the 8 and 19 sides are also equal, the cancellation of these electromagnetic waves is sufficiently effective, thereby eliminating the influence of electromagnetic waves in the distance.
【0041】以上のようにして、上記各実施形態では、
回路基板の周辺部から輻射される電磁波が互いに打つ消
しあうようにすることにより、その強度を低減するもの
であるが、微小双極子アンテナの個数、即ち、導体パタ
ーンの個数が多いほど電磁波の低減効果が大きくなる
が、図9に示すように、その個数がある程度で充分な効
果が得られ、また、ある程度以上になると、その効果の
向上は小さくする。実験によると、導体パターンが電源
層1やグランド層2の1/6以下の面積となると、ある
程度の好ましい電磁波の低減効果が得られた。As described above, in each of the above embodiments,
The electromagnetic waves radiated from the peripheral part of the circuit board are made to cancel each other out to reduce their strength. However, the smaller the number of small dipole antennas, that is, the number of conductor patterns, the smaller the electromagnetic wave. Although the effect becomes large, as shown in FIG. 9, a sufficient effect can be obtained at a certain number, and when it becomes more than a certain amount, the improvement in the effect becomes small. According to the experiment, when the conductor pattern has an area of 1/6 or less of that of the power supply layer 1 and the ground layer 2, a preferable effect of reducing electromagnetic waves was obtained to some extent.
【0042】[0042]
【発明の効果】以上説明したように、本発明によれば、
電源層とグランド層の周辺部に微小な導体パターンを設
けて微小双極子アンテナの配列を形成し、1つおきの微
小双極子アンテナから放射される電磁波の位相を交互に
逆転させることができるので、不要な電磁波の放射を充
分に抑制することができる。As described above, according to the present invention,
Since minute conductor patterns are provided on the periphery of the power supply layer and the ground layer to form an array of minute dipole antennas, the phases of electromagnetic waves emitted from every other minute dipole antenna can be alternately inverted. Therefore, it is possible to sufficiently suppress the emission of unnecessary electromagnetic waves.
【図1】本発明による低EMI構造を有する回路基板の
一実施形態の要部を示す斜視図である。FIG. 1 is a perspective view showing a main part of an embodiment of a circuit board having a low EMI structure according to the present invention.
【図2】本発明による低EMI構造を有する回路基板の
全体斜視図である。FIG. 2 is an overall perspective view of a circuit board having a low EMI structure according to the present invention.
【図3】図1を矢印A側からみた場合の電界の状態を示
す図である。FIG. 3 is a diagram showing a state of an electric field when FIG. 1 is viewed from an arrow A side.
【図4】図1の分断線B−B,C−Cに沿う断面での電
界方向を示す図である。FIG. 4 is a diagram showing an electric field direction in a cross section taken along section lines BB and CC in FIG. 1.
【図5】図1に示す実施形態の電磁波低減動作を示す図
である。5 is a diagram showing an electromagnetic wave reducing operation of the embodiment shown in FIG.
【図6】従来の回路基板での電磁波の輻射スペクトルを
示す図である。FIG. 6 is a diagram showing a radiation spectrum of electromagnetic waves in a conventional circuit board.
【図7】本発明による低EMI構造を有する回路基板の
他の実施形態の要部を示す斜視図である。FIG. 7 is a perspective view showing a main part of another embodiment of a circuit board having a low EMI structure according to the present invention.
【図8】図7に示した実施形態での動作説明図である。FIG. 8 is an operation explanatory diagram in the embodiment shown in FIG. 7.
【図9】導体パターンの個数に対する電磁波低減効果の
変化を示す図である。FIG. 9 is a diagram showing changes in the electromagnetic wave reduction effect with respect to the number of conductor patterns.
1 電源層 2 グランド層 3〜6 導体パターン 7〜10 接続線 11,12 微小双極アンテナ 1 power supply layer 2 ground layer 3 to 6 conductor pattern 7 to 10 connection line 11 and 12 small dipole antenna
Claims (6)
層が設けられ、他方の面にグランド層が設けられてなる
回路基板において、 該基板の該一方の面と該他方の面との周辺部に沿い、該
基板の大きさに比べて充分小さい導体パターンを複数個
互いに近接して設け、 該基板の該一方の面に設けられた該導体パターンのう
ち、1つおきの第1の導体パターンが該電源層に、他の
1つおきの第2の導体パターンが該グランド層に夫々接
続され、 該基板の該他方の面に設けられた該導体パターンのう
ち、該第1の導体パターンに対向する1つおきの第3の
導体パターンが該グランド層に接続され、該第2の導体
パターンに対向する1つおきの第4の導体パターンが該
電源層に接続されてなることを特徴とする低EMI構造
を有する回路基板。1. A circuit board in which a power supply layer is provided on one surface of a substrate on which a circuit is formed and a ground layer is provided on the other surface, and the one surface and the other surface of the board are provided. A plurality of conductor patterns sufficiently smaller than the size of the substrate are provided along the periphery of the substrate, and the conductor patterns provided on the one surface of the substrate are spaced apart from each other. Of the conductor patterns are connected to the power supply layer and the other second conductor patterns are connected to the ground layer, respectively, and the first of the conductor patterns provided on the other surface of the substrate Every other third conductor pattern facing the conductor pattern is connected to the ground layer, and every other fourth conductor pattern facing the second conductor pattern is connected to the power supply layer. A circuit board having a low EMI structure.
層が設けられ、他方の面にグランド層が設けられてなる
回路基板において、 該基板の側面に沿い、該基板の大きさに比べて充分小さ
い導体パターンを複数個互いに近接して設け、 該導体パターンのうち、1つおきの第1の導体パターン
が該電源層に接続されてその先端部が該グランド層に近
接し、他の1つおきの第2の導体パターンが該グランド
層に接続されて該電源層に近接していることを特徴とす
る低EMI構造を有する回路基板。2. A circuit board in which a power supply layer is provided on one surface of a substrate on which a circuit is formed and a ground layer is provided on the other surface, and the size of the substrate is set along the side surface of the substrate. A plurality of conductor patterns that are sufficiently smaller than each other are provided close to each other, and every other first conductor pattern of the conductor patterns is connected to the power supply layer, and its tip portion is close to the ground layer, 2. A circuit board having a low EMI structure, wherein every second conductive pattern is connected to the ground layer and is adjacent to the power supply layer.
さの1/6以下であることを特徴とする低EMI構造を
有する回路基板。3. The circuit board according to claim 1, wherein all of the conductor patterns have a size equal to or less than ⅙ of a size of the board.
ることを特徴とする低EMI構造を有する回路基板。4. The circuit board according to claim 1 or 2, wherein all of the conductor patterns have substantially the same size and shape.
部の前記電源層からみたインピーダンスと、前記グラン
ド層と前記第2及び第3の導体パターンとの接続部の前
記グランド層からみたインピーダンスは、全てほぼ等し
いことを特徴とする低EMI構造を有する回路基板。5. The impedance according to claim 1, which is seen from the power supply layer at a connection portion between the power supply layer and the first and fourth conductor patterns, and the ground layer and the second and third conductor patterns. The circuit board having a low EMI structure, wherein the impedances of the connection parts of the above when viewed from the ground layer are substantially equal to each other.
電源層からみたインピーダンスと、前記グランド層と前
記第2の導体パターンとの接続部の前記グランド層から
みたインピーダンスは、全てほぼ等しいことを特徴とす
る低EMI構造を有する回路基板。6. The impedance according to claim 2, wherein the impedance of the connection portion between the power supply layer and the first conductor pattern is viewed from the power supply layer, and the ground of the connection portion between the ground layer and the second conductor pattern. A circuit board having a low EMI structure characterized in that the impedances seen from the layers are all substantially equal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8010122A JPH09205290A (en) | 1996-01-24 | 1996-01-24 | Circuit substrate with low emi structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8010122A JPH09205290A (en) | 1996-01-24 | 1996-01-24 | Circuit substrate with low emi structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH09205290A true JPH09205290A (en) | 1997-08-05 |
Family
ID=11741501
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8010122A Pending JPH09205290A (en) | 1996-01-24 | 1996-01-24 | Circuit substrate with low emi structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH09205290A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19911731A1 (en) * | 1998-03-16 | 1999-10-07 | Nec Corp | Multilayer printed circuit board for electronic device, such as information processing or communications device |
EP1130950A2 (en) * | 2000-02-29 | 2001-09-05 | Kyocera Corporation | Wiring board |
US6297965B1 (en) | 1998-06-30 | 2001-10-02 | Nec Corporation | Wiring arrangement including capacitors for suppressing electromagnetic wave radiation from a printed circuit board |
JP2006186286A (en) * | 2004-12-28 | 2006-07-13 | Nec Toppan Circuit Solutions Inc | Electronic device and printed wiring board |
US20100101841A1 (en) * | 2008-10-29 | 2010-04-29 | Hong Fu Jin Precision Industry(Shenzheng) Co., Ltd. | Printed circuit board |
US20110031007A1 (en) * | 2009-08-10 | 2011-02-10 | Samsung Electro-Mechanics Co., Ltd. | Electromagnetic interference noise reduction board using electromagnetic bandgap structure |
US20110067916A1 (en) * | 2009-09-22 | 2011-03-24 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board having electromagnetic bandgap structure |
US8966433B2 (en) | 2012-06-11 | 2015-02-24 | Fujitsu Limited | Support method, recording medium storing design support program and semiconductor device |
-
1996
- 1996-01-24 JP JP8010122A patent/JPH09205290A/en active Pending
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19911731A1 (en) * | 1998-03-16 | 1999-10-07 | Nec Corp | Multilayer printed circuit board for electronic device, such as information processing or communications device |
DE19911731C2 (en) * | 1998-03-16 | 2002-08-29 | Nec Corp | Printed circuit board |
US6297965B1 (en) | 1998-06-30 | 2001-10-02 | Nec Corporation | Wiring arrangement including capacitors for suppressing electromagnetic wave radiation from a printed circuit board |
EP1130950A2 (en) * | 2000-02-29 | 2001-09-05 | Kyocera Corporation | Wiring board |
EP1130950A3 (en) * | 2000-02-29 | 2003-12-17 | Kyocera Corporation | Wiring board |
JP2006186286A (en) * | 2004-12-28 | 2006-07-13 | Nec Toppan Circuit Solutions Inc | Electronic device and printed wiring board |
US20100101841A1 (en) * | 2008-10-29 | 2010-04-29 | Hong Fu Jin Precision Industry(Shenzheng) Co., Ltd. | Printed circuit board |
US20110031007A1 (en) * | 2009-08-10 | 2011-02-10 | Samsung Electro-Mechanics Co., Ltd. | Electromagnetic interference noise reduction board using electromagnetic bandgap structure |
US8258408B2 (en) * | 2009-08-10 | 2012-09-04 | Samsung Electro-Mechanics Co., Ltd. | Electromagnetic interference noise reduction board using electromagnetic bandgap structure |
US20110067916A1 (en) * | 2009-09-22 | 2011-03-24 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board having electromagnetic bandgap structure |
US8314341B2 (en) * | 2009-09-22 | 2012-11-20 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board having electromagnetic bandgap structure |
US8966433B2 (en) | 2012-06-11 | 2015-02-24 | Fujitsu Limited | Support method, recording medium storing design support program and semiconductor device |
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