JPH09205255A - Optical semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor device in which the positional accuracy of an alignment mark with reference to an optical waveguide is enhanced by a method in which the optical waveguide which is formed on a substrate is provided and the alignment mark which is formed together with the optical waveguide is provided. SOLUTION: Infrared rays are irradiated from the upper part of a semiconductor laser chip 1A, and their transmitted light is detected by an infrared CCD camera which is installed on the rear side of a submount 20. At this time, alignment marks 10A, at the semiconductor chip 1A, whose accuracy is coarse but which do not transmit the infrared rays and alignment marks 23, on the side of the submount 20, which transmit the infrared rays are seen so as to be overlapped with the transmission of the infrared rays. Active layers whose energy band gap is narrower than that in the circumference are left in the alignment marks 10A which are composed of crystals, and the active layers absorb the infrared rays. On the other hand, since crystals around the alignment marks 10A transmit the infrared rays, the center of gravity of areas in the marks 10A and that of areas in the marks 23 are made to agree, and the positional accuracy of both masks can be enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device such as a semiconductor laser chip, an end-face incident type photodiode, and an end-face incident type semiconductor amplifier, which can be incorporated in an optical communication module with high accuracy, and a method for manufacturing the same. Is.

[0002]

2. Description of the Related Art As a method of incorporating a semiconductor laser chip into an optical communication module, there are an "active alignment method" and a "passive alignment method". In the active alignment method, the optical axis is aligned with the optical fiber in a state where the semiconductor laser chip emits light, and the semiconductor laser chip is fixed to the submount at a position where a predetermined optical output can be obtained.

On the other hand, the above passive alignment method is
The semiconductor laser chip is fixed to the submount by aligning the alignment marks formed on the semiconductor laser chip with the alignment marks formed on the submount side, without causing the semiconductor laser chip to emit light.

Generally, since it takes a long time to align the optical axes, the passive alignment method which does not require the optical axis alignment has a better throughput than the active alignment method which requires the optical axis alignment, and the cost is low for optical communication. Modules can be made.

However, in the passive alignment method, the positional accuracy of the alignment mark formed on the semiconductor laser chip with respect to the waveguide (light emitting point) greatly affects the coupling efficiency of the laser emission light with the optical fiber, and therefore the above positional accuracy is improved. Unless improved, an optical communication module having good coupling efficiency cannot be realized.

A conventional optical semiconductor device and a passive alignment method using the same will be described with reference to FIGS. 26 and 27. FIG. 26 is a diagram showing a conventional semiconductor laser chip, where (a) is a plan view of the conventional semiconductor laser chip and (b) is a view of the conventional semiconductor laser chip taken along the line AA ′ of FIG. Sections are shown respectively. Further, FIG. 27 is a diagram showing a passive alignment method using a conventional semiconductor laser chip.

In FIGS. 26A and 26B, a conventional semiconductor laser chip 1 includes a substrate 2, an active layer 3 (optical waveguide 3a), a block layer 6, a contact layer 7, and an insulating film 8. The front surface electrode 9, a pair of alignment marks 10 formed at the same time as the front surface electrode 9, and a back surface electrode 11. The alignment mark 10 is made of the same material as the surface electrode 9.

In FIG. 27, the submount 20 includes a substrate 21, an optical fiber 22 mounted on the substrate 21,
A pair of alignment marks 23 formed on the substrate 21
And a solder material 25 formed on the metal pattern 24. The pair of alignment marks 23 are holes in the metal pattern 24 and are provided at positions symmetrical with respect to the center line of the optical fiber 22.

Next, the above-mentioned conventional passive alignment method will be described. The semiconductor laser chip 1 shown in FIG. 27A is die-bonded to the submount 20 shown in FIG. 27B while aligning with infrared rays as shown in FIG.

First, the semiconductor laser chip 1 is mounted on the submount 20 as a rough alignment by, for example, a vacuum suction device.
Transported on. The rough alignment is performed by pattern recognition using the metal pattern 24 indicating the mounting position of the semiconductor laser chip 1 on the submount 20 and the infrared transmitted light of the front surface electrode 9 or the rear surface electrode 11 of the semiconductor laser chip 1. For example, infrared rays are radiated from above the semiconductor laser chip 1 and the transmitted light thereof is a CCD (Charge Coupled De) installed on the back surface side of the submount 20.
Vice).

At this time, although the accuracy is coarse, FIG.
As shown in (c), the alignment mark 10 of the semiconductor laser chip 1 that does not transmit infrared rays and the alignment mark 23 on the submount 20 side that transmits infrared rays are
When transmitted with infrared rays, they appear to overlap.

Here, the alignment marks 10 and 23 are aligned such that the area centroids of the alignment marks 10 and 23 coincide with each other while transmitting infrared rays. Then, the metal pattern 24 and the back surface electrode 11 are bonded using the solder material 25. Then, an electrode for driving the semiconductor laser chip 1, a photodiode for monitoring the output laser light, and the like are mounted on the submount 20 to manufacture an optical communication module.

[0013]

In the conventional semiconductor laser chip as described above, the optical waveguide 3a and the alignment mark 10 are separately formed, that is, the surface electrode is formed at a step after the step of forming the active layer 3. Since the alignment mark 10 is formed together with 9, the limit of the overlay accuracy of the mask aligner is reflected, and between the center line of the optical waveguide 3a and the center line (bisector) of the pair of alignment marks 10, As shown in FIG. 26A, there has been a problem that the shift amount B inevitably occurs.

Further, since the deviation amount B is usually generated in the order of several micrometers (μm), it is very difficult to realize the precision of the submicron order required for assembly in the passive alignment system, and FIG. As shown in (C), when the semiconductor laser chip 1 having the shift amount B is used, the coupling efficiency between the optical waveguide 3a and the optical fiber 22 becomes poor, and an optical communication module having good coupling efficiency with high yield is obtained. Was difficult.

The present invention has been made in order to solve the above-mentioned problems, and it is possible to improve the position accuracy of the alignment mark with respect to the optical waveguide, and thus to obtain an optical communication module having a high yield and good coupling efficiency. It is an object of the present invention to obtain an optical semiconductor device and a method for manufacturing the same that can be manufactured.

[0016]

An optical semiconductor device according to the present invention comprises a substrate, an optical waveguide formed on the substrate,
An alignment mark formed together with the optical waveguide.

Further, the optical semiconductor device according to the present invention further includes a conductive layer formed on the substrate, an insulating film formed on the conductive layer, and a surface electrode formed on the insulating film. And a back electrode formed on the back surface of the substrate.

Further, in the optical semiconductor device according to the present invention, the conductive layer comprises a block layer formed on the substrate, and a contact layer formed on the optical waveguide and the block layer. .

Also, in the optical semiconductor device according to the present invention, the conductive layer includes a first clad layer formed on the optical waveguide and the alignment mark, and a second clad layer formed on the substrate. It will be.

Further, in the optical semiconductor device according to the present invention, the optical waveguide and the alignment mark are active layers formed at the same time.

The optical semiconductor device according to the present invention further comprises a first active layer formed at the same time as the optical waveguide and an energy band gap formed on the first active layer. Second active layer having a layer thickness narrower than that of the first active layer or thicker than the first active layer, and the alignment mark is the second active layer.

The optical semiconductor device according to the present invention further comprises a first active layer formed at the same time as the optical waveguide, and an energy bandgap formed under the first active layer. Second active layer having a layer thickness narrower than that of the first active layer or thicker than the first active layer, and the alignment mark is the second active layer.

Further, in the optical semiconductor device according to the present invention, the optical waveguide and the alignment mark are active layers formed at the same time, and the layer thickness of the active layer serving as the alignment mark is the active layer serving as the optical waveguide. Thicker than.

The optical semiconductor device according to the present invention is an active layer in which the optical waveguide and the alignment mark are formed at the same time, and an electrical isolation groove is provided between them.

Further, in the optical semiconductor device according to the present invention, the alignment mark is made of a material having an energy band gap narrower than that of the surrounding material.

Further, in the optical semiconductor device according to the present invention, the alignment mark is InGaAsP or InGa.
It is made of As, and the periphery of the alignment mark is In
It consists of P.

Further, in the optical semiconductor device according to the present invention, the alignment mark is made of InGaAs, and the periphery of the alignment mark is GaAs or AlGaA.
s.

Further, the method of manufacturing an optical semiconductor device according to the present invention includes the steps of forming an optical waveguide on the substrate and the step of forming an alignment mark together with the optical waveguide.

Further, in the method of manufacturing an optical semiconductor device according to the present invention, further, after forming the optical waveguide and the alignment mark, forming a conductive layer on the substrate, and an insulating film on the conductive layer. And a step of forming a front surface electrode on the insulating film, and a step of forming a back surface electrode on the back surface of the substrate.

In the method of manufacturing an optical semiconductor device according to the present invention, the step of forming the conductive layer includes the step of forming a block layer on the substrate after forming the optical waveguide, and the optical waveguide and Forming a contact layer on the block layer.

In the method of manufacturing an optical semiconductor device according to the present invention, the step of forming the conductive layer includes the step of forming a first clad layer on the optical waveguide and the alignment mark, and the step of forming a first clad layer on the substrate. 2 step of forming a clad layer.

Further, in the method of manufacturing an optical semiconductor device according to the present invention, the optical waveguide and the alignment mark are active layers, and both are formed simultaneously.

Further, in the method for manufacturing an optical semiconductor device according to the present invention, further, a step of forming a first active layer on the substrate at the same time as the optical waveguide, and an energy treatment on the first active layer. The band gap is narrower than the first active layer, or the layer thickness is thicker than the first active layer,
And a step of forming a second active layer serving as the alignment mark.

Further, in the method for manufacturing an optical semiconductor device according to the present invention, further, a step of forming a first active layer on the substrate at the same time as the optical waveguide, and an energy process under the first active layer are performed. The band gap is narrower than the first active layer, or the layer thickness is thicker than the first active layer,
And a step of forming a second active layer serving as the alignment mark.

In the method of manufacturing an optical semiconductor device according to the present invention, the optical waveguide and the alignment mark are active layers, and the layer thickness of the active layer serving as the alignment mark is smaller than that of the active layer serving as the optical waveguide. It is thick and both are formed simultaneously.

In the method of manufacturing an optical semiconductor device according to the present invention, the optical waveguide and the alignment mark are active layers, both of them are formed simultaneously, and an electrical isolation groove is formed between the both. It includes a process.

Further, the method of manufacturing an optical semiconductor device according to the present invention further includes a step of cleaving the wafer with the alignment mark as a reference.

[0038]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1. Embodiment 1 of the present invention will be described with reference to FIGS. 1 to 5. 1A and 1B are views showing a semiconductor laser chip according to a first embodiment of the present invention. FIG. 1A is a plan view of the semiconductor laser chip, and FIG. 1B is a plane AA ′ in FIG. Each of the cross sections of the semiconductor laser chip seen from the line is shown. 2 to FIG.
FIGS. 7A to 7C are cross-sectional views showing respective steps of manufacturing the semiconductor laser chip according to the first embodiment. Further, FIG. 5 is a diagram showing a passive alignment method using the semiconductor laser chip. In the drawings, the same reference numerals indicate the same or corresponding parts.

1A and 1B, a semiconductor laser chip 1A according to the first embodiment of the present invention is a p-type InP substrate 2 and InGaAs formed on the substrate 2.
P active layer 3 (optical waveguide 3a), p-n-pInP block layer 6 formed on the substrate 2, contact layer 7 formed thereon, and insulation formed on the contact layer 7. The film 8 includes a front surface electrode 9 formed on the insulating film 8, a pair of alignment marks 10A formed simultaneously with the optical waveguide 3a, and a back surface electrode 11 formed on the substrate 2. The alignment mark 10A is made of the same material as the optical waveguide 3a, that is, the same crystal.

Next, a method of manufacturing the semiconductor laser chip according to the first embodiment described above will be described.

As shown in FIG. 2A, an InGaAsP active layer 3 and an n-type InP clad layer 4 are grown on the p-type InP substrate 2 by, for example, MOCVD (metal organic chemical vapor deposition) crystal growth. Are sequentially formed.

Next, as shown in FIG. 2B, a ridge C which becomes the optical waveguide 3a is formed by patterning the insulating film 5 by photolithography and using it as a mask.
Then, the ridge D serving as the alignment mark 10A is simultaneously formed by mesa etching using, for example, a Br-based etching solution. The width of the ridge C serving as the optical waveguide 3a is, for example, about 0.5 to 2.5 μm (μm),
The length is about 100 to 1200 micrometer (μm). In addition, the ridge D that becomes the alignment mark 10A
Is, for example, 0.5 to 100 micrometer (μm) in diameter
It is a circular shape, but it does not necessarily have to be circular.

Next, as shown in FIG. 3A, the insulating film 5
Using as a mask, selective growth of the p-n-pInP block layer 6 is performed by, for example, MOCVD crystal growth.

Next, as shown in FIG.
Is removed and the contact layer 7 is formed by crystal growth of MOCVD, for example.

Next, as shown in FIG. 4, an insulating film 8 is newly formed by, for example, vapor deposition by sputtering, but the insulating film 8 is removed in stripes directly above the optical waveguide 3a so that current can be injected. Keep it. Finally, the n-side surface electrode 9
The p-side back surface electrode 11 is formed by vapor deposition by sputtering, for example.

Although the InP semiconductor laser chip has been described above as an example, other materials such as GaAs can be used as long as the energy band gap of the crystal of the portion which becomes the alignment mark 10A is smaller than that of the surrounding crystal. It is possible.

In the first embodiment, when the optical waveguide 3a is formed, the InGaAsP active layer 3 is left in a circular shape and used as the alignment mark 10A made of crystal.

Next, the above-mentioned semiconductor laser chip 1
A passive alignment method using A will be described. While aligning the semiconductor laser chip 1A shown in FIG. 5A with infrared rays, the submount 20 shown in FIG.
Then, die bonding is performed as shown in FIG.

First, the semiconductor laser chip 1A is mounted on the submount 2 as a rough alignment by, for example, a vacuum suction device.
0. The rough alignment is performed by pattern recognition using the metal pattern 24 indicating the mounting position of the semiconductor laser chip 1A on the submount 20 and the infrared transmitted light of the front surface electrode 9 or the rear surface electrode 11 of the semiconductor laser chip 1A. For example, infrared rays are radiated from above the semiconductor laser chip 1A, and the transmitted light is an infrared CCD (ChargeCoup) installed on the back side of the submount 20.
red Device) Detected by the camera.

At this time, although the accuracy is coarse, FIG.
As shown in, the alignment mark 10A of the semiconductor laser chip 1A that does not transmit infrared rays and the alignment mark 23 on the side of the submount 20 that transmits infrared rays appear to overlap with each other when transmitting with infrared rays. This is because the alignment mark 10A made of crystal still has an active layer with a narrower energy band gap than the surroundings, and this active layer absorbs infrared rays. On the other hand, the crystal around the alignment mark 10A transmits infrared rays.

Here, alignment is performed so that the area centroids of the alignment marks 10A and 23 coincide with each other while transmitting infrared rays. Then, the metal pattern 24 and the back surface electrode 11 are bonded using the solder material 25. Then, an electrode for driving the semiconductor laser chip 1A, a photodiode for monitoring the output laser light, and the like are mounted on the submount 20 to manufacture an optical communication module.

In the optical communication module thus manufactured, the optical waveguide 3a of the semiconductor laser chip 1A and the optical fiber 22 of the submount 20 are arranged with high accuracy and die-bonded, and high and uniform coupling efficiency is obtained. can get.

Embodiment 2 A second embodiment of the present invention will be described with reference to FIGS. 6 to 9. FIG.
2A and 2B are diagrams showing a semiconductor laser chip according to a second embodiment of the present invention, wherein FIG. 6A is a plan view of the semiconductor laser chip, and FIG. 4B is a view taken along the line AA ′ of FIG. The cross sections of the above-mentioned semiconductor laser chips are shown respectively. Also,
7 to 9 are sectional views showing the steps of manufacturing the semiconductor laser chip according to the second embodiment.

In FIGS. 6A and 6B, a semiconductor laser chip 1B according to the second embodiment of the present invention includes a p-type InP substrate 2 and an InGaAsP active layer 3 (optical waveguide 3).
a), a p-n-pInP block layer 6, a contact layer 7, an insulating film 8, a surface electrode 9, and a pair of alignment marks formed on the active layer 3 formed at the same time as the optical waveguide 3a. 10B and the back surface electrode 11 are provided. The alignment mark 10B is an infrared absorption layer having a narrower energy band gap or a thicker layer than the active layer 3.

Next, a method of manufacturing the semiconductor laser chip according to the second embodiment described above will be described.

As shown in FIG. 7A, an infrared absorption layer composed of an InGaAsP active layer 3, an n-type InP clad layer 4, and an InGaAsP active layer on the p-type InP substrate 2 to serve as an alignment mark 10B. 12 are sequentially formed by crystal growth, for example, MOCVD (metal organic chemical vapor deposition).

Next, as shown in FIG. 7B, the ridge C which becomes the optical waveguide 3a is patterned by photolithography, that is, the insulating film 5 is patterned.
Then, the ridge D serving as the alignment mark 10B is simultaneously formed by mesa etching using, for example, a Br-based etching solution. The width of the ridge C serving as the optical waveguide 3a is, for example, about 0.5 to 2.5 μm (μm),
The length is about 100 to 1200 micrometer (μm). In addition, the ridge D that becomes the alignment mark 10B
Is, for example, 0.5 to 100 micrometer (μm) in diameter
It is a circular shape, but it does not necessarily have to be circular.

Next, as shown in FIG. 8A, the insulating film 5
Using as a mask, selective growth of the p-n-pInP block layer 6 is performed by, for example, MOCVD crystal growth.

Then, as shown in FIG.
Of the InGaAsP active layer 3 which becomes the optical waveguide 3a by removing
The infrared absorption layer 12 immediately above is removed by etching with nitric acid, for example. InG that becomes the optical waveguide 3a
The infrared absorption layer 12 directly above the aAsP active layer 3 is removed in order to eliminate the inconvenience that the laser light is absorbed.

Next, as shown in FIG. 9A, the insulating film 5
After removing the infrared absorption layer 12, the contact layer 7 is formed by crystal growth by MOCVD, for example.

Next, as shown in FIG. 6B, the insulating film 8 is newly formed by, for example, vapor deposition by sputtering, but the insulating film 8 is formed in a stripe shape just above the optical waveguide 3a so that current can be injected. To remove. Finally, the n-side front surface electrode 9 and the p-side back surface electrode 11 are formed by vapor deposition by sputtering, for example.

In the first embodiment, the InGaAsP active layer 3 is used as the alignment mark 10A made of crystal, but in the second embodiment, as shown in FIG. 6B, the InGaAsP active layer 3 is directly above the InGaAsP active layer 3. The infrared absorption layer 12 having a larger energy absorption band than the active layer 3 is inserted in the semiconductor laser chip 1B because the energy band gap is narrower than that of the active layer 3 or the layer is thicker than the active layer 3.

With such a structure, the alignment mark 10B having a clearer contrast can be seen by the pattern recognition by the infrared transmitted light, as compared with the case where only the active layer 3 of the first embodiment is used as the alignment mark 10A. Therefore, the accuracy of die bonding is improved. Note that the passive alignment method is the same as that in the above-described first embodiment, and therefore its description is omitted.

Embodiment 3 A third embodiment of the present invention will be described with reference to FIGS. 10 to 13.
10A and 10B are views showing a semiconductor laser chip according to a third embodiment of the present invention. FIG. 10A is a plan view of the semiconductor laser chip, and FIG. 10B is a plan view taken along the line AA 'in FIG. 10A. Each of the cross sections of the semiconductor laser chip seen from the line is shown.
Further, FIGS. 11 to 13 are cross-sectional views showing each manufacturing process of the semiconductor laser chip according to the third embodiment.

In FIGS. 10A and 10B, the semiconductor laser chip 1C according to the third embodiment of the present invention has a p
Type InP substrate 2, InGaAsP active layer 3 (optical waveguide 3a), pnpInP block layer 6, contact layer 7, insulating film 8, surface electrode 9, and optical waveguide 3a were formed at the same time. A pair of alignment marks 10C formed under the active layer 3 and a back surface electrode 11 are provided. The alignment mark 10C is an infrared absorption layer having a narrower energy band gap or a thicker layer than the active layer 3.

Next, a method of manufacturing the semiconductor laser chip according to the third embodiment described above will be described.

As shown in FIG. 11A, on the p-type InP substrate 2, an infrared absorbing layer 12 made of an InGaAsP active layer and serving as an alignment mark 10C, and an n-type I layer.
The nP clad layer 4, the InGaAsP active layer 3, and another n-type InP clad layer 4 are sequentially formed by crystal growth, for example, MOCVD (metal organic chemical vapor deposition).

Next, as shown in FIG. 6B, a ridge C which becomes the optical waveguide 3a is patterned by photolithography, that is, by patterning the insulating film 5.
Then, the ridge D serving as the alignment mark 10C is simultaneously formed by mesa etching using, for example, a Br-based etching solution. The width of the ridge C serving as the optical waveguide 3a is, for example, about 0.5 to 2.5 μm (μm),
The length is about 100 to 1200 micrometer (μm). In addition, the ridge D that becomes the alignment mark 10C
Is, for example, 0.5 to 100 micrometer (μm) in diameter
It is a circular shape, but it does not necessarily have to be circular.

Next, as shown in FIG. 12A, the pn-pInP block layer 6 is selectively grown by, for example, MOCVD crystal growth using the insulating film 5 as a mask.

Next, as shown in FIG.
Is removed and the contact layer 7 is formed by crystal growth of MOCVD, for example.

Next, as shown in FIG. 13, an insulating film 8 is newly formed by, for example, vapor deposition by sputtering, but the insulating film 8 is removed in stripes directly above the optical waveguide 3a so that current can be injected. Keep it. Finally, the n-side front surface electrode 9 and the p-side back surface electrode 11 are formed by vapor deposition by sputtering, for example.

In the second embodiment, the energy bandgap is narrower or thicker than the active layer 3 just above the InGaAsP active layer 3, so that the infrared absorption amount is larger than that of the active layer 3. Although the infrared absorption layer 12 is inserted in the semiconductor laser chip 1B, in the third embodiment, the infrared absorption layer 1 is provided directly below the InGaAsP active layer 3.
2 is provided.

With such a structure, the alignment mark 10C having a clearer contrast can be seen by the pattern recognition by the transmitted light of infrared rays as compared with the case where only the active layer 3 of the first embodiment is used as the alignment mark 10A. Therefore, the accuracy of die bonding is improved. Note that the passive alignment method is the same as that in the above-described first embodiment, and therefore its description is omitted.

Fourth Embodiment A fourth embodiment of the present invention will be described with reference to FIGS. 14 to 17.
14A and 14B are views showing a semiconductor laser chip according to a fourth embodiment of the present invention, in which FIG. 14A is a plan view of the semiconductor laser chip, and FIG. 14B is a view taken along the line AA ′ in FIG. Each of the cross sections of the semiconductor laser chip seen from the line is shown.
Further, FIGS. 15 to 17 are views showing cross sections in each manufacturing process of the semiconductor laser chip according to the fourth embodiment.

In FIGS. 14A and 14B, the semiconductor laser chip 1D according to the fourth embodiment of the present invention has a p
Type InP substrate 2, InGaAsP active layer 3 (optical waveguide 3a), pnpInP block layer 6, contact layer 7, insulating film 8, surface electrode 9, and optical waveguide 3a were formed at the same time. A pair of alignment marks 10D,
The back surface electrode 11 is provided. Alignment mark 1
0D has an equivalently smaller energy band gap and a thicker layer than the active layer 3.

Next, a method of manufacturing the semiconductor laser chip according to the above-described fourth embodiment will be described.

As shown in FIG. 15A, an insulating film 13 is patterned on the p-type InP substrate 2 by vapor deposition by sputtering, and the selective growth groove 14 is formed with, for example, sulfuric acid as a selective growth mask for the active layer. It is formed by etching with a system etching solution.

Next, as shown in FIG. 7B, the InGaAsP active layer 3 and the InP clad layer 4 are formed in the selective growth groove 14.
Is selectively grown by, for example, crystal growth by MOCVD method, and the thickly grown portion of the active layer 3 becomes the infrared absorption layer 15 to be the alignment mark 10D.

Next, as shown in FIG. 16 (a), a ridge that becomes the optical waveguide 3a by photolithography, that is, by patterning the insulating film 5 and using it as a mask.
C and the ridge D serving as the alignment mark 10D are simultaneously formed by, for example, mesa etching with a Br-based etching solution. The width of the ridge C serving as the optical waveguide 3a is, for example, about 0.5 to 2.5 micrometer (μm), and the length is about 100 to 1200 micrometer (μm). Further, the ridge D serving as the alignment mark 10C has, for example, a diameter of 0.5 to 100 μm (μ
The circular shape is about m), but the circular shape is not necessarily required.

Next, as shown in FIG.
Using as a mask, selective growth of the p-n-pInP block layer 6 is performed by, for example, MOCVD crystal growth.

Next, as shown in FIG. 17A, the insulating film 5 is removed and the contact layer 7 is formed by crystal growth by, for example, the MOCVD method.

Next, as shown in FIG. 9B, a new insulating film 8 is formed by, for example, vapor deposition by sputtering, and the insulating film 8 is formed in a stripe shape just above the optical waveguide 3a so that current can be injected. To remove. Finally, the n-side front surface electrode 9 and the p-side back surface electrode 11 are formed by vapor deposition by sputtering, for example.

In the second or third embodiment, InGaAs is used.
An infrared absorption layer 12 having a larger energy absorption band than the active layer 3 is provided directly above or below the P active layer 3 because the energy band gap is narrower or the layer is thicker than the active layer 3. However, in the fourth embodiment, the alignment mark 10D equivalently has a smaller energy band gap and a larger layer thickness than the InGaAsP active layer 3 by using selective growth, that is, a layer having a large infrared ray absorption amount is provided. .

With such a structure, the alignment mark 10D having a clearer contrast can be seen by pattern recognition by the transmitted light of infrared rays as compared with the case where only the active layer 3 of the first embodiment is used as the alignment mark 10A. Therefore, the accuracy of die bonding is improved. Note that the passive alignment method is the same as that in the above-described first embodiment, and therefore its description is omitted.

Embodiment 5 FIG. Embodiment 5 of the present invention will be described with reference to FIGS. 18 to 21.
18A and 18B are views showing a semiconductor laser chip according to a fifth embodiment of the present invention, wherein FIG. 18A is a plan view of the semiconductor laser chip, and FIG. 18B is a plan view taken along the line AA ′ in FIG. Each of the cross sections of the semiconductor laser chip seen from the line is shown.
In addition, FIGS. 19 to 21 are cross-sectional views showing respective steps of manufacturing the semiconductor laser chip according to the fifth embodiment.

18 (a) and 18 (b), the semiconductor laser chip 1E according to the fifth embodiment of the present invention has p
Type InP substrate 2, InGaAsP active layer 3 (optical waveguide 3a), pnpInP block layer 6, contact layer 7, insulating film 8, surface electrode 9, and optical waveguide 3a were formed at the same time. A pair of alignment marks 10A,
The back electrode 11 and the electrical isolation groove 16 are provided.

Next, a method of manufacturing the semiconductor laser chip according to the fifth embodiment described above will be described.

As shown in FIG. 19A, an InGaAsP active layer 3 and an n-type InP clad layer 4 are formed on a p-type InP substrate 2 by, for example, MOCVD (metal organic chemical vapor deposition) crystal. Sequentially formed by growth.

Next, as shown in FIG. 7B, a ridge C which becomes the optical waveguide 3a is formed by patterning the insulating film 5 by photolithography and using it as a mask.
Then, the ridge D serving as the alignment mark 10A is simultaneously formed by mesa etching using, for example, a Br-based etching solution. The width of the ridge C serving as the optical waveguide 3a is, for example, about 0.5 to 2.5 μm (μm),
The length is about 100 to 1200 micrometer (μm). In addition, the ridge D that becomes the alignment mark 10A
Is, for example, 0.5 to 100 micrometer (μm) in diameter
It is a circular shape, but it does not necessarily have to be circular.

Next, as shown in FIG. 20A, selective growth of the p-n-pInP block layer 6 is performed by, for example, crystal growth by MOCVD using the insulating film 5 as a mask.

Next, as shown in FIG.
Is removed and the contact layer 7 is formed by crystal growth of MOCVD, for example.

Next, as shown in FIG. 21A, an electrical isolation groove 16 is formed by etching with a Br type etching solution using a photoresist as a mask.

Next, as shown in FIG. 9B, a new insulating film 8 is formed by, for example, vapor deposition by sputtering, but the insulating film 8 is formed in stripes directly above the optical waveguide 3a so that current can be injected. To remove. Finally, the n-side front surface electrode 9 and the p-side back surface electrode 11 are formed by vapor deposition by sputtering, for example.

With such a structure having the electrical isolation groove 16, it is possible to prevent the leakage current from flowing to the alignment mark 10A and prevent the deterioration of the characteristics of the semiconductor laser chip 1E. In addition, it can be applied to the second to fourth embodiments. Further, the passive alignment method is the same as that of the above-mentioned first embodiment, and therefore its explanation is omitted.

Sixth Embodiment A sixth embodiment of the present invention will be described with reference to FIGS. 22 to 24.
22A and 22B are views showing a semiconductor laser chip according to a sixth embodiment of the present invention, wherein FIG. 22A is a plan view of the semiconductor laser chip, and FIG. 22B is a view AA ′ in FIG. Each of the cross sections of the semiconductor laser chip seen from the line is shown.
23 and 24 are sectional views showing the steps of manufacturing the semiconductor laser chip according to the sixth embodiment.

In FIGS. 22A and 22B, the semiconductor laser chip 1F according to the sixth embodiment of the present invention is n
Type InP substrate 2A, InGaAsP active layer 3 (optical waveguide 3a), p-InP first cladding layer 30, and p-I
an nP second cladding layer 32, a current confinement insulating film 33,
A P-side electrode (front surface electrode) 35, a pair of alignment marks 10D formed simultaneously with the optical waveguide 3a, and a back surface electrode 11 are provided. The alignment mark 10D has an equivalently smaller energy band gap and a thicker layer than the active layer 3. In addition, the clad layer 3
0 and 32 have lower conductivity than the contact layer.

In the fourth embodiment, as shown in FIG. 15A, the opening width of the insulating film 13 as the selective growth mask in the portion where the active layer 3 is formed is as shown in FIG. 17B. Since the width of the final active layer is wider than that of the final active layer, it is necessary to reduce the width of the active layer to a width capable of functioning as a single transverse mode optical waveguide by the etching process shown in FIG.

In the sixth embodiment, as shown in FIG. 23 (a), the opening width of the insulating film 31 as the selective growth mask is made substantially the same as the width of the final active layer in advance, and the selective growth is performed. By simply forming the active layer 3 by using, the width of the active layer automatically becomes about the width of the single transverse mode optical waveguide, and the etching step shown in FIG. 16A becomes unnecessary. In this case, FIG.
Since the insulating film 5 for growing the block layer as shown in (a) is not formed, the current block layer cannot be grown. Therefore, the steps after the selective growth of the active layer 3 are as follows.

First, as shown in FIG. 23A, n-I
The active layer 3 and the p-InP first cladding layer 30 are selectively grown on the nP substrate 2A, and the insulating film 31 used for this selective growth is removed with hydrofluoric acid or the like.

Next, as shown in FIG. 23B, after removing the insulating film 31 used for the selective growth with hydrofluoric acid or the like,
The p-InP second cladding layer 32 is grown on the entire surface.

Next, as shown in FIG. 24A, a current confinement insulating film 33 is formed on the entire surface, and a current passage window 34 is formed by photolithography only on the optical waveguide and etching with hydrofluoric acid or the like.
To form

Finally, as shown in FIG. 24B, a P-side electrode 35 is formed on the current confinement insulating film 33 by vapor deposition.

According to this structure, it is possible to efficiently inject a current into the active layer 3 of the optical waveguide and oscillate it by the current confinement insulating film 33 without the current blocking layer.
In the case of this structure, the current leaks through the current leak path 36 shown in FIG. 24B and becomes an ineffective component for light emission. However, the substrate is an n-InP substrate and the upper cladding layer is p-InP first cladding layer 32 and p-InP
By forming the second cladding layer 33, it is preferable that the current leak path 36 is made of p-type InP having high electric resistance to reduce the leak current.

Further, in the sixth embodiment, an example in which the P-side contact layer is formed is shown, but in that case,
An AuZn-based P-side electrode 35 may be used to make it easier to obtain electrode ohmic contact.

Further, in the above-mentioned fourth embodiment, FIG.
As shown in (a), the selective growth groove 14 is first formed, but since it is not always necessary, the sixth embodiment shows an example in which the selective growth groove 14 is not formed.

The etching step of forming the infrared absorption layer in a shape that functions as an alignment mark also serves as the etching step of the optical waveguide shown in FIG. 16A of the fourth embodiment. 23A is omitted, in the patterning step of the insulating film 31 which is the selective growth mask, the opening of the alignment mark portion and the formation of the alignment mark can be formed by setting the shape of the alignment mark to be almost the final alignment mark. Active layer 3
Can be completed simultaneously with the optical waveguide 3 at the stage of selective growth of.

According to the above embodiment, as described above, the step of forming the optical waveguide and the alignment mark by etching shown in FIG. Can be raised.

Embodiment 7 FIG. In each of the above first to sixth embodiments, InG is used as the crystal of the alignment marks 10A to 10D.
Although aAsP is used, the seventh embodiment uses InGaAs as the alignment mark crystal and InP as the surrounding crystal.

Eighth Embodiment In each of the above-described first to sixth embodiments, InGaAs is used as the alignment marks 10A to 10D.
Although P is used, in the eighth embodiment, InGaAs is used as the alignment mark and GaAs is used as the surrounding crystal.
Alternatively, AlGaAs is used.

[Embodiment 9] Although a pair of circular alignment marks are shown in each of the above embodiments, the shape may be a polygon, an ellipse, a cross, and the like, and the number of alignment marks may be one or three or more.

Embodiment 10 FIG. When the wafer according to the present invention is cleaved by the conventional cleaving method, that is, as shown in FIG. 25, the center line 17 of the surface electrodes 9 (P-side electrodes 35) in two horizontal rows.
When cleaved in a bar shape, the light emitting point (the cleaved portion of the optical waveguide 3a)
The positions of the alignment marks with respect to are not aligned. Therefore, in the tenth embodiment, as shown in FIG.
While observing the alignment marks 10A (10B to 10D) with an infrared CCD camera, the semiconductor laser chips are cleaved or diced from the wafer at the center lines 18 of the alignment marks 10A in two horizontal rows. The cleaving method according to the tenth embodiment uses the alignment marks 10A (10B to 10D) for the light emitting points.
It is possible to cut out the semiconductor laser chip having the positions E aligned.

[0112]

As described above, the optical semiconductor device according to the present invention includes the substrate, the optical waveguide formed on the substrate, and the alignment mark formed together with the optical waveguide. With this, it is possible to improve the positional accuracy of the alignment mark.

As described above, the optical semiconductor device according to the present invention further includes a conductive layer formed on the substrate, an insulating film formed on the conductive layer, and an insulating film formed on the insulating film. Since the formed front surface electrode and the back surface electrode formed on the back surface of the substrate are provided, it is possible to improve the positional accuracy of the optical waveguide and the alignment mark.

In the optical semiconductor device according to the present invention, as described above, the conductive layer includes the block layer formed on the substrate, the optical waveguide and the contact layer formed on the block layer. Therefore, the positional accuracy of the optical waveguide and the alignment mark can be improved.

In the optical semiconductor device according to the present invention, as described above, the conductive layer has the first cladding layer formed on the optical waveguide and the alignment mark and the first cladding layer formed on the substrate. Since it is composed of two clad layers, it is possible to improve the positional accuracy of the optical waveguide and the alignment mark.

Further, in the optical semiconductor device according to the present invention, as described above, the optical waveguide and the alignment mark are the active layers formed at the same time, so that the positional accuracy of the optical waveguide and the alignment mark can be improved. Produce an effect.

As described above, the optical semiconductor device according to the present invention further includes a first active layer formed at the same time as the optical waveguide and an energy band formed on the first active layer. A second active layer having a gap narrower than that of the first active layer or thicker than the first active layer is provided, and the alignment mark is the second active layer. This has the effect of improving the recognition of the mark.

Further, as described above, the optical semiconductor device according to the present invention further includes the first active layer formed at the same time as the optical waveguide and the energy band formed under the first active layer. A second active layer having a gap narrower than that of the first active layer or thicker than the first active layer is provided, and the alignment mark is the second active layer. This has the effect of improving the recognition of the mark.

Further, in the optical semiconductor device according to the present invention, as described above, the optical waveguide and the alignment mark are the active layers formed at the same time, and the layer thickness of the active layer serving as the alignment mark is the optical layer. Since it is thicker than the active layer serving as the waveguide, it has an effect of improving the recognition of the alignment mark.

Further, in the optical semiconductor device according to the present invention, as described above, the optical waveguide and the alignment mark are the active layers formed at the same time, and the electrical isolation groove is provided between them, It is possible to prevent the deterioration of the characteristics of the device.

In the optical semiconductor device according to the present invention, as described above, the alignment mark is made of a material having an energy bandgap narrower than that of the surrounding material, so that the positional accuracy of the optical waveguide and the alignment mark is improved. There is an effect that it can be improved.

In the optical semiconductor device according to the present invention, as described above, the alignment mark is InG.
Since the alignment mark is made of aAsP or InGaAs and the periphery of the alignment mark is made of InP, the positional accuracy of the optical waveguide and the alignment mark can be improved.

Further, in the optical semiconductor device according to the present invention, as described above, the alignment mark is made of InG.
It is made of aAs, and the circumference of the alignment mark is G
Since it is made of aAs or AlGaAs, it is possible to improve the positional accuracy of the optical waveguide and the alignment mark.

Further, as described above, the method for manufacturing an optical semiconductor device according to the present invention includes the step of forming the optical waveguide on the substrate and the step of forming the alignment mark together with the optical waveguide. With this, it is possible to improve the positional accuracy of the alignment mark.

As described above, the method of manufacturing an optical semiconductor device according to the present invention further comprises the step of forming a conductive layer on the substrate after forming the optical waveguide and the alignment mark, and the conductive layer. Since it includes a step of forming an insulating film on the layer, a step of forming a front surface electrode on the insulating film, and a step of forming a back surface electrode on the back surface of the substrate, the positional accuracy of the optical waveguide and the alignment mark can be improved. Has the effect.

In the method of manufacturing an optical semiconductor device according to the present invention, as described above, the step of forming the conductive layer includes the step of forming the block layer on the substrate after forming the optical waveguide. Since the step of forming a contact layer on the optical waveguide and the block layer is included, the positional accuracy of the optical waveguide and the alignment mark can be improved.

In the method for manufacturing an optical semiconductor device according to the present invention, as described above, the step of forming the conductive layer includes the step of forming a first cladding layer on the optical waveguide and the alignment mark, Since the method includes the step of forming the second cladding layer on the substrate, it is possible to improve the positional accuracy of the optical waveguide and the alignment mark.

As described above, in the method for manufacturing an optical semiconductor device according to the present invention, the optical waveguide and the alignment mark are the active layers, and both are formed simultaneously. This has the effect of improving the positional accuracy.

As described above, the method for manufacturing an optical semiconductor device according to the present invention further includes the step of forming a first active layer on the substrate at the same time as the optical waveguide, and the first active layer. And an energy band gap narrower than that of the first active layer, or a layer thickness of the second active layer that is thicker than the first active layer.
Since the step of forming the active layer is included, it is possible to improve the recognition of the alignment mark.

As described above, the method for manufacturing an optical semiconductor device according to the present invention further includes the step of forming a first active layer on the substrate at the same time as the optical waveguide, and the first active layer. And a second energy bandgap that is narrower than the first active layer or thicker than the first active layer and serves as the alignment mark.
Since the step of forming the active layer is included, it is possible to improve the recognition of the alignment mark.

In the method for manufacturing an optical semiconductor device according to the present invention, as described above, the optical waveguide and the alignment mark are active layers, and the layer thickness of the active layer serving as the alignment mark is the same as that of the optical waveguide. Since it is thicker than the active layer, and both of them are formed at the same time, it is possible to improve the recognition of the alignment mark.

Further, in the method for manufacturing an optical semiconductor device according to the present invention, as described above, the optical waveguide and the alignment mark are active layers, both of them are formed simultaneously, and an electrical connection is made between the two. Since the step of forming the separation groove is included, it is possible to prevent deterioration of the characteristics of the device.

Furthermore, the method for manufacturing an optical semiconductor device according to the present invention further includes the step of cleaving the wafer with the alignment mark as a reference, as described above.
This has the effect of improving the cleavage accuracy of the chip.

[Brief description of drawings]

FIG. 1 is a diagram showing a plane and a cross section of a semiconductor laser chip according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a passive alignment method using the semiconductor laser chip according to the first embodiment of the present invention.

FIG. 6 is a diagram showing a plane and a cross section of a semiconductor laser chip according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the second embodiment of the present invention.

FIG. 8 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the second embodiment of the present invention.

FIG. 9 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the second embodiment of the present invention.

FIG. 10 is a diagram showing a plane and a cross section of a semiconductor laser chip according to a third embodiment of the present invention.

FIG. 11 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the third embodiment of the present invention.

FIG. 12 is a view showing a section of each manufacturing process of the semiconductor laser chip according to the third embodiment of the present invention.

FIG. 13 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the third embodiment of the present invention.

FIG. 14 is a diagram showing a plane and a cross section of a semiconductor laser chip according to a fourth embodiment of the present invention.

FIG. 15 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the fourth embodiment of the present invention.

FIG. 16 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the fourth embodiment of the present invention.

FIG. 17 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the fourth embodiment of the present invention.

FIG. 18 is a diagram showing a plane and a cross section of a semiconductor laser chip according to a fifth embodiment of the present invention.

FIG. 19 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the fifth embodiment of the present invention.

FIG. 20 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the fifth embodiment of the present invention.

FIG. 21 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the fifth embodiment of the present invention.

FIG. 22 is a diagram showing a plane and a cross section of a semiconductor laser chip according to a sixth embodiment of the present invention.

FIG. 23 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the sixth embodiment of the present invention.

FIG. 24 is a diagram showing a cross section of each manufacturing process of the semiconductor laser chip according to the sixth embodiment of the present invention.

FIG. 25 is a diagram showing a method for cleaving a semiconductor laser chip according to the tenth embodiment of the present invention.

FIG. 26 is a view showing a plane and a cross section of a conventional semiconductor laser chip.

FIG. 27 is a diagram showing a passive alignment method using a conventional semiconductor laser chip.

[Explanation of symbols]

1A, 1B, 1C, 1D, 1E, 1F Semiconductor laser chip, 2 p-type InP substrate, 2A n-type InP substrate, 3
InGaAsP active layer, 3a optical waveguide, 6p-n-
pInP block layer, 7 contact layer, 8 insulating film,
9 front surface electrode, 10A, 10B, 10C, 10D alignment mark, 11 back surface electrode, 30 first clad layer, 32 second clad layer, 33 insulating film for current constriction.

Claims (22)

[Claims] 1. An optical semiconductor device comprising a substrate, an optical waveguide formed on the substrate, and an alignment mark formed together with the optical waveguide. 2. A conductive layer formed on the substrate, an insulating film formed on the conductive layer, a front surface electrode formed on the insulating film, and a rear surface of the substrate. A back surface electrode is provided.
The optical semiconductor device according to the above. 3. The optical semiconductor device according to claim 2, wherein the conductive layer includes a block layer formed on the substrate and a contact layer formed on the optical waveguide and the block layer. 4. The optical semiconductor device according to claim 2, wherein the conductive layer is a first clad layer formed on the optical waveguide and the alignment mark, and a second clad layer formed on the substrate. . 5. The optical semiconductor device according to claim 2, wherein the optical waveguide and the alignment mark are active layers formed at the same time. 6. A first active layer formed at the same time as the optical waveguide, and an energy band gap narrower than that of the first active layer and formed on the first active layer. The optical semiconductor device according to claim 3, further comprising a second active layer having a thickness larger than that of the first active layer, wherein the alignment mark is the second active layer. 7. A first active layer formed at the same time as the optical waveguide, and an energy band gap narrower than that of the first active layer, which is formed under the first active layer. The optical semiconductor device according to claim 3, further comprising a second active layer having a thickness larger than that of the first active layer, wherein the alignment mark is the second active layer. 8. The optical waveguide and the alignment mark are active layers formed at the same time, and the layer thickness of the active layer serving as the alignment mark is thicker than the active layer serving as the optical waveguide. Optical semiconductor device. 9. The optical semiconductor device according to claim 3, wherein the optical waveguide and the alignment mark are active layers formed at the same time, and an electrical isolation groove is provided between them. 10. The optical semiconductor device according to claim 1, wherein the alignment mark is made of a material having an energy band gap narrower than that of a material around the alignment mark. 11. The alignment mark is InGa.
11. The optical semiconductor device according to claim 10, which is made of AsP or InGaAs, and the periphery of the alignment mark is made of InP. 12. The alignment mark is InGa.
The alignment mark is made of Ga and is surrounded by Ga.
The optical semiconductor device according to claim 10, which is made of As or AlGaAs. 13. A method of manufacturing an optical semiconductor device, comprising: a step of forming an optical waveguide on a substrate; and a step of forming an alignment mark together with the optical waveguide. 14. A step of forming a conductive layer on the substrate after forming the optical waveguide and the alignment mark, a step of forming an insulating film on the conductive layer, and a surface on the insulating film. The method of manufacturing an optical semiconductor device according to claim 13, further comprising the step of forming an electrode and the step of forming a back surface electrode on the back surface of the substrate. 15. The step of forming the conductive layer includes the steps of forming a block layer on the substrate after forming the optical waveguide, and forming a contact layer on the optical waveguide and the block layer. The method for manufacturing an optical semiconductor device according to claim 14, further comprising: 16. The step of forming the conductive layer includes the step of forming a first clad layer on the optical waveguide and the alignment mark, and the step of forming a second clad layer on the substrate. 15. The method for manufacturing an optical semiconductor device according to 14. 17. The optical waveguide and the alignment mark are active layers, and both are formed simultaneously.
4. The method for manufacturing an optical semiconductor device according to 4. 18. A step of forming a first active layer on the substrate simultaneously with the optical waveguide, and an energy bandgap on the first active layer is narrower than that of the first active layer. , Or the layer thickness is the first
16. The method for manufacturing an optical semiconductor device according to claim 15, further comprising the step of forming a second active layer which is thicker than the active layer and serves as the alignment mark. 19. A step of forming a first active layer on the substrate at the same time as the optical waveguide, and an energy band gap under the first active layer is narrower than that of the first active layer. , Or the layer thickness is the first
16. The method for manufacturing an optical semiconductor device according to claim 15, further comprising the step of forming a second active layer which is thicker than the active layer and serves as the alignment mark. 20. The optical waveguide and the alignment mark are active layers, the layer thickness of the active layer serving as the alignment mark is thicker than the active layer serving as the optical waveguide, and both are formed simultaneously. Or the method for manufacturing an optical semiconductor device according to item 16. 21. The optical semiconductor device according to claim 15, wherein the optical waveguide and the alignment mark are active layers, both of them are formed simultaneously, and a step of forming an electrical isolation groove between the two is further included. Manufacturing method. 22. The method for manufacturing an optical semiconductor device according to claim 13, further comprising the step of cleaving the wafer based on the alignment mark.