JP2924834B2 - Optical semiconductor device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an optical semiconductor device and an optical semiconductor integrated device used for optical communication and optical information processing.

[0002]

2. Description of the Related Art With the recent development of optical communication systems, in particular, an increase in demand for access optical communication and optical interconnection, the importance of low-priced semiconductor laser modules has increased. In these modules, it is important to suppress the coupling loss with the optical fiber or the silica-based optical waveguide, and the development of a semiconductor laser with an increased spot size of the guided light by integrating a thin-film optical waveguide at the emission end is needed. I'm advancing.

A monolithic optical integrated device in which several optical components are integrated on a semiconductor substrate has been developed because it has advantages such as a reduction in module mounting cost, and has been developed. An optical integrated device for bidirectional communication in which an optical waveguide is integrated, and a matrix optical switch in which a gate optical amplifier and a branch optical waveguide are integrated are also being developed.

In such an optical integrated device, an active layer of a semiconductor laser or a gate optical amplifier having different band gap energies, a light absorbing layer of a photodetector, and a core layer of an optical waveguide are connected in the waveguide direction. In the spot size conversion optical waveguide region, it is necessary to change the thickness of the core layer of the waveguide into a tapered shape in order to avoid light loss due to mode mismatch. For this reason, a butt joint structure formed by etching and regrowth has been widely used for connecting such optical waveguide layers having different layer thicknesses or band gap energies.

However, in the above-described structure, the manufacturing process is complicated, and there is a concern about uniformity and yield.

Therefore, as a manufacturing method to solve these problems, a method using selective MOVPE (metal organic chemical vapor deposition) has been proposed and used for manufacturing various optical integrated devices (Japanese Patent Application No. Hei. No. 222928 and Japanese Patent Application No. 3-6
7498).

In this method, a pair of dielectric thin films are formed in a stripe shape on a semiconductor substrate, and semiconductor optical waveguides are selectively formed in the gaps. The thickness of the growth layer is changed by changing the mask width. Since the band gap energy changes, a mask pattern in which the mask width is changed in the direction of the waveguide is used. The wave layer can be formed collectively by one crystal growth.

Hereinafter, a method for manufacturing a conventional spot size conversion optical waveguide integrated semiconductor laser will be described.

FIG. 5 is a diagram showing an example of a method for manufacturing a conventional spot size conversion optical waveguide integrated semiconductor laser.

First, a pair of dielectric thin film SiO ₂ masks 121 are formed on an n-type InP substrate 101 (FIG. 5A). The mask width of the SiO ₂ mask 121 is 50 μm in the active region 142 and 6 μm in the spot size conversion waveguide region 143, and the mask width is tapered between the active region 142 and the spot size conversion waveguide region 143. It was formed to change. The width of the waveguide region 141 between the masks was set to about 1.5 μm.

Next, by selective MOVPE, n-type InP
A double hetero (DH) structure composed of an n-type InP cladding layer 102, a quantum well active layer 103 and a p-type InP cladding layer 104 was grown on a substrate 101 (FIG. 5).
(B)). At this time, on the SiO ₂ mask 121 without crystal growth, in the waveguide region 141 sandwiched between the SiO ₂ mask 121, DH structure is formed in a mesa shape. Further, due to the properties of the selective MOVPE, in the spot size conversion waveguide region 143 having a narrow mask width,
The layer thickness of the active layer 103 is reduced as compared with the active region 142 having a wide mask width, whereby light confinement to the active layer 103 is reduced and the spot size is increased. Further, in the spot size conversion waveguide region 143, the band gap energy is larger than that in the active region 142. Therefore, the spot size conversion waveguide becomes transparent to the laser light generated in the active region 142, and the spot size conversion waveguide is formed. The absorption loss in the wave path region 143 is suppressed.

After the formation of the optical waveguide in this manner, the SiO ₂ mask 121 in contact with the mesa structure formed in the waveguide region 141 is partially removed by etching, and thereafter,
The InP buried layer 108 and the p-type InGaAs contact layer 107 were regrown so as to cover the mesa structure (FIG. 5C). Note that the carrier concentration of the p-type InP buried layer 108 is generally 5 × 10 ¹⁷ cm ⁻³ to 1 × 10
A range of ¹⁸ cm ^-3 has been used.

Next, the spot size conversion waveguide region 14
3 is removed, a p-side electrode (not shown) is formed on the surface of the p-type InGaAs contact layer 107 in the active region 142, and an n-side electrode is formed on the back surface of the n-type InP substrate 101. (Not shown) was formed and cut out to obtain an element.

FIG. 6 is a longitudinal sectional view in the waveguide direction of an element manufactured by the method shown in FIG. 5. FIG. 6A shows an example in which the waveguide region and the active region are buried by the same buried layer. (B) is a diagram showing an example in which the waveguide region and the active region are buried by different buried layers.

As shown in FIG. 6A, the DH structure comprising the n-type InP cladding layer 102, the active layer 103 and the p-type InP cladding layer 104 has a thickness of the active region 142 and the spot size conversion waveguide region 143. , And a p-type InP buried layer 108
Are formed over both regions.

FIGS. 7A and 7B are diagrams showing the structure of various optical integrated devices using an optical semiconductor device. FIG. 7A is a diagram showing an example of the structure of a transmitting and receiving optical integrated device, and FIG. 1 × 4 as an example of the matrix optical switch
It is a figure showing the structure of an optical switch.

As shown in FIG. 7A, the transmitting and receiving optical integrated device includes a transmitting semiconductor laser (LD) 44, a monitoring photodiode (PD) 45, and a receiving photodiode (PD) 46. It is configured to be connected to the waveguide 47.

In the case shown in FIG. 7B,
The four-channel semiconductor optical amplifier gate 48 and the two-stage Y branch waveguide 47 are connected to each other.

In any of the devices shown in FIG. 7, active layers such as LDs, PDs and optical amplifiers having different band gap energies and a core layer of a passive optical waveguide are integrated. The method used has been proposed.

However, in the above-described device, since the waveguide region is relatively long, all the regions are collectively buried in the p-type InP burying layer 108 as shown in FIG. In such a structure, the loss of the guided light leaking into the p-type InP buried layer 108 in the waveguide region due to the absorption of light between valence bands increases, and the internal loss of the entire device increases. The light absorption loss between valence bands increases as the concentration of the p-type impurity increases.

To reduce the waveguide loss, as shown in FIG. 6B, the waveguide region 143 is an undoped InP buried layer 109 containing no impurity, and the active region 142 is a p-type InP buried layer 108. A method of separately embedding is proposed.

According to this method, although the number of times of growth increases by one, light loss in the waveguide region can be reduced.

[0023]

In a device having a structure in which the DH structure is buried by the p-type InP layer as described above, the built-in voltage of the DH junction in the active layer and the p-type InP buried layer on both sides of the active layer are reduced. Current constriction is caused by a difference from a built-in voltage of a pn junction formed by the n-type InP substrate. The current applied to the element increases and the voltage applied to the pn junction increases. At this time, if the built-in voltage of the pn junction is low, the leakage current flowing through the pn junction sharply increases, and the light output is saturated. I will. Therefore, in order to obtain a high optical output, it is important to increase the built-in voltage of the pn junction.

As a method therefor, it has been reported that increasing the carrier concentration of the p-type InP buried layer forming the pn junction is effective (Applied Physics Letters, Vol. 59, p. 22). .2
4).

Also, a method of increasing a built-in voltage is proposed in order to avoid deterioration of device characteristics due to diffusion of a p-type impurity (generally zinc) into an active layer when using a high-concentration p-type InP buried layer. It is missing.

FIG. 8 is a diagram showing an example of the configuration of a conventional semiconductor laser. FIG. 8A shows the case where the conductivity types of an InP substrate and an InP cladding layer are reversed and n added to an n-type buried layer.
FIG. 3B shows a configuration of a semiconductor laser manufactured by using a method of increasing a built-in voltage of a pn junction by setting the concentration of a type impurity to a predetermined value or more, and FIG. While p-type In
Only in the initial growth of the P buried layer, I
FIG. 3 is a diagram showing a configuration of a semiconductor laser manufactured by a method of increasing a built-in voltage by embedding with an nAl (Ga) As mixed crystal.

The InP substrate 15 shown in FIG.
1 and the conductivity type of the InP cladding layer 152 are inverted from n-type to p-type, and the concentration of an n-type impurity added to the n-type InP buried layer 155 is set to 1 × 10 ¹⁸ cm ⁻³ or more, thereby forming a pn junction. 8B, a method of increasing the built-in voltage of the InP substrates 101 and I as shown in FIG.
A method of increasing the built-in voltage by making the conductivity type of the nP buffer layer 102 n-type and burying only the initial growth of the p-type InP buried layer 108 with an InAl (Ga) As mixed crystal 110 having a large band gap. (See Japanese Patent Application No. 4-119765).

However, when the above-described structure is applied to a spot size conversion waveguide integrated LD or various optical integrated devices, a high concentration of guided light in the waveguide region is obtained.
There is a problem that the absorption loss in the waveguide region is increased because it is leached into the p-type InP substrate or the p-type InP buried layer.

Here, if only the waveguide region is buried with an undoped InP layer as shown in FIG. 6B, the above-mentioned problem can be solved, but the number of crystal growths increases and the cost is reduced. However, it cannot be said that the method of manufacturing a device which requires the above-mentioned method meets the requirement.

The present invention has been made in view of the above-mentioned problems of the prior art, and is intended to realize a high-output light-emitting element and a low-loss passive waveguide at low cost. It is an object of the present invention to provide an optical semiconductor device and a method for manufacturing the same.

[0031]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a semiconductor substrate of a first conductivity type, a semiconductor active layer formed on the first conductivity type semiconductor substrate in a mesa structure, and a semiconductor substrate. A second buried layer of a second conductivity type semiconductor and a second buried layer of a second conductivity type semiconductor formed so as to cover the mesa structure;
In an optical semiconductor device in which a conductive type semiconductor first buried layer is in contact with the first conductive type semiconductor substrate at a side portion of the mesa structure, the second conductive type semiconductor first buried layer has a carrier concentration of the second conductive type semiconductor first buried layer. The carrier concentration is higher than the carrier concentration of the second conductivity type semiconductor second buried layer.

Also, a first conductive type semiconductor substrate, a semiconductor active layer and a second conductive type semiconductor clad layer formed in a mesa structure on the first conductive type semiconductor substrate, and so as to cover the mesa structure. A second conductive type semiconductor first buried layer and a second conductive type semiconductor second buried layer formed, wherein the second conductive type semiconductor first buried layer is formed on the side of the mesa structure by the first conductive type semiconductor buried layer. In the optical semiconductor device in contact with the type semiconductor substrate, the second conductivity type semiconductor first buried layer is
The carrier concentration distribution changes stepwise, and is highest in a region in contact with the first conductivity type semiconductor substrate.

Further, the semiconductor active layer includes an active region,
A semiconductor optical waveguide region having a band gap energy larger than that of the active region is formed in a mesa shape so as to be connected to each other in a stripe direction of the semiconductor active layer.

Further, the semiconductor active layer has a thickness of:
The layer thickness in the semiconductor optical waveguide region is formed thinner than the layer thickness in the active region, and in the connection region, the thickness gradually decreases from the active region toward the semiconductor optical waveguide region. An optical semiconductor device characterized by the above-mentioned.

The carrier concentration of the first buried layer of the second conductivity type semiconductor is 1 × 10 ¹⁸ cm ⁻³ or more, and the carrier concentration of the second buried layer of the second conductivity type semiconductor is 5 × 10 ¹⁸ cm ^−3. It is characterized by being 10 ¹⁷ cm ^-3 or less.

A step of forming a pair of dielectric thin films on the first conductive type semiconductor substrate so as to sandwich the optical waveguide region; and forming at least a semiconductor active layer and a second conductive type on the optical waveguide region. Forming a semiconductor cladding layer in a mesa structure, removing the dielectric thin film in a region in contact with the mesa structure by etching, forming the mesa structure in a second conductivity type semiconductor first buried layer, a second conductivity type Embedding with a semiconductor second buried layer and a second conductivity type semiconductor contact layer; a second electrode on a surface of the second conductivity type semiconductor contact layer; and a first electrode on a back surface of the first conductivity type semiconductor substrate. And a step of forming an optical semiconductor device by sequentially performing the steps of forming the second conductive type semiconductor first buried layer. Characterized by higher than the doping concentration of the conductive type semiconductor second buried layer.

A step of forming a pair of dielectric thin films on the first conductivity type semiconductor substrate so as to sandwich the optical waveguide region; and forming at least a semiconductor active layer and a second conductivity type in the optical waveguide region. Forming a semiconductor cladding layer in a mesa structure, removing the dielectric thin film in a region in contact with the mesa structure by etching, forming the mesa structure in a second conductivity type semiconductor first buried layer, a second conductivity type Embedding with a semiconductor second buried layer and a second conductivity type semiconductor contact layer; a second electrode on a surface of the second conductivity type semiconductor contact layer; and a first electrode on a back surface of the first conductivity type semiconductor substrate. Forming an optical semiconductor device by sequentially performing the steps of: forming an optical semiconductor device by adjusting the doping concentration of the second buried layer of the second conductivity type in the initial stage of the growth. It was the highest, then is characterized by stepwise lowered.

The stripe width of the dielectric thin film is
It is characterized in that it is changed within the plane of the first conductivity type semiconductor substrate.

(Operation) The operation of the present invention will be described below.

FIG. 1 is a diagram showing the structure of the optical semiconductor device of the present invention.

As shown in FIG. 1, in the present invention, a mesa portion having a DH structure of an n-type InP cladding layer 2, an active layer 3, and a p-type InP cladding layer 4 formed on an n-type InP substrate 1 is formed. , A p-type InP first buried layer 5, a p-type InP second buried layer 6, and a p-type In
The entire region is buried by the GaAs contact layer 7, and the carrier concentration of the p-type InP first buried layer 5 is set higher than that of the p-type InP second buried layer 6.

As described above, by performing high-concentration doping only at the initial stage of burying growth, the built-in voltage of the pn junction is kept sufficiently high. On the other hand, the guided light has a low concentration of p.
Since the semiconductor layer oozes out into the type InP second buried layer 6, the loss in the waveguide region can be sufficiently suppressed. Thus, it is possible to achieve both high output of the LD and low loss of the optical waveguide by one burying growth.

Hereinafter, the characteristics of the optical semiconductor device of the present invention will be described in comparison with a conventional device.

FIGS. 2A and 2B are diagrams showing current-light output characteristics of a semiconductor laser. FIG. 2A shows characteristics of a semiconductor laser alone, and FIG. 2B shows a semiconductor laser in which a spot size conversion waveguide is integrated. FIG. 6 is a diagram showing characteristics of the present invention. In the figure,
(A) is a p-type In having a doping concentration of 1 × 10 ¹⁸ cm ^−3.
Characteristics of the semiconductor laser of the present invention having a structure in which a mesa portion composed of a DH structure including an active layer is buried by a P first buried layer and a 3 × 10 ¹⁷ cm ^-3 p-type InP second buried layer, ) Indicates a doping concentration of 1 × 10 ¹⁸ cm
The semiconductor laser characteristics having the structure mesa consisting DH structure including an active layer by the high concentration buried ^layer-3 is embedded in uniform, (c) the doping concentration 3 × 10 ¹⁷
The characteristics of a semiconductor laser having a structure in which a mesa portion having a DH structure including an active layer is uniformly buried by a low concentration buried layer of cm ⁻³ are shown.

As shown in FIG. 2A, the concentration of the p-type InP buried layer in the pn junction is high (A) and (B).
In the device of (1), the light output saturation is small, and particularly, (a)
In the device of the present invention, good characteristics are shown because the internal absorption loss is low. On the other hand, in the element (c), although the light output efficiency immediately after oscillation is high because the internal absorption loss is the lowest, the leakage current increases with the increase of the current because the built-in voltage at the pn junction is low. Will saturate.

Further, as shown in FIG. 2B, in the device in which the optical waveguide is integrated, even in the device of (b), the light output efficiency is low because the waveguide loss in the optical waveguide region is high. Therefore, the best characteristics can be obtained in the device of the present invention (a).

However, in the device structure of the present invention, the device resistance increases because most of the InP buried layer has a low concentration, and further, when current is injected, the light output efficiency decreases due to heat generation. Further, the modulation frequency band determined by the element resistance and the capacitance is also limited. However, there is no particular problem in view of the application to an access optical communication system for low-speed and short-range applications intended in the present invention.

Note that the mesa-etched DH structure is buried on both sides with p-type and n-type InP layers for current confinement, and is further buried three times in which a p-type InP layer is formed on the entire surface. In a semiconductor laser having a terrorist structure,
A method of changing the concentration of the InP buried layer in two steps has been proposed (see Japanese Patent Application No. 6-70158).

FIG. 9 is a diagram showing an example of an element structure of a conventional semiconductor laser.

In this structure, since the current confinement is performed by the pnpn thyristor configuration, in order to increase the built-in voltage, the p-type InP contacting the n-type InP buried layer is required.
It is necessary to increase the concentration of the P buried layer. for that reason,
In this conventional example, as shown in FIG.
With the nP buried layer 211 and the high-concentration p-type InP buried layer 212, the mesa portion having the DH structure of the n-type InP clad layer 202, the active layer 203 and the p-type InP clad layer 204 is buried in two stages. ing.

FIG. 9 differs from the present invention in that low concentration doping is performed first. Further, since the concentration of the p-type InP layer 214 is not set low, it is not possible to reduce the loss in the waveguide region when applied to an optical integrated device. Further, in this conventional example, the mesa portion is first buried with the low-concentration p-type InP layer 211 because there is a concern about diffusion of impurities into the active layer 203. Even if the doping is performed up to about × 10 ¹⁸ cm ⁻³ , a large characteristic deterioration is not usually observed.

[0052]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 3 is a view showing an example of the structure of a spot size conversion optical waveguide integrated semiconductor laser manufactured by using the optical semiconductor device of the present invention.
Is a perspective view, and (b) is a longitudinal sectional view in the waveguide direction.

The device according to the present embodiment is composed of an active region 42 having a length of 300 μm and a spot size conversion waveguide region 43 having a length of 300 μm. Compared with the conventional example shown in FIGS. As you can see, p-type In
Instead of the P buried layer 108, the n-type InP cladding layer 2, the active layer 3, and the p-type InP
It is characterized in that the mesa portion having the DH structure of the cladding layer 4 is buried, and the first buried p-type InP layer 5 is in contact with the n-type InP substrate 1 on the side of the mesa portion. Further, the carrier concentration of the p-type lnP first buried layer 5 is p
It is set higher than the type InP second buried layer 6. Further, similarly to the conventional example, the n-type In
P cladding layer 2, active layer 3, and p-type InP cladding layer 4
In the respective layer thicknesses, the layer thickness in the spot size conversion waveguide region 43 is smaller than the layer thickness in the active region 42, and in the connection region, the layer thickness is gradually increased from the active region 42 toward the spot size conversion waveguide region 43. Is thinner.

Hereinafter, the manufacturing method of this embodiment will be described.

FIG. 4 is a view for explaining a method of manufacturing the semiconductor laser shown in FIG.

First, the (100) -oriented n-type InP substrate 1
(Sn-doped, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) on the surface, a pair of dielectric thin film SiO ₂ masks 21 (thickness 1
00 nm) (FIG. 4A). Note that SiO ₂
The width of the mask by the mask 21 is 50 μm in the active region 42.
m, and 6 μm in the spot size conversion waveguide region 43. The width of the waveguide region 41 sandwiched between the masks is 1.5
μm.

Next, n-type InP is selected by selective MOVPE.
Cladding layer 2 (Sn-doped, carrier concentration 1 × 10 ¹⁸ c
m ⁻³ , layer thickness 50 nm) and 1.4 μm composition InGaAs
P-well (layer thickness: 7 nm) 8 layers, 1.13 μm composition InG
a quantum well active layer 3 comprising an aAsP barrier (layer thickness 10 nm) and a 1.13 μm composition InGaAsP light confinement layer (layer thickness 100 nm); and a p-type InP cladding layer 4 (Zn
Doping, carrier concentration 1 × 10 ¹⁸ cm ⁻³ , layer thickness 100 n
m) was grown (FIG. 4B).

The above-mentioned layer thickness is a value in the LD and PD regions, and is about 1/3 in the spot size conversion waveguide region 43. The emission peak wavelength of the quantum well active layer 3 measured by photoluminescence is 13 μm in the active region 42, 1.17 μm in the spot size conversion waveguide region 43, and
Sample No. 3 was sufficiently transparent to the oscillation wavelength of the LD.

Next, the mesa formed in the waveguide region 41 will be described.
SiO in contact with the structure_TwoEtch the mask 21 over a width of 3 μm.
4 (c), and then p-type InP
First buried layer 5 (Zn-doped, carrier concentration 1.5 ×
10¹⁸cm^-3, Layer thickness 0.2 μm), p-type InP second filling
Embedded layer 6 (Zn-doped, carrier concentration 3 × 10¹⁷c
m ^-3, 4 μm thick) and p-type InGaAs contact layer
7 (Zn doped, carrier concentration 1 × 10¹⁹cm^-3, Layer thickness
0.1 μm) was regrown so as to cover the mesa structure.
4 (d)).

Next, the spot size conversion waveguide region 43
The p-type InGaAs contact layer 7 is removed.
The p-side electrode 22 as the second electrode is formed only in the active region 42, and the back surface of the n-type InP substrate 1 is polished. The electrode 23 was formed and cut out to obtain an element.

In this embodiment, the carrier concentration of the p-type InP first buried layer 5 is 1.5 × 10 ¹⁸ cm ⁻³ , but the p-type InP second buried layer 6 has a layer thickness, a growth temperature, and the like. Depending on the crystal growth conditions such as the growth rate, there is a possibility that Zn diffuses into the active layer 3 during the burying growth and deteriorates the luminous efficiency. Therefore, the carrier concentration of the p-type InP first buried layer 5 may be about 7 × 10 ¹⁷ cm ⁻³ . Also in this case, by setting the carrier concentration of the p-type InP second buried layer 6 lower than that of the conventional one, it is possible to realize the improvement of the optical output characteristic by reducing the loss in the spot size conversion waveguide region 43.

Here, a more desirable p-type InP
The carrier concentration of the first buried layer 5 and the p-type InP second buried layer 6 is such that the carrier concentration of the p-type InP first buried layer 5 is 1.0 × 10 ¹⁸ cm ⁻³ or more and the p-type InP 2 The carrier concentration of the buried layer 6 is 5 × 10 ¹⁷
cm ^-3 or less.

The carrier concentration of the p-type InP first buried layer 5 is not constant but changes stepwise, and is formed so as to be highest in a region in contact with the n-type InP substrate 1. If it does, the same effect will be achieved.

(Second Embodiment) Hereinafter, as a second embodiment of the present invention, the optical semiconductor device described in the first embodiment is replaced with a bidirectional optical device shown in FIG. An example used for a communication optical integrated device will be described.

First, the (100) -oriented n-type InP substrate 1
(Sn-doped, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) LD
A primary grating was formed on the surface of the region 44, and then a pair of dielectric thin film SiO ₂ masks 21 (thickness: 100 nm) were formed. The length of the LD area 44 is 500 μm, and the monitor PD area 45 and the reception PD area 46
Are 300 μm, the radius of curvature of the curved portion of the branch waveguide 47 is 3 mm, and the branch angle is 2 ° (full width).
In the mask width, the LD region 44, the monitor PD
The area 45 and the receiving PD area 46 were 50 μm, the branch waveguide area 47 was 6 μm, and the width of the waveguide area 41 sandwiched between masks was 1.5 μm.

Next, 1.13 μm is selected by selective MOVPE.
m composition n-type InGaAsP guide layer (Sn-doped, carrier concentration 1 × 10 ¹⁸ cm ⁻³ , layer thickness 100 nm), 1.4
8 μm composition InGaAsP wells (layer thickness 7 nm),
1.13 μm composition InGaAsP barrier (layer thickness 10 n
m) and a 1.13 μm composition InGaAsP light confinement layer (layer thickness 100 nm), a p-type InP cladding layer 4 (Zn-doped, carrier concentration 1 × 1)
A DH structure consisting of 0 ¹⁸ cm ^-3 and a layer thickness of 100 nm) was grown.

The above-mentioned layer thickness is a value in the LD and PD regions, and is about 1/3 in the branch waveguide region 47. The emission peak wavelength of the quantum well active layer 3 measured by photoluminescence is 1.3 μm in the LD and PD regions.
m, and 1.17 μm in the branch waveguide region 47.

Next, the SiO ₂ mask 21 in contact with the mesa structure formed in the waveguide region 41 is removed by etching over a width of 2 μm, and thereafter, the p-type InP first buried layer 5 is formed.
(Zn-doped, carrier concentration 8 × 10 ¹⁷ cm ⁻³ , layer thickness 0.2 μm), p-type InP second buried layer 6 (Zn-doped, carrier concentration 3 × 10 ¹⁷ cm ⁻³ , layer thickness 3 μm) and p-type The InGaAs contact layer 7 (Zn-doped, carrier concentration 1 × 10 ¹⁹ cm ⁻³ , layer thickness 0.1 μm) was regrown so as to cover the mesa structure.

In the present embodiment, the reason why the carrier concentration of the p-type InP first buried layer 5 is set lower than that of the first embodiment is that the higher the carrier concentration of the pn junction is, the more the LD etc. Although the leakage current under the forward bias condition decreases, the PD used under the reverse bias condition
In this case, the diffusion current increases, and the dark current increases.

Next, the LD area 44 and the monitor PD area 45
In addition, the p-side electrode 22 was formed in the receiving PD region 46, and the n-side electrode 23 was formed after polishing the back surface of the n-type InP substrate 1 and cut out to obtain an element.

(Third Embodiment) Hereinafter, as a third embodiment of the present invention, the optical semiconductor device described in the first embodiment is replaced with a 1 × 4 optical semiconductor device shown in FIG. An example in which a gate optical amplifier integrated type matrix optical switch is used for an optical integrated device for bidirectional optical communication will be described.

First, the (100) -oriented n-type InP substrate 1
(Sn-doped, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) on the surface, a pair of dielectric thin film SiO ₂ masks 21 (thickness 1
00 nm). The optical amplifier gate region 48
Was 300 μm, the channel interval was 250 μm, the radius of curvature of the curved portion of the branch waveguide 47 was 5 mm, and the branch angle was 2 ° (full width). The mask width is 50 μm in the optical amplifier gate region 48 and the branch waveguide region 47
To 6 μm. The waveguide region 41 sandwiched between masks
Was 1 μm in width.

Next, n-type InP is selected by selective MOVPE.
Cladding layer 2 (Sn-doped, carrier concentration 1 × 10 ¹⁸ c
m ⁻³ , layer thickness 100 nm) and 1.55 μm composition InGa
AsP active layer 3 (layer thickness 300 nm) and p-type InP cladding layer 4 (Zn-doped, carrier concentration 1 × 10 ¹⁸ c
m ⁻³ , and a layer thickness of 0.3 μm).

The above layer thickness is a value in the optical amplifier gate region 48, and is approximately 1/1 in the branch waveguide region 47.
The value was 3. Further, the emission peak wavelength by photoluminescence measurement is 1.5 in the optical amplifier gate region 48.
5 μm, and 1.42 μm in the branch waveguide region 47.

Next, the SiO ₂ mask 21 in contact with the mesa structure formed in the waveguide region 41 is removed by etching over a width of 2 μm, and thereafter, the p-type InP first buried layer 5 is formed.
(Zn-doped, carrier concentration 2 × 10 ¹⁸ cm ⁻³ , layer thickness 0.2 μm) and p-type InP second buried layer 6 (Zn-doped, carrier concentration 3 × 10 ¹⁷ cm, layer thickness 2 μm),
The p-type InGaAs contact layer 7 (Zn-doped, carrier concentration 1 × 10 ¹⁹ cm ⁻³ , layer thickness 0.1 μm) was regrown so as to cover the mesa structure.

Next, the p-side electrode 22 was formed in the optical amplifier gate region 48, and after polishing the back surface of the n-type InP substrate 1, the n-side electrode 23 was formed and cut out to form an element.

In each of the above embodiments, a stepwise buried structure, which is the gist of the present invention, is employed, and a low loss in the passive waveguide region is achieved while utilizing the features of the conventional selective MOVPE technique. ing.

As is clear from the above description, the present invention is effective not only for the optical integrated device described in the above-mentioned embodiment but also for manufacturing various optical integrated devices. In the present embodiment, the carrier concentration profile of the buried layer is two-stage buried. However, the same effect can be obtained by adopting a configuration in which the carrier concentration is reduced in three or more stages or continuously.
Furthermore, the same effect can also be obtained in a device using a conventional manufacturing method by mesa etching of a DH structure and burying of InP without using selective growth, by employing the buried layer carrier concentration profile of the present invention.

[0080]

As described above, in the present invention,
Carrier concentration of the second conductive type semiconductor first buried layer and the second conductive type semiconductor second buried layer for burying a semiconductor active layer and a second conductive type semiconductor clad layer formed in a mesa structure on the first conductive type semiconductor substrate. Is the second conductivity type semiconductor
Since the second conductive type semiconductor first buried layer is configured to be higher than the buried layer, a pn junction formed by the second conductive type semiconductor first buried layer and the first conductive type semiconductor substrate is formed. The built-in voltage increases,
The guided light in the waveguide region oozes into the low-concentration second conductivity type semiconductor second buried layer, thereby realizing high output of the light emitting element and low loss of the passive waveguide at low cost. .

[Brief description of the drawings]

FIG. 1 is a diagram showing a structure of an optical semiconductor device of the present invention.

2A and 2B are diagrams showing current-light output characteristics of a semiconductor laser, wherein FIG. 2A shows characteristics of a semiconductor laser alone, and FIG. 2B shows a semiconductor in which a spot size conversion waveguide is integrated; FIG. 3 is a diagram illustrating characteristics of a laser.

3A and 3B are diagrams showing a structural example of a spot size conversion optical waveguide integrated semiconductor laser manufactured using the optical semiconductor device of the present invention, wherein FIG. 3A is a perspective view and FIG. 3B is a longitudinal section in the waveguide direction. FIG.

FIG. 4 is a diagram for explaining a method of manufacturing the semiconductor laser shown in FIG.

FIG. 5 is a diagram showing an example of a method for manufacturing a conventional spot size conversion optical waveguide integrated semiconductor laser.

6A and 6B are longitudinal sectional views in the waveguide direction of an element manufactured by the method shown in FIG. 5, and FIG. 6A shows an example in which a waveguide region and an active region are buried by the same buried layer. (B) is a diagram showing an example in which a waveguide region and an active region are buried by different buried layers.

FIGS. 7A and 7B are diagrams showing the structure of various optical integrated devices using an optical semiconductor device, wherein FIG. 7A shows an example of the structure of a transmitting and receiving optical integrated device, and FIG. It is a figure showing the structure of the 1x4 optical switch as an example of a matrix optical switch.

8A and 8B are diagrams showing a configuration example of a conventional semiconductor laser, in which FIG. 8A reverses the conductivity type of an InP substrate and an InP cladding layer, and sets the concentration of an n-type impurity added to an n-type buried layer to a predetermined value. FIG. 3B is a diagram showing a configuration of a semiconductor laser manufactured by using a method of increasing the built-in voltage of a pn junction by setting the conductivity type of the InP substrate and the InP buffer layer to n-type. InAlP (G) having a large band gap is used only in the initial growth of the InP buried layer.
a) is a diagram showing a configuration of a semiconductor laser manufactured by a method of increasing a built-in voltage by embedding with As mixed crystal.

FIG. 9 is a diagram showing an example of an element structure of a conventional semiconductor laser.

[Explanation of symbols]

Reference Signs List 1 n-type InP substrate 2 n-type InP cladding layer 3 active layer 4 p-type InP cladding layer 5 p-type InP first buried layer 6 p-type InP second buried layer 7 p-type InGaAs contact layer 21 SiO ₂ mask 22 p-side electrode 23 n-side electrode

Continuation of the front page (56) References JP-A-8-8482 (JP, A) JP-A-7-254750 (JP, A) JP-A-8-125279 (JP, A) JP-A-1-300581 (JP) JP-A-8-330676 (JP, A) JP-A-5-75205 (JP, A) JP-A-7-230067 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB (Name) H01S 3/18

Claims (8)

(57) [Claims] A first conductivity type semiconductor substrate; and a mesa structure formed on the first conductivity type semiconductor substrate.
A semiconductor active layer and a second conductive type semiconductor cladding layer; and a second conductive type semiconductor first buried layer and a second conductive type semiconductor second buried layer formed so as to cover the mesa structure. In an optical semiconductor device in which a two-conductivity-type semiconductor first buried layer is in contact with the first-conductivity-type semiconductor substrate on a side portion of the mesa structure, the second-conductivity-type semiconductor first buried layer has a carrier concentration of An optical semiconductor device, wherein the carrier concentration is higher than the carrier concentration of the second buried layer of the second conductivity type semiconductor. 2. A first conductivity type semiconductor substrate, and a mesa structure formed on the first conductivity type semiconductor substrate.
A semiconductor active layer and a second conductive type semiconductor cladding layer; and a second conductive type semiconductor first buried layer and a second conductive type semiconductor second buried layer formed so as to cover the mesa structure. In an optical semiconductor device in which a two-conductivity-type semiconductor first buried layer is in contact with the first-conductivity-type semiconductor substrate on a side portion of the mesa structure, the second-conductivity-type semiconductor first buried layer has a carrier concentration distribution, An optical semiconductor device, wherein the optical semiconductor element changes stepwise and is highest in a region in contact with the first conductivity type semiconductor substrate. 3. The optical semiconductor device according to claim 1, wherein the semiconductor active layer includes an active region and a semiconductor optical waveguide region having a band gap energy larger than that of the active region. An optical semiconductor device formed in a mesa shape so as to be connected to each other in a stripe direction of an active layer. 4. The optical semiconductor device according to claim 3, wherein the semiconductor active layer is formed such that a layer thickness in the semiconductor optical waveguide region is smaller than a layer thickness in the active region. An optical semiconductor element, wherein a thickness of the connection region is gradually reduced from the active region toward the semiconductor optical waveguide region. 5. The optical semiconductor device according to claim 1, wherein a carrier concentration of the second buried semiconductor first buried layer is 1 × 10 ¹⁸ cm ⁻³ or more, and The carrier concentration of the second buried layer of the second conductivity type semiconductor is 5 × 10 ¹⁷
An optical semiconductor device having a size of cm ^-3 or less. 6. A step of forming a pair of dielectric thin films in a stripe shape on a first conductivity type semiconductor substrate so as to sandwich an optical waveguide region, and forming at least a semiconductor active layer and a second conductivity type in the optical waveguide region. Forming a semiconductor cladding layer in a mesa structure, removing the dielectric thin film in a region in contact with the mesa structure by etching, and forming the mesa structure in a second conductivity type semiconductor first buried layer, a second
Embedding a conductive type semiconductor second burying layer and a second conductive type semiconductor contact layer, a second electrode on a surface of the second conductive type semiconductor contact layer, and a first electrode on a back surface of the first conductive type semiconductor substrate. And a step of forming an electrode in order, thereby manufacturing an optical semiconductor device, wherein the doping concentration of the second conductive type semiconductor first burying layer is set to the second conductive type semiconductor second burying. A method for manufacturing an optical semiconductor device, wherein the doping concentration is higher than the doping concentration of a layer. 7. A step of forming a pair of dielectric thin films in a stripe shape on a semiconductor substrate of a first conductivity type so as to sandwich an optical waveguide region; and forming at least a semiconductor active layer and a second conductivity type in the optical waveguide region. Forming a semiconductor cladding layer in a mesa structure, removing the dielectric thin film in a region in contact with the mesa structure by etching, and forming the mesa structure in a second conductivity type semiconductor first buried layer, a second
Embedding a conductive type semiconductor second burying layer and a second conductive type semiconductor contact layer, a second electrode on a surface of the second conductive type semiconductor contact layer, and a first electrode on a back surface of the first conductive type semiconductor substrate. And a step of forming an electrode in order, thereby manufacturing an optical semiconductor device. The method according to claim 1, wherein the doping concentration of the second buried layer of the second conductivity type semiconductor is maximized at an early stage of growth, and thereafter, A method for manufacturing an optical semiconductor device, wherein the optical semiconductor device is gradually lowered. 8. The method for manufacturing an optical semiconductor device according to claim 6, wherein a stripe width of the dielectric thin film is changed in a plane of the first conductivity type semiconductor substrate. A method for manufacturing a semiconductor device.