JP3067702B2 - Semiconductor optical integrated device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor optical integrated device used in a trunk optical fiber communication system, an access optical communication system, and the like, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Recently, optical semiconductor devices have been required to have various functions due to the progress of optical fiber communication technology and the expansion of application fields. In order to meet such demands, research and development of semiconductor optical integrated devices in which elements having various functions are monolithically integrated, instead of conventional single devices, are being actively conducted.

[0003] Examples thereof include a matrix optical switch used in a lightwave network, a bidirectional optical integrated device for an access system, a device in which a multiplexer is integrated in a multi-wavelength semiconductor laser array, and an arrayed waveguide grating type having a wavelength selection function. Multiplexer / demultiplexer. Also, a spot size conversion optical waveguide integrated semiconductor laser, which is important as a light source for an optical communication system for access systems, can be said to be a kind of optical integrated device.

[0004] Such a semiconductor optical integrated device comprises an active region, which is a gain region of a semiconductor laser or an optical amplifier, and a passive optical waveguide region, and has an active region having high quantum efficiency and a low waveguide loss. The point is how passive areas can be integrated in a simple manner.

As a method of manufacturing an element satisfying the above requirements, there is a method using a band gap energy control technique by selective growth (Japanese Patent Laid-Open No. Hei 4-303982). This method will be described with reference to the drawings. FIGS. 6A and 6B are cross-sectional views showing the structure of a semiconductor integrated device according to a conventional method.
Are cross-sectional views of an active region and a passive optical waveguide region, respectively. FIG. 7 shows the manufacturing method.

Two dielectric thin films 21 such as a silicon oxide film are formed on an n-type semiconductor substrate 1 in the form of stripes (FIGS. 7A and 7B). A region sandwiched between the two dielectric thin films 21 becomes a waveguide region 22. At this time, in the active region 23 and the passive waveguide region 24, the dielectric thin film 21
Is changed beforehand. That is, the mask width in the active region 23 is made wider.

An n-type semiconductor lower cladding layer 2 is formed on a semiconductor substrate 1 having such a mask pattern formed thereon by metal organic chemical vapor deposition (MOVPE or MOCVD).
A double hetero structure including the semiconductor active layer 3 and the p-type semiconductor upper cladding layer 4 is selectively formed in the waveguide region 22 (FIG. 7C). At this time, the active layer having a small band gap energy and the active layer have a small band gap energy due to an effect peculiar to the selective MOVPE that the composition changes in a direction in which the band gap energy of the selective growth layer decreases in a region where the mask width is wide and the layer thickness is increased. A passive waveguide layer having a larger band gap energy can be formed collectively.

Subsequently, the dielectric thin film 21 near the waveguide region is partially removed (FIG. 7D). Figure 7 shows the mask pattern
7E, the dielectric thin film 21 formed in FIG. 7B may be used as it is, or as shown in FIG. 7F, the dielectric thin film 21 is formed again so that the mask width is constant. After processing, it may be processed. Thereafter, a p-type semiconductor cladding layer 8 and a p-type semiconductor contact layer 7 are formed so as to bury the upper and side portions of the active layer 3 (FIG. 7G). Then, electrodes are formed on the front surface of the semiconductor contact layer 7 and the back surface of the substrate, and the device is formed.

Incidentally, an n-type semiconductor substrate is usually used, and in this case, the cladding layer 8 becomes p-type. Therefore, in the passive waveguide, there is a problem that the guided light leached from the active layer having weak light confinement is absorbed by the valence band transition in the cladding layer 8 and the waveguide loss is increased.

As a method of avoiding this, when embedding the active layer selectively grown, first, only the passive waveguide region is embedded with an undoped semiconductor cladding layer, and then the semiconductor cladding layer 8 and the p-type semiconductor contact layer 7 are formed. Has also been proposed (Japanese Patent Application No. 144283).

[0011]

SUMMARY OF THE INVENTION As described above, selective MOVPE
Has various advantages, such as easy manufacturing and excellent coupling characteristics between optical waveguides. However, in the selective MOVPE, in the passive waveguide region having a narrow mask width (FIG. 6B), the layer thickness of the grown layer is inevitably smaller than that of the active region, and therefore, the active layer does not play the role of the core layer. 3 tends to cause a problem that the light confinement efficiency decreases and the radiation loss increases in the curved waveguide. Therefore, a radius of curvature of about 5 mm is generally required. Therefore, in an optical integrated device having a curved waveguide, the device size is increased, the device yield from the wafer is reduced,
This causes a practically large problem such as an increase in cost.

[0012]

An optical integrated device and a method of manufacturing the same to solve the above problems are as follows.

A semiconductor optical integrated device comprising an active region and a passive waveguide region, wherein a thickness of a semiconductor active layer formed on the active region and the passive waveguide region on a first conductivity type semiconductor substrate at a time. Is thinner than the active region in the passive waveguide region, and the bandgap energy of the semiconductor active layer in the passive waveguide region is larger than the bandgap energy of the semiconductor active layer in the active region. In a semiconductor optical integrated device in which a side portion and an upper portion of the semiconductor active layer in the passive waveguide region are collectively buried by a second conductive type semiconductor cladding layer, the second conductive type semiconductor cladding layer has at least a second conductive type semiconductor cladding layer. A first cladding layer of a second conductivity type and a second cladding layer of a second conductivity type. The semiconductor optical integrated device in which the refractive index of which being higher than the refractive index of the first conductivity type semiconductor substrate and the second conductive type second Kuratsudo layer.

Assuming that band energy− (eV) = 1.24 / composition wavelength (μm), for example, when the active layer emission wavelength is 1.3 μm, the band gap energy (wavelength) and the refractive index in each region are: , Preferably about 1.3 μm each in the active region, about 3.5: about 1.05 to about passive waveguide area
About 1.15 μm, about 3.25 to about 3.4: about 1.05 to about 1.15 μm, about 3.25 to about 3.
4: About 0.92 μm and about 3.21 in the second cladding layer. These numerical values are obtained when the laser oscillation wavelength is 1.3 μm, and when the laser oscillation wavelength is 1.55 μm, the numerical values are different, but can be appropriately selected with reference to the above example. In general, it is preferable that the band gap energy difference between the active region and the passive waveguide region is about 120 meV and the refractive index difference is about 0.1.

In the above-described semiconductor optical integrated device, the band gap energy of the first cladding layer of the second conductivity type in the active region is larger than the band gap energy of the first cladding layer of the second conductivity type in the passive waveguide region. A semiconductor optical integrated device characterized by having a large size.

For example, when the emission wavelength of the active layer is 1.3 μm, the band gap energy of the first cladding layer of the second conductivity type in the active region is preferably 0.92.
１．１1.10 μm, the second in the passive waveguide region
The band gap energy of the conductivity type first cladding layer is preferably about 1.05 to 1.15.

In the semiconductor optical integrated device, the band gap energy of the second conductive type first cladding layer in the passive waveguide region is the same as the band gap energy of the semiconductor active layer in the passive waveguide region. A semiconductor optical integrated device, characterized in that:

In the above-mentioned semiconductor optical integrated device, the carrier concentration of the second conductive type first cladding layer is lower than the carrier concentration of the second conductive type second cladding layer.

For example, it is preferable that the carrier concentration of the first cladding layer of the second conductivity type is 5 × 10 ¹⁷ cm ⁻³ or less, and the carrier concentration of the second cladding layer of the second conductivity type exceeds 5 × 10 ¹⁷ cm ⁻³ .

In the above-described semiconductor optical integrated device, a groove reaching the semiconductor substrate is formed on both sides of the second conductive type first cladding layer in the passive waveguide region. .

A semiconductor optical integrated device comprising an active region and a passive waveguide region, wherein a thickness of a semiconductor active layer formed on the active region and the passive waveguide region on a first conductivity type semiconductor substrate at a time. Is smaller than the active region in the passive waveguide region, and the bandgap energy of the semiconductor active layer in the passive waveguide region is larger than the bandgap energy of the semiconductor active layer in the active region. In a semiconductor optical integrated device in which a side portion and an upper portion of an active layer are embedded with a second conductivity type semiconductor cladding layer and at least an upper portion of the passive waveguide region is independently embedded with an undoped semiconductor cladding layer, the undoped semiconductor cladding layer is At least an undoped first cladding layer and an undoped second cladding layer It consists de layer, the undoped first
A semiconductor optical integrated device, wherein the refractive index of the cladding layer is higher than the refractive indexes of the first conductivity type semiconductor substrate and the undoped second cladding layer.

The two dielectric thin films formed in stripes in the active region and the passive waveguide region on the first conductivity type semiconductor substrate are formed by dividing the stripe width in the active region into the stripe width in the passive waveguide region. Forming at least a semiconductor active layer in a region sandwiched by the dielectric thin films, and forming two dielectric thin films in a stripe shape again to form the active region and the passive conductive film. A side portion and an upper portion of the semiconductor active layer in the waveguide region are formed by a second conductive type first cladding layer having a higher refractive index than the semiconductor substrate and a second conductive type first cladding layer having a lower refractive index than the second conductive type first cladding layer. A method for manufacturing a semiconductor optical integrated device, comprising a step of burying all at once with two clad layers.

In the method of manufacturing a semiconductor optical integrated device, the stripe width of the dielectric thin film when forming the second conductive type semiconductor cladding layer is set to be smaller in the active region than in the passive waveguide region. Characterized by
A method for manufacturing a semiconductor optical integrated device.

In the method for manufacturing a semiconductor optical integrated device, the gap width of the dielectric thin film when forming the second conductive type semiconductor cladding layer is set to be wider in the active region than in the passive waveguide region. A method for manufacturing a semiconductor optical integrated device, comprising:

In the method for manufacturing a semiconductor optical integrated device, the second conductive type semiconductor contact layer formed on the second conductive type semiconductor clad layer and the second conductive type semiconductor first clad layer are used as masks. A method for manufacturing a semiconductor optical integrated device, wherein a groove is formed in the semiconductor substrate on a side portion of the second conductive type semiconductor first cladding layer by selective etching.

Two dielectric thin films formed in stripes at least in the active region on the first conductivity type semiconductor substrate are
Setting the stripe width in the active region to be wider than the stripe width in the passive waveguide region, forming at least a semiconductor active layer in a region sandwiched between the dielectric thin films, The second conductive type first clad layer having a higher refractive index than the semiconductor substrate and the second conductive type first clad layer having a lower refractive index than the semiconductor substrate so as to cover the side portions and the upper portion of the semiconductor active layer. Forming a conductive type second clad layer in the active region and the passive waveguide region collectively; and forming the active layer and the second conductive type first clad layer on the side of the active layer. A method for manufacturing a semiconductor optical integrated device, comprising a step of collectively etching a region and the passive waveguide region in a stripe shape up to the semiconductor substrate.

The two dielectric thin films formed in stripes in the active region and the passive waveguide region on the first conductivity type semiconductor substrate are formed by dividing the stripe width in the active region into the stripe width in the passive waveguide region. Forming at least a semiconductor active layer in a region sandwiched between the dielectric thin films by setting to be wider;
The dielectric thin film of the present invention is formed in a stripe shape, the upper part of the semiconductor active layer in the passive waveguide region is covered with a dielectric thin film, and only the side and the upper part of the semiconductor active layer in the active region are of the second conductivity type semiconductor. A step of covering with a cladding layer, forming only two dielectric thin films in the form of stripes only in the passive waveguide region, and covering an upper portion of the semiconductor active layer in the active region with a dielectric thin film, and forming the semiconductor in the passive waveguide region. Embedding a side portion and an upper portion of the active layer with an undoped first cladding layer having a higher refractive index than the semiconductor substrate and an undoped second cladding layer having a lower refractive index than the undoped first cladding layer. A method for manufacturing an optical integrated device.

The two dielectric thin films formed in stripes in the active region and the passive waveguide region on the first conductivity type semiconductor substrate are formed by dividing the stripe width in the active region into the stripe width in the passive waveguide region. A step of forming at least a semiconductor active layer in a region sandwiched between the dielectric thin films, and a mask width of the dielectric thin film in the active region being set to be wider so that the dielectric thin film in the passive waveguide region is formed. The pattern of the dielectric thin film is re-formed so as to be narrower than the mask width of the second conductive type first cladding layer having a higher refractive index than the semiconductor substrate and the refractive index lower than the second conductive type first cladding layer. Forming a second conductive type second cladding layer, and removing two sides of the active layer in a stripe shape only in the active region to form two dielectric thin films in a stripe shape. And a step of covering the upper part of the second conductive type second cladding layer of the passive waveguide region with a dielectric thin film and embedding only the side part and the upper part of the semiconductor active layer in the active region with the second conductive type semiconductor clad layer. A method for manufacturing a semiconductor optical integrated device, comprising:

[0029]

As one of the methods for reducing the radiation loss of the curved waveguide, a relatively thick core layer having a small difference in refractive index from the cladding is grown, and a large difference in refractive index from air is obtained without embedding both sides. A so-called high-mesa structure that enhances lateral light confinement is known. FIG. 8 shows the cross-sectional structure.

Using an InP semiconductor substrate 1, an InGaP core layer 5 having a wavelength composition of about 1.1 μm (layer thickness of about 0.5 μm).
m), an InP cladding layer 6 (layer thickness: about 1 μm) is laminated, and then etched to a depth of about 2 μm to the substrate 1 to a width of about 2 μm.
A μm waveguide is formed. According to this waveguide structure, even if the radius of curvature is reduced to about 1 mm, the radiation loss can be suppressed to a negligible level.

The gist of the present invention is to form an optical waveguide corresponding to this high-mesa structure in a passive waveguide while using a method using selective MOVPE.

FIGS. 1A and 1B show sectional structures of an active region and a passive waveguide region of an optical integrated device according to an embodiment of the present invention. First, the lower cladding layer 2, the active layer 3, and the upper cladding layer 4 are collectively grown on the semiconductor substrate 1 by selective growth in the same manner as in the conventional example.
The first cladding layer 5 (InGaP or the like), which is larger than nP, and the second cladding layer 6 (InP)
It is characterized by being embedded in layers. Therefore, in the passive waveguide region, the refractive index of the active layer 3 which is the optical waveguide layer which has been selectively grown first and the first clad layer 5 which has been grown second time can be almost the same, and the guided light mainly becomes the second clad layer 5. It is confined in the cladding layer 5. That is, the structure becomes the same as the high mesa structure in FIG. 7, and the radius of curvature can be reduced even in the curved waveguide, and the miniaturization of the semiconductor optical integrated device can be realized. As a method of forming a groove up to the InP substrate, the structure shown in FIGS. 2 and 3 can be considered. Details will be described in Examples.

When a p-type semiconductor is used for the cladding layer, the carrier concentration of the first cladding layer is set lower than the carrier concentration of the second cladding layer in order to suppress the loss due to valence band absorption mentioned in the prior art. It is desirable to do. The carrier is generally Zn (zinc is used).

The carrier concentration of an ordinary optical device is 5 × 1
It is required to be 0 ¹⁷ cm ^-3 or more, usually about 1 × 10 ¹⁸ cm ^-3 , but it is necessary to be 5 × 10 ¹⁷ cm ^-3 or less for an optical waveguide.

In the active region, the refractive index of the first cladding layer is slightly larger than that of the conventional one, but there is no such difference that the waveguide mode is affected. The pn junctions on both sides of the active layer are changed from InP homojunction to InP / InGaAs.
The junction becomes a P-junction, the built-in potential tends to decrease, and the leakage current tends to increase. However, there is no particular problem if the refractive index of the first cladding layer is not increased so much as to cause an effect. If selective growth is used in the second buried growth, the width, thickness, and refractive index of the first cladding layer in the active region and the passive waveguide region can be changed by the mask pattern.

As shown in FIGS. 2 (e) and 2 (f), the width of the buried layer is increased in the active region in order to obtain a normal buried structure, and the width of the buried layer in the passive waveguide region is reduced in horizontal light confinement. Generally, the width of the buried layer, that is, the width of the core layer, is reduced to prevent the occurrence of higher-order modes. At that time, in the passive waveguide region where the growth region width is narrow, the thickness of the first buried layer becomes thicker and the refractive index becomes higher than in the active region. Therefore, the influence of the first buried layer in the active region can be reduced.

In order to prevent the width of the first cladding layer from being increased in the second burying growth, the active layer is formed by using a mask pattern having the same opening width as that of the selective growth of the first active layer. The first clad layer and the second clad layer may be formed only on the upper part of the substrate. At this time, by processing the dielectric thin film so that the mask width in the active region is smaller than the mask width in the passive waveguide region, the thickness of the first cladding layer in the active region can be reduced. The refractive index can be made closer to the second cladding layer and the substrate. In this case, as the third growth, it is necessary to bury the p-type semiconductor cladding layer only in the active region so as to cover the active layer.

Further, as described in the prior art, a method of separately embedding the active region and the passive waveguide region after forming the active layer in order to reduce the waveguide loss in the passive waveguide region is also considered. Can be In this case, as shown in the cross-sectional view of FIG. 4, the active region is buried with a p-type InP cladding layer 8 as usual, while the passive waveguide region is buried with an undoped InGaAsP layer 5 as a first cladding layer and a second cladding layer. It may be embedded in two stages with a certain undoped InP layer 6.

[0039]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The actual device structure and manufacturing method will be described below with reference to the drawings. 1A and 1B are sectional views showing the structure of a semiconductor optical integrated device according to a first embodiment of the present invention. FIG. 1A is an active region, and FIG. 3 shows a cross-sectional structure in a wave path region.

[0040] n n-type on the type InP substrate 1 InP lower Kuratsudo layer 2 (carrier concentration 1xlO ^l8 cm ^-3), InGa
Seven AsP well layers and a multiple quantum well active layer 3 composed of an InGaAsP barrier, and a p-type InP upper cladding layer 4 (carrier concentration of 1 × 10 ¹⁸ cm ⁻³ ) are selectively formed.

The width of each of the active layers 3 is 1.5 μm.
You. The gain peak wavelength of the quantum well active layer is
Is 1.3 μm and 1.1 μm in the passive waveguide region.
1.3 μm wavelength caused by current in the active region
Is not absorbed in the passive waveguide region. This active layer 3
Buried p-type InGaAsP first cladding layer
5 (layer thickness 0.8 μm, band gap wavelength 1.05 μm
m, carrier concentration 5 × 10 ¹⁷cm^-3), And p-type In
P second cladding layer 6 (layer thickness 1 μm, carrier concentration 1xl
O¹⁸cm^-3) Are formed collectively. p-type InGa
The width of the AsP first cladding layer 5 is 8 μm in the active region.
On the other hand, in the passive waveguide region, the thickness was 4 μm. Also
In the active region, a p-type InGaAs contact layer (layer)
0.3μm thickness, carrier concentration 1x10^l9cm^-3) Is laminated
The p-side electrode 31 is formed on the surface. One side board
On the side, an n-side electrode 32 is formed on the entire surface.

Next, a method of manufacturing this structure will be described with reference to FIG. 2 (a), (c), (d), (g) and (h) are cross-sectional views in an active region or a passive waveguide region.
(B), (e), (f) is a front view showing a mask pattern. First, as shown in FIGS. 2A and 2B, n
A pair of dielectric thin films 21 such as a silicon oxide film are formed on the surface of the type InP substrate 1 in a stripe shape. Dielectric thin film 2
1, the width of the waveguide region 22 is 1.5 μm-constant,
On the other hand, the mask width of the dielectric thin film 21 is 20 in the active region 23.
μm, and 6 μm in the passive waveguide region 24. Then, as shown in FIG. 2C, the n-type InP lower cladding layer 2,
The multiple quantum well active layer 3 and the p-type InP upper cladding layer 4 were formed by selective MOVPE. Next, as shown in FIG. 2E or 2F, the dielectric thin film 21 in contact with the waveguide region 22 is partially removed, and the active region 23 has a width of 8 μm and the passive waveguide region 24 has a width of 4 μm. Opening is provided (Fig. 2
(D)) Again, by selective MOVPE, p-type InGaAs
sP first cladding layer 5, p-type InP second cladding layer 6,
Then, a p-type InGaAs contact layer 7 was formed to bury the upper and side portions of the active layer 3 (FIG. 2G).

Thus, the structure shown in FIG. 1 is formed. In order to further increase the relative refractive index difference in the lateral direction in the passive waveguide region 24, as shown in FIG. Grooves 25 reaching the InP substrate 1 may be formed on both sides of the layer 5. In this case, if a hydrochloric acid-based etchant is used, the p-type InGaAs contact layer 7 and the p-type I
Since the nGaAsP first cladding layer 5 is not etched, the InP substrate 1 can be selectively etched, and the groove 25 can be formed by a simple method without using a mask or the like.

Next, as a second embodiment, FIG. 3 shows a method of manufacturing a semiconductor optical integrated device. First, on the n-type InP substrate 1 on which the dielectric thin film 21 is formed as in the first example, the n-type I
nP lower cladding layer 2, multiple quantum well active layer 3, p-type I
An nP upper cladding layer 4 was formed by selective MOVPE (FIG. 3A). Next, the dielectric thin film 21 is removed, and the p-type InGaAsP first cladding layer 5 and the p-type InP
A cladding layer 6 and a p-type InGAs contact layer 7 were formed (FIG. 3B). Next, a resist pattern was formed on the surface, and a groove 25 reaching the substrate 1 was formed by etching (FIG. 3C).

The groove has a depth of about 2.5 μm, a width of 5 μm, and an interval of 6 μm in the active region 23 and 3 μm in the passive waveguide region 24.
m. Also according to this manufacturing method, an optical integrated device having a structure equivalent to the structure obtained by the manufacturing method of FIG. 2 can be manufactured. In this method, the width of the active layer selectively formed first may be larger than 1.5 μm, and the passive waveguide region 24 may be grown over the entire surface without forming the dielectric thin film 21. Select MOVPE even in this case
Thus, active layers having different band gap energies are collectively formed, and the active layer is also etched at the time of forming the groove to form a waveguide layer having a width of 3 μm.

Next, a third embodiment will be described with reference to FIG. n-type InP lower cladding layer 2 on n-type semiconductor substrate 1
(Carrier concentration 1xlO ^l8 cm ^-3), a multiple quantum well active layer 3 made of InGaAsP well seven layers and InGaAsP barrier, and p-type InP upper cladding layer 4 (carrier concentration 1xlO ^l8 cm ^-3) is selectively formed I have. The width of each of the active layers 3 is 1.5 μm. So as to bury the active layer 3, the active region (FIG. 4 (a)) the p-type InP cladding layer 8 (thickness 1.5 [mu] m, carrier concentration 1xlO ^l8 cm ^-3) and p-type InGaAs contact layer (layer thickness 0 0.3 μm, carrier concentration 1 × 10 ⁹ c
m ⁻³ ) in the passive waveguide region (FIG. 4B), the undoped InGaAsP first cladding layer 5 (0.8 μm thick,
A band gap wavelength of 1.05 μm) and an undoped InP second cladding layer 6 (layer thickness of 1 μm) are formed.

P-type InP cladding layer 8 in active region
Is 8 μm, whereas the width of the undoped InGaAsP first cladding layer 5 in the passive waveguide region is 4 μm.
μm. In the active region, a p-side electrode 3 is further provided on the surface.
1 is formed. On the other hand, an n-side electrode 32 is formed on the entire surface of the substrate. With such a structure, InGaAs in which guided light is confined in the passive waveguide region
Since the P first cladding layer 5 is undoped, it is possible to obtain a low-loss optical waveguide with little loss due to valence band absorption. The manufacturing method is a conventional example of Japanese Patent Application No. Hei. 1
It is almost the same as 44283, except that it is formed separately in the first and second cladding layers in the passive waveguide region.

Next, a fourth embodiment will be described with reference to FIG. First, as shown in FIGS. 5A and 5B,
On the surface of the n-type InP substrate 1, a pair of dielectric thin films 21 such as a silicon oxide film are formed in a stripe shape. The width of the waveguide region 22 sandwiched between the dielectric thin films 21 was 1.5 μm-constant, while the mask width of the dielectric thin film 21 was 50 μm in the active region 23 and 30 μm in the passive waveguide region 24. Then, as shown in FIG. 5C, an n-type InP lower cladding layer 2, a multiple quantum well active layer 3, and a p-type InP upper cladding layer 4 were formed by selective MOVPE. Next, FIG.
As shown in FIG. 7, the dielectric thin film 21 was partially etched to make the mask width in the active region 23 10 μm, while the width in the passive waveguide region 24 was kept 30 μm. Again, the p-type InGaAsP first cladding layer 5 and the p-type InP second cladding layer 6 were formed on the active layer 3 by selective MOVPE again (FIG. 5E).

In this growth, the p-type InGaAsP first cladding layer 5 is formed in the passive waveguide region 24 because the mask width in the passive waveguide region 24 is large contrary to the formation of the active layer 3.
Has a layer thickness of 0.5 μm and a band gap wavelength of 1.05 μm.
m in the active region 23, respectively.
μm and 0.97 μm. In the active region, p-type InGa
The AsP first cladding layer 5 can be regarded as substantially a p-type InP layer. Further, as shown in FIG. 5 (f), the dielectric thin film 21 is formed again to provide an opening having a width of 12 μm only in the waveguide region of the active region, while the waveguide region of the passive waveguide region 24 is formed of the dielectric thin film. Cover with 21. Then, as shown in FIG. 5 (g), the p-type InP cladding layer 8 and the p-type InG
An aAs contact layer 7 was formed, and an electrode was formed. In the passive waveguide region, as shown in FIG.
The p-type InP cladding layer 8 is not formed on the cladding layer 6.

According to this method, the first clad layer 5 can be formed on the active layer 3 using the same mask pattern as that used when the first active layer is formed. Therefore, the width of the first clad layer 5 can be reduced to about 1.5 μm. Which is effective for suppressing the lateral higher-order mode.

[0051]

As described above, by using the semiconductor optical integrated device and the method of manufacturing the same according to the present invention, the selective MOVPE
The active area and the passive waveguide area with a small radius of curvature can be integrated using the active layer formation technology by using the simple manufacturing method. Semiconductor matrix switches, multi-wavelength laser arrays, bidirectional optical integrated devices, etc. It is possible to realize the miniaturization of various semiconductor optical integrated devices.

The present invention can be applied to the case where materials other than the semiconductor materials described in the embodiments are used, as long as the gist of the present invention is utilized. It is natural that the width and the like can be changed.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing the structure of a semiconductor optical integrated device according to a first embodiment of the present invention. FIG.
FIG. 1B shows a cross-sectional structure in the passive waveguide region.

2A and 2B are a cross-sectional view and a surface view illustrating a method for manufacturing a semiconductor optical integrated device according to a first embodiment of the present invention.

FIG. 3 is a sectional view illustrating a method for manufacturing a semiconductor optical integrated device according to a second embodiment of the present invention.

FIGS. 4A and 4B are cross-sectional views showing a structure of a semiconductor optical integrated device according to a third embodiment of the present invention. FIG. 4A shows a cross-sectional structure in an active region, and FIG. 4B shows a cross-sectional structure in a passive waveguide region. .

5A and 5B are a cross-sectional view and a surface view illustrating a method for manufacturing a semiconductor optical integrated device according to a fourth embodiment of the present invention.

6A and 6B are cross-sectional views showing the structure of a conventional semiconductor optical integrated device, in which FIG. 6A shows a cross-sectional structure in an active region, and FIG. 6B shows a cross-sectional structure in a passive waveguide region.

7A and 7B are a cross-sectional view and a front view illustrating a method for manufacturing a semiconductor optical integrated device as a conventional example.

FIG. 8 is a cross-sectional view showing a structure of a semiconductor optical waveguide as a conventional example.

[Explanation of symbols]

 Reference Signs List 1 n-type semiconductor substrate 2 n-type lower cladding layer 3 active layer 4 p-type upper cladding layer 5 p-type or undoped first cladding layer 6 p-type or undoping second cladding layer 7 p-type contact layer 8 p-type cladding layer 21 dielectric Body thin film 22 Waveguide region 23 Active region 24 Passive waveguide region 25 Groove 31 P-side electrode 32 N-side electrode

Claims (13)

(57) [Claims] 1. A semiconductor optical integrated device comprising an active region and a passive waveguide region, wherein a semiconductor active layer formed on the active region and the passive waveguide region on a semiconductor substrate of a first conductivity type is formed. A layer thickness is smaller in the passive waveguide region than in the active region, and a band gap energy of the semiconductor active layer in the passive waveguide region is larger than a band gap energy of the semiconductor active layer in the active region; In a semiconductor optical integrated device in which a side portion and an upper portion of the semiconductor active layer in a region and the passive waveguide region are collectively buried by a second conductive type semiconductor clad layer, the second conductive type semiconductor clad layer is at least a first conductive type semiconductor clad layer. A second cladding layer of a second conductivity type and a second cladding layer of a second conductivity type;
A semiconductor optical integrated device, wherein the refractive index of the first conductive type cladding layer is higher than the refractive indexes of the first conductive type semiconductor substrate and the second conductive type second cladding layer. 2. The bandgap energy of the first cladding layer of the second conductivity type in the active region is larger than the bandgap energy of the first cladding layer of the second conductivity type in the passive waveguide region. The integrated semiconductor optical device according to claim 1. 3. The bandgap energy of the second conductive type first cladding layer in the passive waveguide region is the same as the bandgap energy of the semiconductor active layer in the passive waveguide region. Item 3. The semiconductor optical integrated device according to any one of Items 1 or 2. 4. The semiconductor optical integration according to claim 1, wherein the carrier concentration of the second cladding layer of the second conductivity type is lower than the carrier concentration of the second cladding layer of the second conductivity type. element. 5. The semiconductor according to claim 1, wherein a groove reaching the semiconductor substrate is formed on both sides of the second conductivity type first cladding layer in the passive waveguide region. Optical integrated device. 6. A semiconductor optical integrated device comprising an active region and a passive waveguide region, the semiconductor optical integrated device comprising: a semiconductor active layer formed on the active region and the passive waveguide region on a first conductivity type semiconductor substrate; A layer thickness is smaller in the passive waveguide region than in the active region, and a band gap energy of the semiconductor active layer in the passive waveguide region is larger than a band gap energy of the semiconductor active layer in the active region; In the semiconductor optical integrated device, a side and an upper portion of the semiconductor active layer in a region are buried independently by a second conductivity type semiconductor cladding layer, and at least an upper portion of the passive waveguide region is buried independently by an undoped semiconductor cladding layer. The semiconductor cladding layer comprises at least an undoped first cladding layer and an undoped second cladding layer. A semiconductor optical integrated device comprising a cladding layer, wherein the refractive index of the undoped first cladding layer is higher than the refractive indexes of the first conductivity type semiconductor substrate and the undoped second cladding layer. 7. The method according to claim 7, wherein the two dielectric thin films formed in a stripe shape on the active region and the passive waveguide region on the first conductivity type semiconductor substrate have a stripe width in the active region and a stripe width in the passive waveguide region. A step of forming at least a semiconductor active layer in a region sandwiched between the dielectric thin films, and forming two dielectric thin films again in a stripe shape, so that the active region and the active region are formed. A second conductive type first cladding layer having a higher refractive index than the semiconductor substrate and a second conductive type lower refractive index than the second conductive type first cladding layer are formed on a side portion and an upper portion of the semiconductor active layer in the passive waveguide region. A method for manufacturing a semiconductor optical integrated device, comprising a step of burying all at once with a mold second cladding layer. 8. The semiconductor device according to claim 7, wherein the stripe width of the dielectric thin film when forming the second conductivity type semiconductor cladding layer is set to be smaller in the active region than in the passive waveguide region. A method for manufacturing a semiconductor optical integrated device. 9. The semiconductor device according to claim 7, wherein the gap width of the dielectric thin film when forming the second conductive type semiconductor cladding layer is set to be wider in the active region than in the passive waveguide region. A method for manufacturing a semiconductor optical integrated device. 10. The second conductive type semiconductor contact layer formed on the second conductive type semiconductor clad layer and selective etching using the second conductive type semiconductor first clad layer as a mask to form the second conductive type semiconductor clad layer. 10. The method of manufacturing a semiconductor optical integrated device according to claim 7, wherein a groove is formed in the semiconductor substrate on a side of the semiconductor first cladding layer. 11. A stripe width of at least two dielectric thin films formed in at least an active region on a first conductivity type semiconductor substrate, wherein a stripe width in the active region is wider than a stripe width in the passive waveguide region. Setting so as to form at least a semiconductor active layer in a region sandwiched by the dielectric thin film, and removing the dielectric thin film,
A second conductive type first cladding layer having a higher refractive index than the semiconductor substrate and a second conductive type second cladding layer having a lower refractive index than the second conductive type first cladding layer so as to cover side portions and an upper portion of the semiconductor active layer. Forming two clad layers in the active region and the passive waveguide region at one time, and forming the active region and the passive region so as to leave the second conductive type first clad layer on the side of the active layer. A method for manufacturing a semiconductor optical integrated device, comprising: a step of performing a mesa etching in a stripe shape up to the semiconductor substrate at a time in a passive waveguide region. 12. The method according to claim 11, wherein the two dielectric thin films formed in a stripe shape in the active region and the passive waveguide region on the first conductivity type semiconductor substrate are formed such that the stripe width in the active region is the stripe width in the passive waveguide region. Forming at least a semiconductor active layer in a region sandwiched between the dielectric thin films, forming two dielectric thin films in the form of stripes only in the active regions, A step of covering the upper portion of the semiconductor active layer in the waveguide region with a dielectric thin film, and covering only the side portion and the upper portion of the semiconductor active layer in the active region with a second conductivity type semiconductor cladding layer; Forming a dielectric thin film in a stripe shape, and covering the active region above the semiconductor active layer with a dielectric thin film, and forming the semiconductor in the passive waveguide region. A step of burying a side portion and an upper portion of the active layer with an undoped first cladding layer having a higher refractive index than the semiconductor substrate and an undoped second cladding layer having a lower refractive index than the undoped first cladding layer. A method for manufacturing an integrated device. 13. The method according to claim 13, wherein the two dielectric thin films formed in stripes in the active region and the passive waveguide region on the first conductivity type semiconductor substrate have a stripe width in the active region and a stripe width in the passive waveguide region. A step of forming at least a semiconductor active layer in a region sandwiched between the dielectric thin films, wherein the mask width of the dielectric thin film in the active region is set to be larger than the dielectric width in the passive waveguide region. The pattern of the dielectric thin film is re-formed so as to be narrower than the mask width of the thin film, and the refractive index of the second conductive type first cladding layer having a higher refractive index than the semiconductor substrate and the refractive index of the second conductive type first cladding layer is higher than that of the semiconductor substrate. Forming a second cladding layer having a low second conductivity type, and forming two dielectric thin films in a stripe shape by removing both sides of the active layer in a stripe shape only in the active region. And covering the upper part of the second conductive type second cladding layer of the passive waveguide region with a dielectric thin film, and embedding only the side and upper part of the semiconductor active layer in the active region with the second conductive type semiconductor cladding layer. A method for manufacturing a semiconductor optical integrated device, comprising: