JPH09200224A - No-hit switching method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching method with which the hit of signals (the abandonment/overlap of cells) is not generated. SOLUTION: When an instruction for the switching of the act or standby of duplexes function blocks B (11 and 12) is instructed, the section of invalid cell data is replaced with switching timing cell data showing the switching instruction by a function block A (10) on the processing stage for performing switching and based on these replaced switching timing cell data, the act or standby of duplexed function blocks B is switched so that the act or standby of duplexed function blocks B can be switched by the same switching cell data from the function block A on the preceaing stage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention provides, in an ATM switch or the like, two functional blocks that perform the same processing so that normal operation can be performed even if one of them fails, without a momentary effect in a 1 + 1 redundant configuration. The present invention relates to a disconnection switching method.

[0002]

2. Description of the Related Art FIG. 4 is an explanatory diagram for explaining a switching method in a conventional 1 + 1 redundant configuration. In the figure,
10 to 13 are, for example, ATM (Asynchronou)
s Transfer Mode: Asynchronous transfer mode)
The functional blocks that perform a certain process inside the exchange include the functional block A10, the functional blocks B11 and B12,
The functional block C13 is a series of blocks.
Further, the functional blocks B11 and 12 are functional blocks that perform the same processing, and are provided with two functional blocks B (0 system / 1 system) so that normal operation can be performed even if one of them fails. is there.

Reference numeral 20 designates a clock cell replacement ES (Elas) for synchronizing clock phases in the functional blocks B11 and B12 and for synchronizing cell phases in the functional blocks.
tic Store memory: Elastic
(Store memory), 21 is a functional block B, processing A performs processing, 22 and 23 are clock cell replacements for synchronizing the clock phase in the functional block C13 and the cell phase in the functional block. ESa, ESb
, 24 are selectors for switching and outputting the data from the ESa 22 and ESb 23.

Here, ES20, ESa22 and ESb23 in the function block B (0 system) 11, the function block B (1 system) 12 and the function block C13 are high speed clocks for ATM exchanges and the like. Although it is operating, even if the clock to each functional block 11, 12, 13 is distributed from a single clock source, it is a high-speed clock, so each functional block 11, 12, 13
There is a difference in delay time until reaching 12 and 13,
Since the phases of the clocks in the functional blocks 11, 12, and 13 are not synchronized, the clocks are provided for changing the clocks in order to synchronize the phases of the clocks. Also, regarding the cell phase inside each block, it is generated independently for each block, and since the cell phase differs between each block, in order to match that cell phase to the internal phase for each block It is provided.

Then, the ES 20, ESa 22 and E
The function block B (0 system) 11 and the function block B (1 system) 1 are used to change the clock by the Sb 23.
The output signals of each ES 20 of No. 2 are signals having different phases. The output signals of ESa 22 and ESb 23 of the functional block C13 are also signals having different phases.

Further, the selector 24 has a function block B (0
System 11 and functional block B (1 system) 12
The standby state is received, and switching is performed based on the act / standby state, and the functional block B (0 system) 11
And either the data from the functional block B (1 system) 12 is output.

Further, the functional block B is monitored by the upper-level software, so that when a failure occurs, switching to another system is performed, and a difficult-to-find failure can be detected.
Even when both systems are normal, switching is performed regularly.

Here, when the act system of the functional block B is the 0 system (the 1 system is the standby system), the 0 system / 1 of the functional block B is changed when the act system of the functional block B is changed to the 1 system. Each system is instructed by the upper software, and when the functional block B receives the actuation instruction / standby instruction from the upper software, it reports the state of its own functional block to the functional block C.

Next, the switching operation of the conventional functional block B will be described. FIG. 5 is an explanatory diagram for explaining the switching operation of the conventional functional block B. First, FIG. 5 (a)
As shown in FIG.
Cells up to 0 have been sent.

Then, E of the functional block B (0 system) 11
In S20, the E
The S output is the functional block A as shown in FIG.
The data is delayed by α time with respect to the output timing from 10. Also, the functional block B (1 system) 12
In order to perform the clock switching by the ES 20, the ES output is data delayed by β time with respect to the output timing from the functional block A10, as shown in (e) of FIG.

Here, as shown in (c) of FIG. 5, the upper software is in the middle of the C4 cell of the ES output data with respect to the functional block B (0 system) 11, and in (f) of FIG. As shown in the figure, when the function block B (1 system) 12 is instructed to perform the act / standby switching in the middle of the C4 cell of the ES output data, as shown in (d) and (g) of FIG. Both of the 0/1 systems of the functional block B switch the act / standby state from the head of the C5 cell which is the cell immediately after the switching instruction.

ESa 22 of the functional block C13
Therefore, in order to perform the clock replacement, the ESa output of the ESa function block B (0) as shown in (h) of FIG.
The data is delayed by γ time with respect to the ES output of the (system) 11. Further, since the ESb 23 of the functional block C13 performs the clock replacement, the output of the ESb is the functional block B (1) as shown in (j) of FIG.
The data is delayed by δ time with respect to the ES output of the system 12).

Here, as shown in (h) and (j) of FIG. 5, comparing the ESa / ESb outputs of the functional block C13, the data delay is shifted by one cell. Similarly, the functional block C13 is the functional block B1 of the 0/1 system.
In the act / standby state of the functional block B input from 1 and 12, a delay of one cell is generated after passing through ESa / ESb.

Further, the selector 24 of the functional block C13
Is determined by the act / standby state of the functional blocks B11, 12 recognized inside the functional block C13, but one cell time of the switching timing of the functional blocks B11, 12 becomes the act state in both systems. In addition, as shown in (l) of FIG. 5, it becomes uncertain which of the 0/1 system is selected.

However, in the case where both systems are in the act state or the standby state, if the selector selection state is the same selection state as the cell before it, the selector selection becomes 0 system, and the undefined portion of the selector output data of the functional block C. Becomes a C4 cell, and in this case, the C5 cell is discarded as shown in (m) of FIG.

Further, in the case where both systems are in the act state or the standby state, if the state in which the selector selection state is changed later is validated, the selector selection becomes the 1 system, and the undefined portion of the selector output data of the functional block C13. Is C
There will be 5 cells, in which case C4 cells will be discarded.

Here, switching from the 0-system to the 1-system has been described, but in the case of switching from the 1-system to the 0-system, a C4 cell or C
Five cells are duplicated and the same data cell is output. In addition, in FIG. 5, an example is shown in which the upper software instruction is given to the switching instruction at a time in the middle of the C4 cell of the ES output data of the functional blocks B11 and B12.
The functional block B (0
If the upper software gives an instruction to both systems of the functional block B before the end of the C4 cell of the system 11), the switching timing of the functional block B of the 0/1 system is C5 cell /
After switching from the head of the C6 cell and selecting the selector of the functional block C, cell discard occurs similarly to the result of FIG.

Further, when the upper software instruction is given to the 0/1 system functional block B at different timings, the act / standby is switched from a completely different cell, and cell duplication / discarding occurs. In this description, the functional block A10 and the functional block C13 are not duplicated for simplification, but the duplicated configuration performs the same operation.

[0019]

However, in the conventional non-disruptive switching method, the upper software individually instructs the functional block B (0 system) 11 to be in the standby mode and the functional block B (1 system) 12 to be in the act mode. To function block A1
The signal transmitted from 0 to the functional block C13 via the functional blocks B11 and 12 is E of the functional block C13.
The Sa / ESb outputs have different phases, and the act / standby states reported from the functional block B (0 system) 11 and the functional block B (0 system) 12 to the functional block C13 are temporarily inconsistent. Since both systems are in an act state or both systems are in a standby state, there is a problem in that a signal interruption (cell discard / duplication) occurs when switching is performed by the selector 24. It was

[0020]

SUMMARY OF THE INVENTION A hitless switching method according to the present invention is a method in which a functional block that processes cell data of a predetermined length is duplicated, and a dual functional block group having a 1 + 1 redundant configuration is duplicated. In the method of switching the act or the standby of the functional block that has been made redundant, if there is an instruction to switch the act or the standby of the duplicated functional block,
Since the invalid cell data portion is replaced with the switching timing cell data indicating the switching instruction by the functional block in the preceding stage of switching, the act or the standby of the duplicated functional block is switched based on the replaced switching timing cell data. , Act or standby of the duplicated functional block is switched by the same switching timing cell data from the preceding functional block.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. FIG. 1 is an explanatory diagram for explaining a hitless switching method according to an embodiment of the present invention. In the figure,
Reference numeral 1 is an insertion block into which a switching timing cell (ATC) indicating the act / standby switching timing of the functional blocks B11 and 12 provided at the output stage of the functional block A10 is inserted, and other configurations are the same as those of the conventional example.

Also, as in the conventional example, each functional block 1
Since the clock phase and the cell phase at 1, 12, and 13 are not synchronized, in order to synchronize the clock phase and the cell phase inside the functional block, the ES20 is used for clock cell replacement. , ESa 22 and ESb 23 are provided, and ES 20, ESa 22 and ES
By b23, the function block B (0 system) 11 and the function block B (1 system) are used in order to switch the clock cells.
The output signals of the 12 ESs 20 are signals having different phases. The output signals of ESa 22 and ESb 23 of the functional block C13 have the same clock phase boundary and cell phase boundary, but the content data has a different phase in cell units.

The insertion block 1 of the function block A10 includes an empty cell or AT inserted from the outside of the ATM switch.
A cell in which a cell in which user data does not exist, such as an empty cell generated when switching to the clock inside the M switch, is present, is input. A switching timing cell for instructing to switch is inserted into a cell in which user data does not exist, but normally, nothing is inserted.

Further, the processing A of the functional blocks B11 and B12
In 21, the main signal (cell) output to the functional block C13
The act / standby state of its own functional block is displayed on the functional block C13 and the selector 24 of the functional block C13 displays the functional block B (0 system) 11 and the functional block B (1 system) 12
The main signal (cell) of the act system is selected by reading the act / standby state of the functional block B mapped to the main signal (cell) input from the.

Then, the functional block B1 is executed by the upper software.
In order to switch between 1 and 12, when the upper software switches between act / standby of the functional blocks B11 and 12,
For the functional block A10, the functional blocks B11, 12
Is issued.

Then, in the insertion block 1 of the function block A10, the function block B1
A switching timing cell for instructing to switch between Act 1 and Standby 1 and 12 is inserted in the main signal output to the functional blocks B11 and B12.

In the functional block B, the functional block A
The actuation / standby state is switched from the subsequent cells except the actuation timing cell input by the actuation timing cell input from, and the act / standby state is changed for the cell output to the functional block C.
Then, the selector 24 of the functional block C13 reads the act / standby state written in the cell input from the 0/1 system of the functional blocks B11 and B12 and performs switching.

Next, the switching operation of the functional block B of this embodiment will be described. FIG. 2 is an explanatory diagram for explaining the switching operation of the functional block B of this embodiment. First, as shown in FIG. 2A, the insertion block 1 of the functional block A10 includes C1 to C4, empty cells, and C5 to C9.
Up to cells have been entered.

Here, as shown in FIG. 2 (b), the higher-level software compares the functional block A1 with the functional block A1.
When the act / standby switching is instructed in the middle of the C4 cell of the input data of the insertion block 1 of 0, the insertion block 1 is displayed as the next empty space as shown in (c) of FIG. The invalid cell is rewritten to the switching timing cell (ATC) displayed as the 1-system act and is output to the functional blocks B11 and B12.

Then, E of the functional block B (0 system) 11
In S20, the E
The S output is the functional block A as shown in FIG.
The data is delayed by α time with respect to the output timing from 10. Also, the functional block B (1 system) 12
In order to perform the clock replacement by the ES 20, the ES output is data delayed by β time with respect to the output timing from the functional block A10, as shown in (f) of FIG.

Further, in the functional blocks B11 and B12, when the ATC displayed as the 1-system act is received, the act / standby state is switched from the head of the C5 cell which is the next cell.

Then, ESa 22 of the functional block C13
Therefore, in order to perform the clock replacement, the ESa output of the ESa function block B (0) as shown in (h) of FIG.
The data is delayed by γ time with respect to the ES output of the (system) 11. Further, the ESb 23 of the functional block C13 performs clock replacement, so that the output of the ESb is the functional block B (1) as shown in (j) of FIG.
The data is delayed by δ time with respect to the ES output of the system 12).

Here, as shown in (h) and (j) of FIG. 2, comparing the ESa / ESb outputs of the functional block C13, the data delay is shifted by one cell. Similarly, the functional block C13 is the functional block B1 of the 0/1 system.
In the act / standby state of the functional block B input from 1 and 12, a delay of one cell is generated after passing through ESa / ESb.

Further, the selector 24 of the functional block C13
Is determined by the act / standby state of the functional blocks B11 and 12 recognized in the functional block C13, but one cell time of the switching timing of the functional blocks B11 and 12 is in the act state in both systems. As shown in (l) of 2, when both systems are in the act state or the standby state, if the state that changes the selector selection state later is validated, the selector selection at the act timing of both systems becomes 1 system. , ATC cells are only discarded, and valid cells C1 to C9 are not discarded.

In this embodiment, switching from the 0-system to the 1-system has been described, but in the case of switching from the 1-system to the 0-system, the ATC
Although the cells will be duplicated, since they are originally empty cells and are discarded or ignored in the functional block C,
This is not a problem and does not affect the effective cells C1 to C9.

In this embodiment, the host software gives an instruction to the functional block A10 to switch from the insertion block 1 of the functional block A10 to the functional blocks B11 and B12 of both systems using an act / standby switching signal (cell). Since the instruction is given, it is possible to switch between act / standby from the same signal (cell), and the cell in which duplication / discarding occurs is only the switching timing cell, and it is possible to eliminate the discarding / duplication of necessary cells. Become.

Embodiment 2. In this embodiment, the insertion block 1 periodically inserts a switching timing cell for instructing the timing at which the act / standby of the functional blocks B11, 12 can be switched, and the upper software is act / standby of the functional blocks B11, 12. Function block B for both systems of function block B
Switching instruction is performed, and other configurations are the same as in the first embodiment.

Next, the switching operation of the functional block B of this embodiment will be described. FIG. 3 is an explanatory diagram for explaining the switching operation of the functional block B of this embodiment. First, in the insertion block 1 of the functional block A10, C1 to
C4, an empty cell, and cells C5 to C9 are input, and in the insertion block 1, when an empty cell is detected after a lapse of a certain period of time after transmitting the previous switching timing cell, the empty cell is switched to the switching timing cell. To output a cell as shown in FIG. 3 (a).

Then, E of the functional block B (0 system) 11
In S20, the E
The S output is, as shown in FIG.
The data is delayed by α time with respect to the output timing from 10. Also, the functional block B (1 system) 12
In order to perform the clock replacement by the ES 20, the ES output is data delayed by β time with respect to the output timing from the functional block A10, as shown in (e) of FIG.

Here, the upper software is (c) of FIG.
As shown in (f), in the middle of the C3 cell of the ES output data for the functional block B (0 system) 11, the middle of the C3 cell of the ES output data for the functional block B (1 system) 12 When the act / standby switching is instructed at time, as shown in (d) and (g) of FIG. 3, both the functional block B (0 system) 11 and the functional block (1 system) 12 are from the upper software. The act / standby state is switched from the beginning of the C5 cell, which is the cell next to the ATC cell after the switching instruction.

Then, ESa 22 of the functional block C13
Therefore, in order to perform the clock replacement, the ESa output of the functional block B (0
The data is delayed by γ time with respect to the ES output of the (system) 11. Further, since the ESb 23 of the functional block C13 performs the clock replacement, the output of the ESb is the functional block B (1) as shown in (j) of FIG.
The data is delayed by δ time with respect to the ES output of the system 12).

Here, as shown in (h) and (j) of FIG. 3, comparing the ESa / ESb outputs of the functional block C13, the data delay is shifted by one cell. Similarly, the functional block C13 is the functional block B1 of the 0/1 system.
In the act / standby state of the functional block B input from 1 and 12, a delay of one cell is generated after passing through ESa / ESb.

Further, the selector 24 of the functional block C13
Is determined by the act / standby state of the functional blocks B11 and 12 recognized in the functional block C13, but one cell time of the switching timing of the functional blocks B11 and 12 is in the act state in both systems. As shown in (l) of 3, when both systems are in the act state or the standby state, if the state in which the selector selection state is changed later is valid, the selector selection at the act timing of both systems becomes 1 system. , ATC cells are only discarded, and valid cells C1 to C9 are not discarded.

In this embodiment, switching from the 0-system to the 1-system has been described, but in the case of switching from the 1-system to the 0-system, the ATC
Although the cells will be duplicated, since they are originally empty cells and are discarded or ignored in the functional block C,
This is not a problem and does not affect the effective cells C1 to C9.

In this embodiment, the insertion block 1 periodically inserts a switching timing cell for instructing the timing at which the function blocks B11, 12 can be switched between act / standby. Since the act / standby state is switched from the beginning of the cell next to the switch timing cell after the switch instruction from, the act / standby can be switched from the same signal (cell), and duplication / discarding occurs. Only the switching timing cell is used as the cell, and it becomes possible to eliminate the discarding / duplication of necessary cells.

In the first and second embodiments, in order to insert the switching timing cell, the empty cell is discarded and the switching timing cell is inserted at that location. However, the cell storage circuit is used to replace the cell at an arbitrary location. The output timing may be shifted, and the switching timing cell may be inserted without discarding other cells.

In the first and second embodiments, the empty cells are discarded and the switching timing cells are inserted. However, a signal line synchronized with the cell data may be added as a separate line from the cell data. .

Further, in the first and second embodiments, the switching timing cell is one cell, but the switching timing cell may be one switching timing cell by a plurality of continuous cells, and in this case, it is duplicated. It can be applied to a functional block having a large difference in propagation delay time between the functional blocks.

In the first and second embodiments, an example in which the present invention is applied to an ATM switch is shown. However, if the switching timing cell is an invalid data portion of an arbitrary frame, STM (Synch)
It can also be applied to a switch of a transfer mode (ronous Transfer Mode).

[0050]

As described above, according to the present invention, the act or the standby of the duplicated functional block is switched by the same switching timing cell data from the preceding functional block. The cells in which discarding occurs are only the switching timing cells, and it is possible to eliminate the discarding or duplication of necessary cells.

[Brief description of drawings]

FIG. 1 is an explanatory diagram illustrating a hitless switching method according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram illustrating a switching operation of a functional block B according to the first embodiment.

FIG. 3 is an explanatory diagram illustrating a switching operation of a functional block B according to the second embodiment.

FIG. 4 is an explanatory diagram for explaining a switching method in a conventional 1 + 1 redundant configuration.

FIG. 5 is an explanatory diagram for explaining a switching operation of a conventional functional block B.

[Explanation of symbols]

 1 Insertion Block 10 Functional Block A 11 Functional Block B (0 Series) 12 Functional Block B (1 Series) 13 Functional Block C 20, 22, 23 Elastic Store Memory 24 Selector

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Yasushi Takagi, 3-19-2 Nishishinjuku, Shinjuku-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Masahiko Takaya, 3-19-2 Nishishinjuku, Shinjuku-ku, Tokyo No. within Nippon Telegraph and Telephone Corporation

Claims (6)

[Claims] 1. A method for switching between act or standby of a duplicated functional block in a series of functional block groups in which a functional block that processes cell data of a predetermined length is duplicated and has a 1 + 1 redundant configuration, When there is an instruction to switch between the act or the standby of the duplicated functional block, the switching timing cell data indicating the switching instruction is inserted by the functional block in the previous stage for switching, and based on the inserted switching timing cell data. A method of switching without interruption, characterized in that the act or standby of the duplicated function block is switched. 2. A method of switching the act or standby of the duplicated functional block in a series of functional block groups in which a functional block that processes cell data of a predetermined length is duplicated and has a 1 + 1 redundancy configuration, A switching timing cell data indicating a timing at which switching is possible at predetermined time intervals is inserted by the functional block in the preceding stage of switching, and when the instruction to switch the act or the standby of the duplicated functional block is given, the insertion is made. A non-instantaneous interruption switching method characterized by switching act or standby of the duplicated functional block with the switching timing cell data as a trigger. 3. A method for switching between act and standby of the duplicated functional block in a series of functional block groups in which a functional block for processing cell data of a predetermined length is duplicated to form a 1 + 1 redundant configuration, When there is an instruction to switch between the act or the standby of the duplicated functional block, the invalid cell data portion is replaced by the switching timing cell data indicating the switching instruction by the functional block in the preceding stage for switching, and the replaced switching timing cell A non-instantaneous interruption switching method, characterized in that the act or the standby of the duplicated functional block is switched based on data. 4. A method of switching the act or standby of the duplicated functional block in a series of functional block groups in which a functional block that processes cell data of a predetermined length is duplicated and has a 1 + 1 redundancy configuration, When there is an instruction to switch the act or standby of the duplicated function block by replacing the invalid cell data portion for each predetermined time with the switch timing cell data indicating the switchable timing by the function block in the preceding stage for performing the switching. A non-instantaneous interruption switching method, characterized in that the act or the standby of the duplicated functional block is switched in response to the replaced switching timing cell data. 5. A method for switching between act and standby of the duplicated functional block in a series of functional block groups in which a functional block that processes cell data of a predetermined length is duplicated to form a 1 + 1 redundant configuration, When there is an instruction to switch between the act and the standby of the duplicated function block, a signal indicating the switch instruction is output in synchronization with the cell data by the function block in the preceding stage for switching, and the output switch instruction is output. A non-instantaneous interruption switching method, characterized in that the act or the standby of the duplicated functional block is switched based on a signal shown. 6. A method of switching the act or standby of the duplicated functional block in a series of functional block groups in which a functional block for processing cell data of a predetermined length is duplicated to form a 1 + 1 redundant configuration, When there is an instruction to switch the act or standby of the duplicated function block by outputting a signal indicating a switchable timing at predetermined time intervals in synchronization with the cell data by the function block in the preceding stage that performs the switching, A non-instantaneous interruption switching method, characterized in that the act or standby of the duplicated functional block is switched in response to an output signal indicating a switchable timing.