JPH0919065A - Circuit for synchronization changeover of inverter - Google Patents

Abstract

PURPOSE: To improve the response characteristic of control by controlling a lateral current flowing between an inverter and commercial power supply during the synchronization changeover therebetween. CONSTITUTION: An output current of an inverter 1 and an output current of a commercial power supply 4b are respectively detected by current detectors 711, 712 to detect deviation, namely, a lateral current between these currents with an adder/subtracter 851. This lateral current is defined as the signal controlled by a virtual impedance circuit 241 for limiting lateral current. For the synchronization changeover, the switch 341 is turned on when the parallel operation starts and an output voltage of inverter is controlled depending on the signal of which cross current is controlled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous switching circuit between an inverter and another AC power source.

[0002]

2. Description of the Related Art FIG. 25 is a block connection diagram in which a conventional inverter / commercial power source switching circuit disclosed in Japanese Patent Publication No. 7-4052 is rewritten in the same format as that of the present invention. Is an inverter main circuit, 2 and 3 are reactors and capacitors forming an AC filter, 4a is a DC power supply, 4b is a commercial power supply, 5 is a load, and 6a is an inverter power supply switch comprising a breaker.

Reference numeral 6b is a switch for supplying power to a commercial power source, which is composed of a circuit breaker, 701 is a voltage detector for detecting the inverter output voltage VC, 702 is a voltage detector for detecting the commercial voltage VS, and 712 is a commercial current IS. Current detector, 22
2 is the inverter output voltage VC detected by the voltage detector 701 and the commercial voltage VS detected by the voltage detector 702.
And a phase comparison unit 293 which outputs a deviation signal corresponding to the phase difference between the commercial voltage Vs detected by the voltage detector 702 and the commercial current Is detected by the current detector 712. 4b is a power calculator for obtaining active power P and reactive power Q of 4b.

Reference numeral 291 is an active power control amplifier, 292 is a reactive power control amplifier, 221 is an output frequency setter, 223.
Is a voltage controlled oscillator that outputs a pulse having a frequency corresponding to the input voltage, 296 is an output voltage setter, 232 is a voltage controlled amplifier, and 200 is based on the output signals of the voltage controlled oscillator 223 and the voltage controlled amplifier 232. Inverter control unit for controlling inverter frequency and inverter output voltage, 821, 891, 832, 892, 893, 894
Is an adder / subtractor.

Reference numeral 321 is a switch which is turned on in the synchronous control mode, 391 and 392 are switches which are turned on in the parallel control mode, and 294 outputs a signal when the commercial current IS detected by the current detector 712 becomes less than a set value. A comparator 295 is a switch 321, which is turned on in the synchronous and parallel control modes in synchronization with the opening and closing of the power supply switches 6a and 6b.
A switching control unit that controls 391 and 392.

Next, the operation will be described. Now, assuming that a commercial power supply power supply command is input to the switching control unit 295, the commercial power supply power supply switch 6b is turned on, the inverter power supply switch 6a is turned off, and the load 5 is supplied with the commercial power supply 4b. Power is being supplied from. At this time, the switch 321 is on, the switches 391 and 392 are off, and the inverter 1 is in the synchronous control mode. Here, the loop of the phase comparison unit 222, the adder / subtractor 821, and the voltage controlled oscillator 223 is a phase locked loop (PLL).
Having the function of a circuit, this PLL circuit operates so as to match the frequency and phase of the output with respect to the input.

Therefore, in the synchronous control mode, the phase difference between the inverter output voltage VC detected by the voltage detectors 701 and 702 and the commercial voltage VS is obtained by the phase comparison unit 222, and the phase difference signal and the output frequency setting unit are obtained. The deviation from the frequency setting signal from 221 is obtained by the adder / subtractor 821, and a pulse having a frequency corresponding to the output signal of the adder / subtractor 821 is output from the voltage controlled oscillator 223. Therefore, the voltage controlled oscillator 223 is adjusted in advance by the output frequency setting unit 221 so that the control characteristic becomes the best so that the frequency when the output of the phase comparison unit 222 is 0V matches the input frequency.

Therefore, a signal from the voltage controlled oscillator 223 that automatically follows the frequency-phase is supplied to the inverter controller 20.
0, and the output frequency of the inverter 1 is the commercial power supply 4
It is controlled so as to match the frequency-phase of b. Further, the deviation between the inverter output voltage Vc detected by the voltage detector 701 and the output voltage setter 296 is added / subtracted by the adder / subtractor 832.
The voltage signal corresponding to the deviation signal is output from the voltage control amplifier 232, and based on the voltage control oscillator 223 and the voltage control amplifier 232.
The frequency and the output voltage of the inverter 1 are controlled by the inverter 1, so that the inverter 1 outputs the rated voltage in synchronization with the commercial power supply 4b.

Next, when the inverter power supply command is input to the switching control unit 295, the power supply switch 6b for the commercial power supply is supplied.
Is turned on, the power supply switch 6a of the inverter is turned on, and the commercial power supply 4b and the inverter 1 are operated in parallel.
At the same time, the switch 32 is operated by the operation of the switching control unit 295.
1 is turned off and the switches 391 and 392 are turned on, whereby the output from the phase comparator 222 is ignored and the synchronous control mode is switched to the parallel control mode.

In the parallel control mode, the active power P of the commercial power source 4b and the reactive power Q obtained by the power calculator 293 are output, and the active power P and the reactive power Q are respectively added and subtracted by adders / subtractors 893 and 894. Find the deviation from 0V,
Each deviation is amplified and output by the active power control amplifier 291 and the reactive power control amplifier 292. The output of the active power control amplifier 291 is added to the output signal of the output frequency setting unit 221 by the adder / subtractor 891.
The frequency of the inverter 1 is controlled so that the active power borne by the commercial power source 4b becomes zero based on the output of the above.

The output of the reactive power control amplifier 292 is added to the output signal of the output voltage setting unit 296 by the adder / subtractor 892, and based on the output of the adder / subtractor 892,
The output voltage of the inverter 1 is controlled so that the reactive power borne by the commercial power source 4b side becomes zero. As a result, the frequency and output voltage of the inverter 1 gradually increase, and the active power and reactive power of the load are transferred to the inverter, and in response to this, the active power and reactive power borne by the commercial power supply 4b side are reduced. It gradually becomes smaller and finally becomes zero.

As described above, the load sharing of the commercial power source 4b is reduced, and the commercial current I detected by the current detector 712 is detected.
When S becomes equal to or less than the set value, a predetermined signal is output from the comparator 294, which turns off the power supply switch 6b of the commercial power source, turns on the switch 321 and turns off the switches 391 and 392 to perform parallel control. The mode is switched to the original synchronous control mode, and the inverter 1 performs the normal operation in the synchronous control mode.

[0013]

Since the conventional inverter / commercial power supply switching circuit is configured as described above, the inverter / commercial power supply is controlled by controlling the phase of the internally generated voltage of the inverter and the average value of the voltage. It is difficult to improve the response speed of the control because the cross current is controlled, and especially the instantaneous cross current cannot be controlled.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a synchronous switching circuit for an inverter that performs synchronous switching while suppressing cross current.

[0015]

[Means for Solving the Problems]

(1) The synchronous switching circuit of the inverter according to the present invention has an instantaneous voltage control circuit that controls the instantaneous value of the output voltage by switching the arms of each phase forming the inverter a plurality of times during one cycle. In a synchronous switching circuit of an inverter that performs load switching synchronously between a control type inverter and another AC power source, a cross current suppressing unit that suppresses a cross current flowing between the inverter and another AC power source is provided, The amount of cross current is suppressed and synchronous switching is performed.

(2) Further, the cross current suppressing means is a means provided with a detecting means for detecting a cross current flowing between the inverter and another AC power source, and a suppressing means suppressing the detected cross current. The output voltage of the inverter is controlled according to the signal from the means.

(3) Further, voltage matching means for matching the output voltage of the inverter with the output voltage of another AC power source is provided,
The output voltage of the inverter is matched with the output voltage of the other AC power source to perform synchronous switching.

(4) Further, the voltage matching means controls the output voltage of the inverter according to the average value of the output voltages of the other AC power supplies, and matches the output voltage of the inverter with the output voltage of the other AC power supply. It is a means.

(5) Further, the voltage matching means controls the output voltage of the inverter according to the deviation between the output voltage of the other AC power supply and the output voltage of the inverter, and the inverter matches the output voltage of the other AC power supply. It is a means to match the output voltage of the.

(6) Further, the voltage matching means derives a deviation between the average value of the output voltage of the inverter and the average value of the output voltage of the other AC power source, changes the deviation according to time, and changes the deviation. The output voltage of the inverter is controlled according to the deviation, and the output voltage of the inverter is gradually made to match the output voltage of the other AC power supply according to the time.

(7) Further, the cross current suppressing means detects the load current of the power supply on the load supply side among the inverter and the other AC power supply as a cross current component, and at the same time, detects the load current from the power supply on the load supply side in parallel operation. This means is provided with a cross current adjusting unit that adjusts the cross current so as to transfer the load to the load supply side power source, and a suppressing unit that suppresses the adjusted cross current.

(8) Further, the cross current suppressing means is provided with a detecting means for detecting the output current of the inverter as a cross current and a suppressing means for suppressing the detected cross current.

(9) Further, the suppressing means is a means for suppressing the input cross current component and varying the suppression amount according to the time in the parallel operation state, and the output of the inverter according to the variable cross current component. By controlling the voltage, the load is transferred to perform synchronous switching.

(10) Further, a limiter for limiting the magnitude of the signal from the suppressing means is provided, and the voltage of the inverter is controlled according to the output from the limiter.

(11) Further, an alarm means for sending an alarm signal when the limiter limit value is exceeded is provided.

(12) Further, the instantaneous voltage control circuit is a circuit added with a minor loop for controlling the instantaneous value of the output current of the inverter before passing through the AC filter, and derives the current to be passed through the capacitor of the AC filter. A means for controlling the inverter as a command signal is provided.

(13) In addition, a first component caused by the phase difference between the cross current inverter and the other AC power source, and a second component caused by the voltage difference between the cross current inverter and the other AC power source. The output voltage of the inverter is controlled in accordance with the detection signal during parallel operation so as to perform synchronous switching.

(14) Further, when a command generating means for commanding to arbitrarily adjust the output current of the inverter is provided and the output of the inverter is switched so as to be regenerated to another AC power source, the inverter generates a signal according to the above command signal. The output current is controlled.

(15) Further, the command generating means is a means for arbitrarily changing the detected regenerative current to generate a command signal.

(16) Further, the command generation circuit is a circuit which generates a sine wave function or a non-linear function of an arbitrary phase to generate a command signal.

(17) Further, when the cross current suppressing means derives the cross current component by using at least the output current of the inverter, a simulation signal generating means for generating a signal simulating the inverter output current is provided, and the inverter output current Instead, the above pseudo signal is used to detect the cross current.

(18) Further, the simulated signal generating means is means for deriving the output current of the inverter from the output current of the inverter before passing through the AC filter and the capacitor current of the AC filter.

(19) Further, the simulated signal generating means generates a signal corresponding to the capacity of this capacitor as a simulated capacitor current in phase with the current of the capacitor of the AC filter, and this simulated capacitor current and the current before passing through the AC filter. This is a means for deriving the output current of the inverter from the output current of the inverter.

(20) Further, the simulated signal generating means derives the simulated capacitor current according to the differential value of the output voltage of the inverter, and the simulated capacitor current and the output current of the inverter before passing through the AC filter are used to output the inverter output current. Is a means for deriving.

[0035]

[Action]

(1) The synchronous switching circuit of the inverter according to the present invention suppresses the cross current by suppressing the cross current and performs the synchronous switching by suppressing the cross current flowing between the inverter and another AC power supply.

(2) In the cross current suppressing means, the detecting means detects the cross current flowing between the inverter and the other AC power source, suppresses the cross current detected by the suppressing means, and responds to the suppressed cross current. Control the output voltage of the inverter.

(3) Further, the voltage matching means matches the output voltage of the inverter with the output voltage of another AC power source to perform synchronous switching.

(4) Further, the voltage matching means controls the output voltage of the inverter according to the average value of the output voltages of the other AC power supplies, and matches the output voltage of the inverter with the output voltage of the other AC power supply. .

(5) Further, the voltage matching means controls the output voltage of the inverter according to the deviation between the output voltage of the other AC power supply and the output voltage of the inverter, and the inverter matches the output voltage of the other AC power supply. Match the output voltage of.

(6) Further, the voltage matching means derives a deviation between the average value of the output voltage of the inverter and the average value of the output voltage of the other AC power source, and changes the deviation according to time. The output voltage of the inverter is controlled according to the deviation to gradually match the output voltage of the inverter with the output voltage of the other AC power source according to the time.

(7) Further, the cross current suppressing means detects the load current of the power supply on the load supply side among the inverter and the other AC power supply as a cross current component, and also detects the load current from the power supply on the load supply side in parallel operation. The cross current is adjusted so that the load is transferred to the load supply side power supply, and the control means suppresses the adjusted cross current.

(8) Further, the cross current suppressing means detects the output current of the inverter as a cross current, and suppresses the cross current detected by the suppressing means.

(9) Further, the suppressing means is a means for suppressing the input cross current component and varying the suppression amount according to time in the parallel operation state, and the output voltage of the inverter according to the variable cross current component. Control is performed to shift the load and perform synchronous switching.

(10) Further, the limiter limits the magnitude of the signal from the suppressing means, and the voltage of the inverter is controlled according to the output from the limiter.

(11) Further, the alarm means sends out an alarm signal when the limiter limit value is exceeded.

(12) Further, the instantaneous voltage control circuit is a circuit added with a minor loop for controlling the instantaneous value of the output current of the inverter before passing through the AC filter, and derives the current to be passed through the capacitor of the AC filter. It is controlled by means of controlling the inverter as a command signal.

(13) In the detecting means, the first component is caused by the phase difference between the cross current inverter and the other AC power source, and the voltage difference between the cross current inverter and the other AC power source. The second component is detected, the output voltage of the inverter is controlled according to the detection signal during parallel operation, and synchronous switching is performed.

(14) Further, when the output of the inverter is switched to be regenerated to another AC power source, the command generating means generates a command signal for arbitrarily adjusting the output current of the inverter, and in response to this command signal. Controls the output current of the inverter.

(15) Further, the command generating means generates a command signal in which the detected regenerative current is arbitrarily changed.

(16) Further, the command generating circuit generates a command signal which has generated a sine wave function or a non-linear function of an arbitrary phase.

(17) When the cross current suppressing unit derives the cross current component using at least the output current of the inverter, the simulation signal generating unit generates a signal simulating the inverter output current, and instead of the inverter output current. The cross current component is detected using this pseudo signal.

(18) Further, the simulated signal generating means derives the output current of the inverter from the output current of the inverter before passing through the AC filter and the capacitor current of the AC filter.

(19) Further, the simulated signal generating means generates a signal in phase with the current of the capacitor of the AC filter in accordance with the capacity of this capacitor as a simulated capacitor current, and this simulated capacitor current and that before passing through the AC filter are generated. The output current of the inverter is derived from the output current of the inverter.

(20) Further, the simulated signal generating means derives the simulated capacitor current according to the differential value of the output voltage of the inverter, and based on this simulated capacitor current and the output current of the inverter before passing through the AC filter, the output current of the inverter. Derive.

[0055]

【Example】

Embodiment 1 FIG. FIG. 1 shows an embodiment of the present invention. In the figure, the functions corresponding to those in FIG. 25 described above are denoted by the same reference numerals, and detailed description thereof will be omitted. In the figure, reference numeral 1 denotes a main circuit of an inverter, for example, a single-phase or three-phase full-bridge inverter shown in FIGS. 2 (a) and 2 (b) that is PWM-modulated with a triangular wave carrier of several KHz or more. Is an example.

Reference numeral 211 denotes a counter for outputting the phase φ from the output of the voltage controlled oscillator 223 which is the output of the PLL, 212
Is a sine wave sin from the phase φ output from the counter 211.
A function generator that outputs φ, 231 is an output voltage amplitude command generator, 201 is an instantaneous voltage control amplifier, 202 is a PWM modulation circuit, 241 is a cross current limiting virtual impedance circuit having a transfer function Z, and 421 is a parallel control mode. A track / hold circuit that switches the input signal from the track mode to the hold mode. The track mode is a mode that follows the input signal, and the hold mode is a mode that holds the input signal immediately before switching to the hold mode. 341 is a switch that is turned on in the parallel control mode,
Reference numeral 711 is a current detector for detecting the inverter output current IT, 801, 841 and 851 are adder / subtractors, and 911 is a multiplier.

Next, the operation of the above embodiment will be described with reference to FIG. Now, assuming that an inverter power supply command is input to the switching control unit 295, the power supply switch 6b of the commercial power supply is turned off, the power supply switch 6a of the inverter is turned on, and power is supplied from the inverter 1 to the load 5. Has been done. At this time, the track / hold circuit 421 is in the track mode and outputs the input signal as it is, the switch 341 is turned off, and the inverter 1 is operating in the synchronous control mode.

At this time, the output of the output voltage amplitude command generator 231 and the output of the function generator 212 that outputs the sine wave sin φ are multiplied by the multiplier 911 to obtain the sine wave voltage command VC *. It will be described later that the inverter output voltage command VC1 *, which is the voltage command of the inverter output voltage VC, is obtained from the output of the adder / subtractor 841. This inverter output voltage command V
C1 * and the inverter output voltage VC detected by the voltage detector 701 are matched so that the instantaneous voltage control amplifier 201 and P
The WM modulation circuit 202 and the WM modulation circuit 202 control the switching of the inverter 1 and form a voltage control loop to instantaneously control the output voltage.

A feature of this control means is that such control is performed each time the high frequency of the inverter is switched, so that the response is very fast. For example, when a switching frequency of 10 kHz is used, control is performed every 100 μsec. Therefore, a transient phenomenon with respect to a disturbance such as a sudden change in load is completed within several times of about 100 μsec, and excellent control performance can be obtained.

Next, when a commercial power supply command is input to the switching control unit 295, the commercial power supply switch 6b is turned on while the inverter power supply switch 6a is turned on, and the commercial power supply 4b and the inverter 1 are connected. Are operated in parallel. In this case, if the voltage difference between the inverter 1 and the commercial power supply 4b is 1% and the wiring impedance between the inverter 1 and the commercial power supply 4b is 1% or less, the inverter 1 controls the output voltage by the instantaneous voltage control. Therefore, 100% or more of the cross current flows instantaneously.

The present invention suppresses the cross current by configuring the control circuit so that the impedance exists only for the cross current flowing between the commercial power source and the inverter as follows.

According to the commercial power supply command, the power supply switch 6a,
At the same time as the operation of 6b, the switch 341 is turned on by the action of the switching control unit 295, and the phase comparison unit 222 is operated.
The track / hold circuit 421 switches from the track mode to the hold mode so that the correction amount for synchronizing the inverter 1 as the output of the commercial power supply 4b with the commercial power supply 4b is held at the same time as the commercial power supply command so that the synchronization is not immediately lost. , The synchronous control mode is switched to the parallel control mode.

In this parallel control mode, the commercial power source 4
The cross current dI between b and the inverter 1 is the current detector 71
It is obtained by subtracting the inverter output current IT detected by 1 and the commercial current IS detected by the current detector 712 by the adder / subtractor 851.

Virtual impedance circuit 241 for limiting cross current
Calculates dI × Z (dI is a cross current: IT −IS, Z is a virtual impedance transfer function), and this signal is subtracted from the sine wave voltage command VC * output from the multiplier 911 by the adder / subtractor 841. , And this is the inverter output voltage command VC1 *. The inverter output voltage VC instantaneously follows the inverter output voltage command VC1 * by the above voltage control system.

FIG. 3 is a block diagram obtained by simplifying FIG. 1. Using this figure, the virtual impedance circuit 241 for limiting the cross current causes the inverter to have an output impedance of Z only with respect to the cross current and generate a current component other than the cross current. Operates as a low impedance voltage source.

In the figure, reference numeral 200a denotes a transfer function from the inverter output voltage command VC1 * to the output voltage of the inverter 1. Other numbers have already been described in FIG. 1 described above, and the same numbers are given to the same functions. ing. Some symbols have already been used, but the following symbols are defined again.

VS: Commercial voltage VC *: Sine wave voltage command VC1 *: Inverter output voltage command IL: Load current IT: Inverter output current IS: Commercial current dI: Inverter cross current (= IT-IS) G: Inverter voltage control system Transfer Function Z: Virtual Impedance Value for Cross Flow Restriction Using these symbols, a relational expression showing the effect of the virtual impedance for cross flow restriction is derived next.

From Kirchhoff's law, the following equation holds. IL = IT + IS (1) Further, dI is given by the following equation. dI = IT-IS (2) From FIG. 3, VC1 * is given by the following equation. VC1 * = VC * -Z * dI (3)

From the definition of G, the following equation holds. VS = VC1 * × G (4) From the expressions (3) and (4), the following expression is established. VS = VC * .times.G-Z.times.dI.times.G (5) When dI is obtained from the equation (5), the following equation is obtained. dI = (1 / Z) × [(VS-G × VC *) / G] (6)

From the equation (6), the cross current can be suppressed by the virtual impedance value Z. In G, the gain can be set to approximately 1 at the output frequency by configuring the voltage control system with the instantaneous voltage control type as described above.
The equation (6) becomes the following equation. dI≈ (VS-VC *) / Z (7)

If the voltage difference between the inverter output voltage and the commercial power supply in the case of the independent operation is dV, the equation (7) becomes the following equation. dI≈dV / Z (8) For example, when dV is 1%, if Z = 50% is selected, the cross current becomes dV / Z = 1% / 50% = 2%.

Since dI = 2%, which is very small, d
When I≈0, (1) and (2) are: IT = IS = IL / 2 (9), and the load sharing during parallel operation is halved.

Next, in the equation (5), the equation (8) is substituted into the second term on the right side to obtain the following equation. VS ≈ (VC * -dV) × G (10) Since dV is as small as about 1%, it can be considered that dV≈0. Therefore, the equation (10) becomes the following equation. VS ≈VC * × G (11) From the equation (11), the commercial voltage VS during parallel operation is the average value of the inverter output voltage during independent operation, and the virtual impedance value Z has no effect.

Z may be any transfer function as long as it has an appropriate impedance value for limiting the cross current at the output frequency. For example, if this circuit is a proportional circuit, Z is a resistor, if it is a differential circuit, Z is a reactor, if it is an integrating circuit, Z is a capacitor,
In the case of a combination circuit of integration and differentiation, Z operates as a combination circuit of a resistor, a capacitor, and a reactor.

Z is a circuit including a nonlinear element such as a positive / negative asymmetric limiter, as long as it has an appropriate impedance value for limiting the cross current at the output frequency.
Cross current can be stably restricted.

In this way, after confirming that the commercial power source 4b and the inverter 1 carry out stable parallel operation while sharing the load by half, the power supply switch 6a of the inverter is turned off and the operation of the switching control section 295 is performed. Thus, the switch 341 is turned off to switch the track / hold circuit 421 from the hold mode to the track mode, thereby switching from the parallel control mode to the original synchronous control mode and transferring the load to the commercial side. Return to normal operation in synchronous control mode.

Embodiment 2 FIG. FIG. 4 shows an embodiment of the present invention. In the figure, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the first embodiment is that a switch 332 and an average amplitude value detector 235 are added to control the inverter output voltage VC to match the commercial voltage VS when a commercial power supply command is input. The others are the same as those in the first embodiment.

In FIG. 4, when the commercial power supply command is input to the switching control unit 295 during the power supply to the inverter, the switch 332 moves to the average amplitude value detector 235 for detecting the averaged amplitude voltage of the commercial voltage VS. When turned on, the output voltage amplitude command is switched to the commercial voltage amplitude voltage, and the inverter output voltage is controlled to match the commercial voltage. Here, the inverter output voltage VC and the commercial voltage VS
After confirming that the power supply switch 6a of the inverter is on, the power supply switch 6b of the commercial power supply is kept on.
Is turned on, the commercial power supply 4b and the inverter 1 are operated in parallel, and the parallel control mode is entered.

With such a configuration, the voltage drops by several% when power is supplied to the load, for example, when the impedance of the commercial power source 4b is high. It may be set higher. Even for such commercial power supply, when switching from the inverter to the commercial power supply, cross current is suppressed by adjusting the output voltage of the inverter to the commercial voltage,
The switching operation can be performed stably.

When switching from the commercial power source to the inverter, the voltage of the inverter is switched according to the commercial power source.

Embodiment 3 FIG. 5 shows an embodiment of the present invention. In the figure, parts corresponding to those in FIG. 4 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the second embodiment is that the average amplitude value detector 234, the variable coefficient unit 233, and the adder / subtractor 831 are used to gently match the inverter output voltage VC with the commercial voltage VS when the commercial power supply command is input. , 833 is added, and the other points are the same as in the second embodiment.

In FIG. 5, when a commercial power feed command is input to the switching control section 295 during inverter power feed, the inverter output voltage VC detected by the voltage detector 701,
Amplitude voltages averaged with the commercial voltage VS detected by the voltage detector 702 are obtained by the average amplitude value detectors 234 and 235, respectively, and the commercial voltage VS and the inverter output voltage VC are obtained.
The deviation dV1 of the amplitude voltage between and is obtained by the adder / subtractor 233, and added to the output voltage amplitude command by the adder / subtractor 831 via the variable coefficient unit 233.

Here, the variable coefficient unit 233 is L = 0 while the inverter is feeding power, but when the commercial power feeding command is input, the variable coefficient unit 233 gently changes from L = 0 to L = 1. The output voltage VC is controlled so as to gently match the commercial voltage VS. After confirming that the inverter output voltage VC and the commercial voltage VS coincide with each other, the commercial power supply switch 6b is turned on while the inverter power supply switch 6a is turned on, and the commercial power supply 4b and the inverter 1 are connected to each other. It suffices if they are operated in parallel and enter the parallel control mode.

With such a configuration, the inverter output voltage can be gently adjusted to the commercial voltage, so that abrupt voltage fluctuations can be prevented from being applied to the load.

Embodiment 4 FIG. 6 shows an embodiment of the present invention. 6, parts corresponding to those in FIG. 5 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the third embodiment is that the variable coefficient unit 2 is used for gradual load transfer between the commercial power source 4b and the inverter 1.
51 and an adder / subtractor 852 are added, and the other points are the same as in the third embodiment.

In FIG. 6, the load current IL is obtained by adding and subtracting the inverter output current IT detected by the current detector 711 and the commercial current IS detected by the current detector 712.
This adder / subtractor 852 is obtained by adding 2
The load current IL which is the output of the variable coefficient N (N = 0 to 1)
The current command IT * shared by the inverter 1 is obtained by IL × N via the variable coefficient unit 251 having The output of the variable coefficient device 251 is the inverter shared current command IT *
And the inverter output current IT detected by the current detector 711, that is, the cross current dI is obtained by the adder / subtractor 851.

When the load is transferred from the inverter 1 to the commercial power source 4b, the variable coefficient unit 2 is entered at the same time when the parallel control mode is entered.
By gradually changing the coefficient N of 51 from 1 to 0, the shared current command IT * of the inverter 1 becomes IL (= IS +
It) gradually changes to 0. Therefore, the inverter 1
Instantaneously controls the cross current dI and gradually shifts the load to the commercial power source 4b. When the load is transferred from the commercial power source 4b to the inverter 1, the coefficient N of the variable coefficient device 251 is set to 0.
You can gradually change from 1 to 1.

Embodiment 5 FIG. 7 shows an embodiment of the present invention. 7, parts corresponding to those in FIG. 6 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the fourth embodiment is that a current detector 713 for detecting a load current is added, and a current detector for detecting a commercial current IS and an adder / subtractor are deleted. Others are the same as in the fourth embodiment. .

In FIG. 7, the load current IL is detected by the current detector 713 and the shared current command IT * is obtained through the variable coefficient device 251, so that the circuit is simplified.

Embodiment 6 FIG. 8 shows an embodiment of the present invention. 7, in FIG.
The same reference numerals are given to the portions corresponding to and the detailed description will be omitted. The difference from the fifth embodiment is that the sine wave voltage command VC * is changed by the inverter output current IT during parallel operation to form a virtual output impedance.
Others are the same as the fifth embodiment.

In FIG. 8, the inverter output current IT is regarded as a cross current during the parallel operation, and the inverter output current IT is sine wave voltage via the virtual impedance Z so that the inverter output current IT = 0A and the commercial current IS = IL. The command VC * is subtracted by the adder / subtractor 841.

In the configuration of this embodiment, the circuit can be simplified because the parallel operation can be performed without a detector or an arithmetic circuit for detecting the load current IL and the commercial current IS.

When switching from the commercial power supply to the inverter, when the inverter and the commercial power supply overlap, the current flowing into the inverter is set as a cross current and the current detector 7
11 detects and controls.

Embodiment 7 FIG. 9 shows an embodiment of the present invention. 9, parts corresponding to those in FIG. 8 are designated by the same reference numerals, and detailed description thereof will be omitted. The sixth embodiment is different from the sixth embodiment in that the virtual output impedance Z that changes the sine wave voltage command VC * by the inverter output current IT during parallel operation is configured to be variable at the same time as the parallel control mode, and the switch 341 is deleted. The others are the same as in the sixth embodiment.

In FIG. 9, when the power is fed to the inverter, the variable virtual output impedance 242 is Z = 0, and the sine wave voltage command VC * is not changed by the inverter output current IT. At the same time as entering the parallel control mode, the variable virtual output impedance Z is gradually increased and the inverter output current IT is gradually reduced. As a result, the load transfer from the inverter 1 to the commercial power supply 4b can be performed gently.

In the configuration of this embodiment, the load transfer can be performed gently even in the parallel control by the load current IL.

Embodiment 8 FIG. 10 shows an embodiment of the present invention. In FIG. 10, parts corresponding to those in FIG. 9 are designated by the same reference numerals, and detailed description thereof will be omitted. The seventh embodiment is different from the seventh embodiment in that a limiter 243 is added to the output of the virtual impedance Z, and the other points are the same as in the seventh embodiment.

In FIG. 10, when the power feeding switch 6b is not turned on due to an abnormality of the power feeding switch 6b of the commercial power source when the commercial power feeding command is input, the power feeding switch 6b is turned on.
The parallel control mode is entered before the abnormal condition is detected.
When the parallel control mode is entered, the inverter tries to supply the power from the commercial power source to the load by controlling the inverter output current IT to 0A. However, since the power supply switch 6b of the commercial power source is not turned on, power is supplied from the inverter 1.

Therefore, the inverter reduces the inverter output voltage VC by the action of virtual impedance. Then, since it becomes impossible to supply stable power to the load, the limiter 243 prevents the inverter output voltage from being narrowed down by a certain value by the action of the virtual output impedance 242.
By providing the above, stable power is supplied from the inverter to the load until the abnormality of the power supply switch 6b is detected.

With the structure of this embodiment, stable power can be supplied to the load even when the power supply switch is abnormal.

Embodiment 9 FIG. 11 shows an embodiment of the present invention. 11, parts corresponding to those in FIG. 10 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the eighth embodiment is that when the output of the virtual impedance Z exceeds the limiter value of the limiter 244, a signal is output and the alarm device 245 gives an alarm, and the other points are the same as in the eighth embodiment.

In FIG. 11, when the commercial power supply command is input and the power supply switch 6b is not turned on due to an abnormality of the power supply switch 6b of the commercial power supply, the virtual impedance 2
The output of 42 outputs a signal larger than the limit value set in the limiter 244. Therefore, this output outputs the limit value limited by the limiter 244, and
By outputting a signal notifying that the limit value has been exceeded and issuing an alarm with the alarm device 245, it is detected that the power supply switch 6b has not been turned on due to an abnormality in the power supply switch 6b, and predetermined protection is performed. You can take action.

With the configuration of this embodiment, an abnormality of the power supply switch can be detected easily and at high speed.

Embodiment 10 FIG. 12 shows an embodiment of the present invention. 12, parts corresponding to those in FIG. 6 are designated by the same reference numerals, and detailed description thereof will be omitted. The fourth embodiment is different from the fourth embodiment in that an instantaneous current control for instantaneously controlling the inverter current IA is added as a current minor loop and a circuit for generating a current reference of a capacitor is added. The same as 4.

In FIG. 12, the instantaneous current control amplifier 20
3, the output of the instantaneous current control amplifier 203 is given to the PWM modulation circuit 202 so that the inverter current IA fed back by the current detector 714 matches the current command IA * from the limiter circuit 204.

Next, how to obtain the inverter current command IA * will be described. The currents that the inverter 1 should flow are the current IC flowing through the capacitor 3 and the inverter output current IT. Therefore, the inverter current command IA * is obtained by adding the output of the instantaneous voltage control amplifier 201, which outputs a correction amount for minimizing the voltage deviation, to the capacitor current command IC * and the inverter current command IT * by the adder / subtractor 802. In addition, a signal limited to the allowable current of the device or less through the limiter 204 is given as a reference of the current minor loop.

Next, how to obtain the capacitor current reference IC * will be described. The capacitor current reference command IC * generates a sine wave current reference that is 90 degrees ahead of the sine wave voltage command VC * which is a voltage command of the capacitor 3 according to the capacity of the capacitor 3 as a current to flow to the capacitor. The coefficient generator 214 multiplies the output of the function generator 213 that outputs cos φ from the phase φ that is the output of the counter 211 and the output of the adder / subtractor 831 that outputs the output voltage amplitude command by the coefficient w 214 according to the capacitance of the capacitor 3. Multiplier 91
It is obtained by multiplying by 2.

The inverter output current command IT * is obtained as follows. IT * = (IT + IS) × N = IL × N (12) During the power feeding of the inverter, the variable coefficient unit 251 has N = 1 and I
Since L = IT, IT * = IT. That is, the current that the inverter supplies to the load is added to the inverter current command IA *.

Next, in the parallel control mode, the variable coefficient unit 2
Since the value of 51 gradually changes from N = 1 to N = 0, the inverter output current command IT * gradually decreases.
That is, since the current to be shared by the inverter 1 is directly added to the inverter current command IA *, the shared current can be controlled at high speed. That is, the cross current dI can be controlled at high speed.

In the structure of this embodiment, the cross current can be controlled at high speed by controlling the shared current of the inverter at high speed.

Embodiment 11 FIG. 13 shows an embodiment of the present invention. 13, parts corresponding to those in FIG. 7 are designated by the same reference numerals, and detailed description thereof will be omitted. The fifth embodiment is different from the fifth embodiment in that an instantaneous current control for instantaneously controlling an inverter current IA is added as a current minor loop and a circuit for generating a current reference of a capacitor is added. The same as 5.

In FIG. 13, the description of the current minor loop is omitted since it has been described in the tenth embodiment. The inverter output current command IT * is obtained as follows. IT * = IL × N (13) During the power feeding to the inverter, the variable coefficient unit 251 has N = 1 and I
Since L = IT, IT * = IT. That is, the current supplied to the load by the inverter is added to the current command IA * of the inverter.

Next, in the parallel control mode, the variable coefficient unit 2
Since the value of 51 gradually changes from N = 1 to N = 0, the inverter output current command IT * gradually decreases.
That is, since the current to be shared by the inverter 1 is directly added to the inverter current command IA *, the shared current can be controlled at high speed. That is, the cross current dI can be controlled at high speed.

In the structure of this embodiment, the cross current can be controlled at high speed by controlling the shared current of the inverter at high speed.

Embodiment 12 FIG. 14 shows an embodiment of the present invention. 14, parts corresponding to those in FIG. 6 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the fourth embodiment is that the cross flow d can be stably performed even when the parallel operation time is long.
A power calculator 261, which detects the active power dIP of I and the reactive power dIQ, an active power control amplifier 263, a reactive power control amplifier 262, and switches 361 and 362 are added. Is the same as.

In FIG. 14, the parallel operation time becomes longer when switching from the inverter power supply to the commercial power supply, for example, when the operation time of the power supply switch 6b of the commercial power source and the power supply switch 6a of the inverter is slow. In this case, if the parallel operation is performed only by the virtual impedance Z,
A cross current of dI = dV / Z flows between the commercial power supply 4b and the inverter 1 with respect to the potential difference dV. Since the active power component of this cross current is reversibly converted by the inverter 1, for example, when operating in parallel with no load, the commercial power supply 4b is used.
Therefore, active power flows to the DC power supply 4a of the inverter 1. If this active power cross current becomes larger than the loss of the inverter 1 and the DC power supply 4a cannot regenerate power like a thyristor rectifier, the inflow of this active power raises the DC voltage, which may result in overvoltage. There is.

Next, d for suppressing such an inflow of active power and stably performing parallel operation without causing a DC overvoltage.
Control by IP and dIQ will be described.

From the equation (8), the cross current dI is dI≈dV / Z.

FIG. 15 shows a vector diagram in the case where the absolute values of VC * and VS coincide with each other and VS is delayed from VC * by the phase angle θ. Here, when the resistance component of the virtual impedance Z is R and the reactance component is X, Z
= R + jX and its impedance angle α
Is defined as α = argZ = tan−1 (X / R) (14).

From this vector diagram, the cross current vector dI is
It does not have a component parallel to the virtual voltage vector Er delayed by α from the intermediate voltage vector VB, but only a component parallel to another virtual voltage vector Ex advanced 90 ° from this virtual voltage vector.

FIG. 16 shows a vector diagram in the case where there is no phase difference between VC * and VS and the absolute value of VS is smaller than the absolute value of VC *. From this vector diagram, the cross current vector dI has only a component parallel to the virtual voltage vector Er delayed by α from the intermediate voltage vector VB, and does not have a component parallel to Ex.

From FIG. 15 and FIG. 16, each cross current component dI
It can be seen that the component due to the phase difference between VC * and VS is a component of these cross current vectors perpendicular to the virtual voltage vector Er (component parallel to the virtual voltage vector Ex). That is, each of the cross current components dI is caused by both voltages VC * and VS.
The component due to the phase difference between the two is equal to the reactive component of each cross current component dI with reference to the voltage Ex obtained by advancing the phase of the intermediate voltage vector VB by 90 ° -α.

Similarly, the cross current component dI is caused by the voltage absolute value difference between the two voltages VC * and VS, and the effective component of each cross current component dI of these cross current vectors with reference to the virtual voltage vector Er is used. It turns out to be equal to.

Returning to FIG. 14, the description will be continued. The power calculator 261 is a converter that converts the cross current dI, which is the output of the adder / subtractor 851, into two quadrature components dIP and dIQ (DC signal). It is composed of a multiplier and a smoothing filter.
The component dIP is an effective component based on the voltage Er of the current dI, and dIQ is an invalid component based on the voltage Er of the current dI.

DIP is added and subtracted by an adder / subtractor 862 via an active power control amplifier 263 for controlling dIP to 0.
It is subtracted from the voltage amplitude command value from the output voltage amplitude command generator 231.

The dIQ is supplied by the adder / subtractor 861 via the reactive power control amplifier 262 for controlling the dIQ to 0.
It is subtracted from the frequency command value from the output frequency setter 221 and given as an input to the voltage controlled oscillator to control the output frequency of the inverter.

As described above, the output voltage-phase is controlled by the component dIQ caused by the phase difference between the inverter of the cross current dI and the commercial voltage, and the voltage is controlled by the component dIP caused by the voltage absolute value difference. Control to reduce cross current. This control may be performed relatively slowly as long as the crossflow does not become harmful.

Embodiment 13 FIG. 17 shows an embodiment of the present invention. 17, parts corresponding to those in FIG. 7 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the fifth embodiment is that a power calculator 261 that detects active power dIP and reactive power dIQ of cross current dI and an active power controller so that parallel operation can be stably performed even when the parallel operation time is long. 263, a reactive power controller 262, and switches 361 and 362 are added, and the other points are the same as in the fifth embodiment.

In FIG. 17, the power calculator 261 converts the cross current dI, which is the output of the adder / subtractor 851, into two orthogonal components dI.
P, dIQ (direct current signal) converters, which are composed of a synchronous rectification circuit or a multiplier and a smoothing filter, which are not shown. The component dIP is an effective component based on the voltage Er of the current dI, and dIQ is an invalid component based on the voltage Er of the current dI.

DIP is added and subtracted by an adder / subtractor 862 via an active power control amplifier 263 for controlling dIP to 0.
It is subtracted from the voltage amplitude command value from the output voltage amplitude command generator 231.

The dIQ is supplied to the adder / subtractor 861 via the reactive power control amplifier 262 for controlling the dIQ to 0.
It is subtracted from the frequency command value from the output frequency setter 221 and given as an input to the voltage controlled oscillator to control the output frequency of the inverter.

As described above, the output voltage-phase is controlled by the component dIQ caused by the phase difference between the inverter of the cross current dI and the commercial voltage, and the voltage is controlled by the component dIP caused by the voltage absolute value difference. Control to reduce cross current. This control may be performed relatively slowly as long as the crossflow does not become harmful.

Embodiment 14 FIG. 18 shows an embodiment of the present invention. 18, parts corresponding to those in FIG. 14 are designated by the same reference numerals, and detailed description thereof will be omitted.

The difference from the twelfth embodiment is that when the inverter supplies power to the load, the temperature of the inverter device rises due to the loss of the inverter, and a temperature rise test is conducted to test whether the temperature rise value is within the allowable value. In this case, the coefficient unit 252 and the changeover switch 351 are added so that the power consumed by the load is regenerated to the commercial power source side so that the power consumed from the commercial power source can be suppressed to only the loss of the inverter. Yes, others are Example 1
Same as 2.

In FIG. 18, reference numeral 41a denotes a DC power source for converting an AC input voltage into a DC voltage, which is generally a thyristor rectifier or the like. The input of the DC power supply 41a is connected to the commercial power supply 4b, and no load is connected to the output side of the inverter.

In this state, the power supply switch 6b for the commercial power source
Is turned on, the inverter power supply switch 6a is turned on after the inverter is started, and in the test operation mode, the switch 351 is turned on to the variable coefficient device 252 side, and the inverter output current IT with a power factor of 1 is turned on. Since the commercial power supply 4b is regenerated, the value of the commercial voltage VS is varied through the coefficient unit 252 according to the current to be consumed, and the value K is changed to the inverter output current command IT * to supply the commercial power. Can be regenerated to the side.

With such a structure, the power consumed by the load in the temperature rise test or the like can be regenerated to the power source side, so that the power consumed in the test or the like can be reduced.

Embodiment 15 FIG. 19 shows an embodiment of the present invention. 19, parts corresponding to those in FIG. 17 are designated by the same reference numerals, and detailed description thereof will be omitted.

The difference from the thirteenth embodiment is that when the inverter supplies power to the load, the temperature of the inverter device rises due to the loss of the inverter, and a temperature rise test is conducted to test whether the temperature rise value is within the allowable value. In this case, the coefficient unit 252 and the changeover switch 352 are added so that the power consumed by the load can be suppressed to the loss of the inverter only by regenerating the power consumed by the load to the commercial power source side. Yes, others are Example 1
Same as 3.

In FIG. 19, reference numeral 41a denotes a DC power source for converting an AC input voltage into a DC voltage, which is typically a thyristor rectifier or the like. The input of the DC power supply 41a is connected to the commercial power supply 4b, and no load is connected to the output side of the inverter.

In this state, the power supply switch 6b for the commercial power source
Is turned on, the inverter power supply switch 6a is turned on after the inverter is started, and in the test operation mode, the switch 352 is turned on to regenerate the inverter output current with a power factor of 1 to the commercial power source side. By setting the commercial voltage VS to a current value corresponding to the power to be consumed via the coefficient unit 252 and setting this as the inverter output current command IT *, the power can be regenerated to the commercial power source side.

With such a configuration, the power consumed by the load in the temperature rise test or the like can be regenerated to the power source side, so that the power consumed in the test or the like can be reduced.

Embodiment 16 FIG. 20 shows an embodiment of the present invention. 20, parts corresponding to those in FIG. 18 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the fourteenth embodiment is that in addition to the temperature rise test, it is a characteristic test for supplying power to delay and lead loads, non-linear loads, etc., and the power consumed by the load is regenerated to the commercial power source side. As a result, the function generator 213, the multiplier 913, the current amplitude command generator 215 for generating the current amplitude command, and the changeover switch 351 are added so that the power consumed from the commercial power supply can be suppressed only to the loss of the inverter. Points, and others are Example 1
Same as 4.

In FIG. 20, when the inverter is started and the test mode is entered, the switch 351 is turned on to the output side of the multiplier 913, and the output of the counter 211 which outputs the phase command φ is changed with respect to the sine wave voltage command VC *. The output of the function generator 213 that can output a sine wave function or a non-linear function of an arbitrary phase and the output of the current amplitude command generator 215 that outputs the amplitude command value of the output current are output by the multiplier 913. The inverter output current command value IT * is obtained by multiplication. By flowing this inverter output current command IT * to the commercial power source side while operating in parallel with the commercial power source, it is possible to regenerate electric power to the commercial power source.

With such a configuration, any load can be simulated and the power can be regenerated to the commercial power source side, so that the power consumed in the test or the like can be reduced.

Embodiment 17 FIG. 21 shows an embodiment of the present invention. 21, parts corresponding to those in FIG. 19 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the fifteenth embodiment is that, in addition to the temperature rise test, it is a characteristic test for supplying power to delay and lead loads, a non-linear load, etc., and the power consumed by the load is regenerated to the commercial power source side. Thus, the function generator 213, the multiplier 913, the current amplitude command generator 215, and the changeover switch 352 are added so that the power consumed from the commercial power source can be suppressed only to the loss of the inverter. Is the same as in Example 15.

In FIG. 21, when the inverter is started and in the test mode, the switch 352 is turned on and the output of the counter 211 which outputs the phase command φ is changed to the sine wave voltage command V.
An output of a function generator 213 capable of outputting a sine wave function or a non-linear function of an arbitrary phase with respect to C *, and a current amplitude command generator 215 for outputting an amplitude command value of an output current.
The inverter output current command value IT * is obtained by multiplying the outputs of and by the multiplier 913. The inverter output current command IT * is supplied to the commercial power source by causing the inverter to flow in the commercial power source while operating in parallel with the commercial power source.

With such a configuration, any load can be simulated and the power can be regenerated to the commercial power source side, so that the power consumed in the test or the like can be reduced.

Embodiment 18 FIG. 22 shows an embodiment of the present invention. 22, parts corresponding to those in FIG. 6 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the fourth embodiment is that in order to simulate the inverter output current, a current detector 715 for detecting the capacitor current IC and an adder / subtractor 881 are added, and the current detector for detecting the inverter output current IT is reduced. Yes, others are the same as in the fourth embodiment.

In FIG. 22, the inverter 1 is designed to prevent the element from being destroyed by the overcurrent of the inverter element.
It is common to provide a protection circuit 281 that shuts off the gate of the inverter when the inverter current IA is monitored and the device tries to flow more than the allowable current. Therefore, the current detection for detecting the inverter current IA is performed. In many cases, a vessel 714 is attached.

When there is the current detector 714 for detecting the inverter current IA, the inverter output current IT
Can be simulated as follows. The inverter output current IT is IT = IA-IC (15).

Therefore, the inverter output current IT can be simulated by subtracting the capacitor current IC detected by the current detector 715 from the inverter current IA detected by the current detector 714 by the adder / subtractor 881.
This simulated inverter output current IT may be used for cross current control during parallel operation of the inverter 1 and the commercial power supply 4b.

With such a configuration, the current flowing through the capacitor is considerably smaller than the inverter output current, so that the rating of the current detector can be lowered. Therefore, the inverter output current detection circuit can be constructed at low cost.

Embodiment 19 FIG. 23 shows an embodiment of the present invention. 23, parts corresponding to those in FIG. 22 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the eighteenth embodiment is that a circuit for simulating the capacitor current IC is added to simulate the inverter output current and the current detector for detecting the capacitor current IC is reduced. It is the same.

In FIG. 23, the capacitor current IC flowing through the capacitor 3 is a current that should flow through the capacitor so that a sine wave current reference that is 90 degrees ahead of the sine wave voltage command VC * is generated according to the capacitance of the capacitor 3. A coefficient generator 214 multiplies the output of a function generator 213 that outputs cosφ from the phase φ that is the output of the counter 211 and the output of an adder / subtractor 831 that outputs an output voltage amplitude command by a value wC according to the capacity of the capacitor 3. The obtained value is multiplied by the multiplier 912.
It is obtained by multiplying by.

Therefore, the inverter output current IT can be simulated by subtracting the capacitor simulation current IC *, which is the output of the multiplier 912, from the inverter current IA detected by the current detector 714 by the adder / subtractor 881. .
This simulated inverter output current may be used for cross current control during parallel operation of the inverter 1 and the commercial power supply 4b.

With such a structure, the capacitor current detector can be reduced by simulating the current flowing through the capacitor.

Embodiment 20 FIG. 24 shows an embodiment of the present invention. 24, parts corresponding to those in FIG. 23 are designated by the same reference numerals, and detailed description thereof will be omitted. The difference from the nineteenth embodiment is that the means for simulating the capacitor current IC is performed by the inverter output voltage VC, and the other points are the same as the nineteenth embodiment.

In FIG. 24, the relationship between the capacitor current IC flowing through the capacitor 3 and the inverter output voltage VC is given by the following equation. IC = S × C × VC (16) (S = d / dt differential operator, C = capacitor capacity)

From the above equation, the inverter output voltage VC detected by the voltage detector 701 is subtracted by the adder / subtractor 881 from the capacitor simulated current IC * obtained through the differentiator 282 to obtain the inverter output current IT. It can be simulated. This simulated inverter output current may be used for cross current control during parallel operation of the inverter 1 and the commercial power supply 4b.

With such a structure, the circuit structure for simulating the current flowing through the capacitor can be simplified.

Example 21. Although the switching of the inverter 1 to the commercial power supply 4b has been described in Embodiments 1 to 13, when the switching is performed in the reverse direction, that is, when the commercial power supply 4b is switched to the inverter 1, the above operation is performed in reverse. By doing so, it can be performed stably.

Example 22. The techniques used in Example 2 or Example 3 (matching of the inverter voltage and the commercial power supply side voltage) are Examples 4 to 6 (gradual load transfer, etc.), and Examples 7 to 7.
9 (variable virtual impedance, addition of limiter, alarm by limiter), Examples 10 and 11 (current control by minor loop), Examples 12 and 13 (control by effective and ineffective components of cross current), Examples 14 to. 17 (regeneration of inverter output current).

The techniques used in Examples 4 to 6 (gradual load transition, etc.) are as follows: Examples 7 to 9 (variable virtual impedance, addition of limiter, alarm by limiter), Examples 10 and 11 (minor loop). Current control), Example 1
2 and 13 (control by the effective component and the ineffective component of the cross current) and Examples 14 to 17 (regeneration of the inverter output current).

The techniques used in Examples 7 to 9 (variation of virtual impedance, addition of limiter, alarm by limiter) are as follows: Examples 10 and 11 (current control by minor loop), Examples 12 and 13 (cross current component). Control based on effective and ineffective components) and Examples 14 to 17 (regeneration of inverter output current).

The techniques used in Examples 10 and 11 (current control in the minor loop) are the same as those in Examples 12 and 13 (control by effective and ineffective components of cross current) and Examples 14 to 17.
(Regeneration of inverter output current) can be applied.

Further, the techniques used in Examples 12 and 13 (control by the effective component and the ineffective component of the cross current) are the same as those of Examples 14 to 14.
17 (regeneration of inverter output current).

The techniques used in Examples 18 to 20 (IT detection is simulated by a capacitor current) are described in Examples 1 to 1.
It can be applied to Example 17.

Example 23. In order to realize the principles shown in the first to twentieth embodiments, a discrete circuit using an analog operation amplifier or the like may be used, or software control may be performed by digital control by a microprocessor or a digital signal processor. .

The commercial power supply shown in Embodiments 1 to 20 may of course be another AC power supply such as an inverter or a generator.

[0171]

【The invention's effect】

(1) As described above, according to the present invention, the means for suppressing the cross current is provided at the time of switching the synchronization, so that the cross current can be suppressed and the control response can be improved.

(2) Further, since the output voltage of the inverter is adapted to the output voltage of another AC power source, cross current can be suppressed and stable switching operation can be performed.

(3) Further, since the inverter output voltage is gradually adjusted to the output voltage of another AC power source, it is possible to prevent a sudden voltage fluctuation in the load.

(4) Further, since the amount of cross flow is variable, the load can be transferred gently.

(5) Moreover, since the output current of the power supply on the load supply side is controlled as a cross current, the number of current detectors can be reduced, which is economical.

(6) Further, since the suppression amount for suppressing the cross flow is made variable, the load transfer can be performed gently.

(7) Further, since the limiter is provided to limit the amount of cross current, power can be supplied from the inverter to the load even when the switching operation is abnormal.

(8) Further, since the alarm signal is generated when the limiter limit value is exceeded, if the switching operation is abnormal, it is possible to promptly report and deal with it.

(9) Since the minor loop for controlling the instantaneous value of the output current of the inverter is provided, the cross current can be controlled at high speed.

(10) Further, the first component due to the phase difference between the cross current inverter and the other AC power supply, and the second component due to the voltage difference between the cross current inverter and the other AC power supply. Since the control is performed using and, parallel operation can be stably performed even when the parallel operation time is long.

(11) Further, since the output current of the inverter is arbitrarily adjusted to be regenerated to another AC power source,
It is possible to reduce the power consumed in tests and the like.

(12) Further, since the output current of the inverter is not directly detected and the simulated inverter output current is used, the circuit for detecting the output current of the inverter is not required and the structure can be constructed at low cost.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a synchronous switching circuit of an inverter according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing an example of a main circuit of an inverter used in the present invention.

FIG. 3 is a functional block diagram illustrating the operation of FIG.

FIG. 4 is a circuit diagram showing a synchronous switching circuit of an inverter according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a synchronous switching circuit for an inverter according to a third embodiment of the present invention.

FIG. 6 is a circuit diagram showing an inverter synchronous switching circuit according to a fourth embodiment of the present invention.

FIG. 7 is a circuit diagram showing an inverter synchronous switching circuit according to a fifth embodiment of the present invention.

FIG. 8 is a circuit diagram showing an inverter synchronous switching circuit according to a sixth embodiment of the present invention.

FIG. 9 is a circuit diagram showing a synchronous switching circuit for an inverter according to a seventh embodiment of the present invention.

FIG. 10 is a circuit diagram showing a synchronous switching circuit for an inverter according to Embodiment 8 of the present invention.

FIG. 11 is a circuit diagram showing an inverter synchronous switching circuit according to a ninth embodiment of the present invention.

FIG. 12 is a circuit diagram showing an inverter synchronous switching circuit according to a tenth embodiment of the present invention.

FIG. 13 is a circuit diagram showing an inverter synchronous switching circuit according to an eleventh embodiment of the present invention.

FIG. 14 is a circuit diagram showing a synchronous switching circuit for an inverter according to a twelfth embodiment of the present invention.

FIG. 15 is a vector diagram illustrating an twelfth embodiment of the present invention.

FIG. 16 is a vector diagram for explaining the twelfth embodiment of the present invention.

FIG. 17 is a circuit diagram showing an inverter synchronous switching circuit according to a thirteenth embodiment of the present invention.

FIG. 18 is a circuit diagram showing a synchronous switching circuit for an inverter according to a fourteenth embodiment of the present invention.

FIG. 19 is a circuit diagram showing an inverter synchronous switching circuit according to a fifteenth embodiment of the present invention.

FIG. 20 is a circuit diagram showing an inverter synchronous switching circuit according to a sixteenth embodiment of the present invention.

FIG. 21 is a circuit diagram showing a synchronous switching circuit for an inverter according to a seventeenth embodiment of the present invention.

FIG. 22 is a circuit diagram showing a synchronous switching circuit for an inverter according to Embodiment 18 of the present invention.

FIG. 23 is a circuit diagram showing a synchronous switching circuit for an inverter according to a nineteenth embodiment of the present invention.

FIG. 24 is a circuit diagram showing a synchronous switching circuit for an inverter according to a twentieth embodiment of the present invention.

FIG. 25 is a circuit diagram showing a conventional inverter synchronous switching circuit.

[Explanation of symbols]

1 inverter main circuit, 2 reactor, 3 capacitor, 4a DC power supply, 4b commercial power supply, 5 load, 6
a, 6b Power supply switch, 41a DC power supply, 201
Instantaneous voltage control amplifier, 202 PWM modulation circuit, 203
Instantaneous current control amplifier, 204 limiter circuit, 211
Counter, 212, 213 Function generator, 214 Coefficient generator, 215 Current amplitude command generator, 221 Output frequency setting device, 222 Phase comparator, 223 Voltage controlled oscillator, 231 Output voltage amplitude command generator, Variable coefficient device 23
3, 234 average amplitude value detector, 235 average amplitude value detector, 241 cross current limiting virtual impedance circuit, 2
42 variable virtual output impedance, 243, 244
Limiter, 245 alarm device, 251 variable coefficient device, 25
2 coefficient unit, 261 power calculator, 262 reactive power control amplifier, 263 active power control amplifier, 281 protection circuit, 282 differentiator, 295 switching control unit, 33
2,341 switches, 351,352 selector switches, 361,362 switches, 421 tracks /
Hold circuit, 701, 702 Voltage detector, 711,
712, 713, 714 Current detector, 801, 80
2,831,832,833,841,851, adder / subtractor, 852,862,881 adder / subtractor, 911,91
2,913 multiplier,

Claims (20)

[Claims] 1. An arm for each phase constituting an inverter is one.
Synchronizing the instantaneous voltage control type inverter that has an instantaneous voltage control circuit that controls the instantaneous value of the output voltage by switching multiple times during a cycle and the inverter that performs load switching synchronously with another AC power supply A synchronous switching circuit for an inverter, wherein the switching circuit is provided with a cross current suppressing unit for suppressing a cross current flowing between the inverter and another AC power source, and suppresses the cross current for synchronous switching. 2. The cross current suppressing means according to claim 1, comprising a detecting means for detecting a cross current flowing between the inverter and another AC power supply, and a suppressing means for suppressing the detected cross current. An inverter synchronous switching circuit characterized in that the output voltage of the inverter is controlled in accordance with a signal from the control means. 3. The voltage matching means for matching the output voltage of an inverter to the output voltage of another AC power supply according to claim 1 or 2, wherein the output voltage of the inverter is set to the output voltage of the other AC power supply. A synchronous switching circuit for an inverter, characterized in that the synchronous switching is performed by matching them. 4. The voltage matching means according to claim 3, wherein the output voltage of the inverter is controlled according to an average value of the output voltages of the other AC power supplies, and the output voltage of the inverter is set to the output voltage of the other AC power supply. A synchronous switching circuit for an inverter, characterized in that it is a means for matching. 5. The voltage matching means according to claim 3, wherein the output voltage of the inverter is controlled in accordance with the deviation between the output voltage of the other AC power supply and the output voltage of the inverter, and the output voltage of the other AC power supply is controlled. A synchronous switching circuit for an inverter, characterized in that the output voltage of the inverter is matched. 6. The voltage matching means according to claim 5, wherein the deviation between the average value of the output voltage of the inverter and the average value of the output voltage of the other AC power source is derived, and the deviation is varied according to time. An inverter characterized in that the output voltage of the inverter is controlled according to the variable deviation to gradually match the output voltage of the inverter with the output voltage of the other AC power source according to the time. Synchronous switching circuit. 7. The cross current suppressing unit according to claim 1, wherein the load current of the power supply on the load supply side among the inverter and the other AC power supply is detected as a cross current, and the power is supplied from the power supply on the load supply side in parallel operation. Synchronous switching of the inverter, characterized in that it is provided with a cross current adjusting unit for adjusting the cross current so as to transfer the load to another load supply side power supply, and a suppressing unit for suppressing the adjusted cross current. circuit. 8. The cross current suppressing means according to claim 1, wherein the cross current suppressing means includes a detecting means for detecting the output current of the inverter as a cross current, and a suppressing means for suppressing the detected cross current. Inverter synchronous switching circuit. 9. The suppressing means as claimed in claim 2, wherein the suppressing means suppresses the input cross current, and the suppressing amount is variable according to time in a parallel operation state. A synchronous switching circuit for an inverter, wherein a load is transferred to perform synchronous switching by controlling an output voltage of the inverter according to a variable cross current. 10. The limiter according to claim 2, 7 or 8, wherein a limiter for limiting the magnitude of the signal from the suppressing means is provided, and the voltage of the inverter is controlled according to the output from the limiter. A synchronous switching circuit of an inverter characterized by the above. 11. The synchronous switching circuit for an inverter according to claim 10, further comprising alarm means for transmitting an alarm signal when the limiter limit value is exceeded. 12. The instantaneous voltage control circuit according to claim 1, further comprising a minor loop for controlling an instantaneous value of an output current of an inverter before passing an AC filter. A synchronous switching circuit for an inverter, further comprising means for deriving a current to be passed through a capacitor of an AC filter and controlling the inverter as a command signal. 13. The first component resulting from the phase difference between an inverter for cross current and another AC power supply, and the inverter for cross current according to claim 1, 2, 7, or 8, A detection means for detecting a second component caused by a voltage difference between the AC power supplies is provided, and the output voltage of the inverter is controlled according to the detection signal during parallel operation to perform synchronous switching. Inverter synchronous switching circuit. 14. A method according to any one of claims 1 to 13, wherein a command generating means for commanding to arbitrarily adjust an output current of the inverter is provided and the output of the inverter is switched to another AC power source for regeneration. A synchronous switching circuit for an inverter, characterized in that the output current of the inverter is controlled according to the command signal. 15. The synchronous switching circuit for an inverter according to claim 14, wherein the command generating means is a means for arbitrarily changing the detected regenerative current to generate a command signal. 16. The synchronous switching circuit for an inverter according to claim 14, wherein the command generating circuit is a circuit which generates a sine wave function or a non-linear function of an arbitrary phase to generate a command signal. 17. The cross current suppressing device according to claim 1, further comprising a simulation signal generating device for generating a signal simulating the inverter output current when the cross current is derived by using at least the output current of the inverter. A synchronous switching circuit for an inverter, wherein the pseudo current is used instead of the inverter output current to detect a cross current component. 18. The synchronization of an inverter according to claim 17, wherein the simulated signal generating means is a means for deriving an output current of the inverter from an output current of the inverter before passing through the AC filter and a capacitor current of the AC filter. Switching circuit. 19. The simulated signal generating means according to claim 17, which generates a signal in phase with the current of the capacitor of the AC filter according to the capacity of the capacitor as a simulated capacitor current and passes through the simulated capacitor current and the AC filter. A synchronous switching circuit for an inverter, which is a means for deriving an output current of the inverter from an output current of the previous inverter. 20. The simulation signal generating means according to claim 17, wherein the simulation capacitor current is derived in accordance with a differential value of the output voltage of the inverter, and the simulation capacitor current and the output current of the inverter before passing through the AC filter are applied to the inverter. A synchronous switching circuit for an inverter, characterized by being a means for deriving an output current.