JPH0917912A - Resin sealed semiconductor device - Google Patents
Resin sealed semiconductor deviceInfo
- Publication number
- JPH0917912A JPH0917912A JP18487495A JP18487495A JPH0917912A JP H0917912 A JPH0917912 A JP H0917912A JP 18487495 A JP18487495 A JP 18487495A JP 18487495 A JP18487495 A JP 18487495A JP H0917912 A JPH0917912 A JP H0917912A
- Authority
- JP
- Japan
- Prior art keywords
- wire
- resin
- semiconductor chip
- semiconductor device
- wire guide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4899—Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
- H01L2224/48996—Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/48998—Alignment aids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は樹脂封止型半導体装
置、詳しくは樹脂封止（モールド）時のボンディングワ
イヤのワイヤ流れを防止した樹脂封止型半導体装置に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a resin-encapsulated semiconductor device which prevents wire flow of a bonding wire during resin encapsulation (molding).
【０００２】[0002]
【従来の技術】従来のこの種の技術としては、特開平２
ー５４５６７号公報に記載されたものが知られている。
この樹脂封止型半導体装置は、図３および図４に示すよ
うに、リードフレームのアイランド部１およびリード部
２と、このアイランド部１に搭載された半導体チップ３
と、半導体チップ３の端子部をリード部２に接続するボ
ンディングワイヤ４と、これら封止する封入樹脂５とを
有している。そして、絶縁物からなる薄板６が、アイラ
ンド部１の裏面に取り付けられている。薄板６は突起部
７を有し、この突起部７がアイランド部１の周囲を取り
囲むように壁を形成している。2. Description of the Related Art As a conventional technique of this kind, Japanese Patent Application Laid-Open No. HEI-2
The one described in Japanese Patent Laid-Open No. 54567 is known.
As shown in FIGS. 3 and 4, this resin-encapsulated semiconductor device includes an island portion 1 and a lead portion 2 of a lead frame, and a semiconductor chip 3 mounted on the island portion 1.
And a bonding wire 4 for connecting the terminal portion of the semiconductor chip 3 to the lead portion 2, and a sealing resin 5 for sealing these. Then, the thin plate 6 made of an insulating material is attached to the back surface of the island portion 1. The thin plate 6 has a protruding portion 7, and the protruding portion 7 forms a wall so as to surround the periphery of the island portion 1.
【０００３】この樹脂封止型半導体装置では、絶縁物６
をアイランド部１とリード部２の裏面に取り付けること
によって、ボンディングワイヤ４が半導体チップ３やア
イランド部１と接触すること、および、リード部２同士
が接触することを防いでいる。In this resin-sealed semiconductor device, the insulator 6
Are attached to the back surfaces of the island portion 1 and the lead portion 2 to prevent the bonding wire 4 from coming into contact with the semiconductor chip 3 and the island portion 1 and the lead portions 2 from coming into contact with each other.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、このよ
うな従来の樹脂封止型半導体装置にあっては、モールド
時のワイヤ流れを完全には防止することができなかっ
た。すなわち、樹脂を注入したとき、その圧力によりワ
イヤの横方向への流れが発生し、隣り合うワイヤ同士が
接触した状態で封止されてしまうことがあった。However, in such a conventional resin-encapsulated semiconductor device, it was not possible to completely prevent wire flow during molding. That is, when the resin is injected, the wire may flow in the lateral direction due to the pressure, and the wires may be sealed while being in contact with each other.
【０００５】[0005]
【発明の目的】そこで、この発明は、モールド時のワイ
ヤ流れを完全に防止することをその目的としている。特
に、ワイヤの横流れを防止することを、その目的として
いる。また、樹脂封止型半導体装置の製造歩留まりを高
めることを、その目的としている。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to completely prevent wire flow during molding. In particular, its purpose is to prevent lateral flow of wires. Further, it is an object of the invention to improve the manufacturing yield of the resin-encapsulated semiconductor device.
【０００６】[0006]
【課題を解決するための手段】請求項１に記載の発明
は、リードフレームのアイランド部に搭載された半導体
チップと、一端が半導体チップの端子部に他端がリード
フレームのリード部にそれぞれ接続されたボンディング
ワイヤと、この半導体チップとリード部との間に設けら
れ、ボンディングワイヤを支持する絶縁性のワイヤガイ
ドと、これらの半導体チップおよびボンディングワイヤ
を封止する樹脂からなる封入樹脂部と、を備えた樹脂封
止型半導体装置において、上記ワイヤガイドの表面に、
上記ボンディングワイヤを係止する溝または突起を形成
した樹脂封止型半導体装置である。According to a first aspect of the present invention, a semiconductor chip mounted on an island portion of a lead frame is connected to a terminal portion of the semiconductor chip at one end and to a lead portion of the lead frame at the other end. Bonding wire, an insulating wire guide provided between the semiconductor chip and the lead portion, for supporting the bonding wire, and an encapsulating resin portion made of a resin for sealing the semiconductor chip and the bonding wire, In a resin-encapsulated semiconductor device provided with, on the surface of the wire guide,
A resin-encapsulated semiconductor device having a groove or a protrusion for locking the bonding wire.
【０００７】請求項２に記載の発明は、リードフレーム
のアイランド部に搭載された半導体チップと、一端が半
導体チップの端子部に他端がリードフレームのリード部
にそれぞれ接続されたボンディングワイヤと、この半導
体チップとリード部との間に設けられ、ボンディングワ
イヤを支持する絶縁性のワイヤガイドと、これらの半導
体チップおよびボンディングワイヤを封止する樹脂から
なる封入樹脂部と、を備えた樹脂封止型半導体装置にお
いて、上記ワイヤガイドは封入樹脂により軟化する熱軟
化性材料で形成した樹脂封止型半導体装置である。According to a second aspect of the present invention, a semiconductor chip mounted on an island portion of a lead frame, a bonding wire having one end connected to a terminal portion of the semiconductor chip and the other end connected to a lead portion of the lead frame, respectively. A resin encapsulation provided between the semiconductor chip and the lead portion, the insulating wire guide supporting the bonding wires, and an encapsulating resin portion encapsulating the semiconductor chips and the bonding wires. In the semiconductor device, the wire guide is a resin-sealed semiconductor device formed of a thermosoftening material that is softened by an encapsulating resin.
【０００８】[0008]
【作用】請求項１に記載の発明では、ボンディングワイ
ヤはワイヤガイドの溝または突起に係止されているた
め、封入樹脂によって流されることがない。換言する
と、ボンディングワイヤはワイヤガイド表面の所定部位
に接触して補強され、樹脂封止の際の樹脂による上下方
向および横方向へのワイヤ流れは防止される。According to the first aspect of the invention, since the bonding wire is locked in the groove or the protrusion of the wire guide, it is not washed by the encapsulating resin. In other words, the bonding wire comes into contact with a predetermined portion of the surface of the wire guide and is reinforced, so that the wire is prevented from flowing vertically and laterally by the resin during resin sealing.
【０００９】また、請求項２に記載の発明では、ワイヤ
ガイドを熱軟化性材料とすることで、樹脂封入時ワイヤ
ガイド表面の一部が軟化してボンディングワイヤを所定
位置に係止し、ワイヤ流れを防止している。According to the second aspect of the present invention, the wire guide is made of a thermosoftening material, so that a part of the surface of the wire guide is softened when the resin is encapsulated and the bonding wire is locked at a predetermined position. It prevents the flow.
【００１０】[0010]
【実施例】以下、この発明の一実施例を図面を参照して
説明する。図１および図２はこの実施例に係る樹脂封止
型半導体装置を示す図である。これらの図において、１
１は金属製のリードフレームのアイランド部を、１２は
このアイランド部１１を取り囲むように配設されたリー
ド部をそれぞれ示している。アイランド部１１には矩形
板状の半導体チップ１３（半導体装置）が搭載されてい
る。An embodiment of the present invention will be described below with reference to the drawings. 1 and 2 are views showing a resin-sealed semiconductor device according to this embodiment. In these figures, 1
Reference numeral 1 denotes an island portion of a metal lead frame, and 12 denotes a lead portion arranged so as to surround the island portion 11. A rectangular plate-shaped semiconductor chip 13 (semiconductor device) is mounted on the island portion 11.
【００１１】１４はワイヤガイドであって、このワイヤ
ガイド１４は半導体チップ１３を取り囲むようにアイラ
ンド部１１に固設されている。ワイヤガイド１４は大略
４辺からなる矩形の枠体で構成されている。このワイヤ
ガイド１４の各辺は、その断面が大略台形であって、そ
の上面は半導体チップ１３側が最も高く半導体チップ１
３の反対側が最も低くなるように緩やかに連続的に傾斜
した傾斜面（緩やかな湾曲面）で形成されている。ま
た、ワイヤガイド１４は熱軟化性の絶縁材料（樹脂）で
形成されている。Reference numeral 14 is a wire guide, and the wire guide 14 is fixed to the island portion 11 so as to surround the semiconductor chip 13. The wire guide 14 is composed of a rectangular frame body having approximately four sides. Each side of the wire guide 14 has a substantially trapezoidal cross section, and the top surface of the wire guide 14 is highest on the semiconductor chip 13 side,
It is formed by an inclined surface (gradually curved surface) that is gently and continuously inclined so that the opposite side of 3 becomes the lowest. The wire guide 14 is formed of a heat-softening insulating material (resin).
【００１２】さらに、このワイヤガイド１４の４つの傾
斜面にはワイヤガイド１４の幅方向に延びる溝１５が複
数本所定間隔で並んで形成されている。各溝１５は所定
の幅、深さを有しており、これらの溝１５内にはボンデ
ィングワイヤ１６が挿入・係止される。ボンディングワ
イヤ１６は例えば所定径の金線で形成され、一端が上記
半導体チップ１３の上面の端子部に、他端が上記リード
部１２にそれぞれボンディングされている。そして、こ
れらの半導体チップ１３、ワイヤガイド１４、および、
ボンディングワイヤ１６は、樹脂１７によって封止され
ている。Further, a plurality of grooves 15 extending in the width direction of the wire guide 14 are formed side by side at predetermined intervals on the four inclined surfaces of the wire guide 14. Each groove 15 has a predetermined width and depth, and a bonding wire 16 is inserted and locked in each groove 15. The bonding wire 16 is formed of, for example, a gold wire having a predetermined diameter, and one end thereof is bonded to the terminal portion on the upper surface of the semiconductor chip 13 and the other end is bonded to the lead portion 12. Then, these semiconductor chip 13, wire guide 14, and
The bonding wire 16 is sealed with resin 17.
【００１３】以上のように構成された半導体装置は、以
下の手順で作製される。すなわち、半導体チップ１３を
リードフレームのアイランド部１１にダイボンディング
した後、この半導体チップ１３の外周にこれを取り囲む
ようにワイヤガイド１４を配設する。この状態で金線の
ワイヤボンディングを行う。複数のボンディングワイヤ
１６の一端を半導体チップ１３の端子部に他端を各リー
ド部１２に接続する。このとき、各ボンディングワイヤ
１６はワイヤガイド１４の上面の各溝１５に挿入され
て、支持される。The semiconductor device configured as described above is manufactured by the following procedure. That is, after the semiconductor chip 13 is die-bonded to the island portion 11 of the lead frame, the wire guide 14 is arranged around the semiconductor chip 13 so as to surround the semiconductor chip 13. In this state, the gold wire is wire-bonded. One end of the plurality of bonding wires 16 is connected to the terminal portion of the semiconductor chip 13, and the other end is connected to each lead portion 12. At this time, the bonding wires 16 are inserted into and supported by the grooves 15 on the upper surface of the wire guide 14.
【００１４】さらに、モールド装置を用い、この状態で
所定の樹脂により半導体チップ１３、ワイヤガイド１
４、ボンディングワイヤ１６を封入・封止する。このと
き、ワイヤガイド１４は加熱されて軟化し、溝１５内に
挿入されたボンディングワイヤ１６を包み込む。この結
果、各ボンディングワイヤ１６の横方向への流れは完全
に阻止され、それらが接触することはない。また、所期
の間隔でボンディングワイヤ１６は配置されることとな
る。このとき、ボンディングワイヤ１６はワイヤガイド
１４に支持されており、封入樹脂の圧力に対する補強が
なされていることともなる。なお、この樹脂封入は詳細
には通常のトランスファ・モールドの手順にしたがって
なされる。例えば金型の予熱、リードフレームのセッ
ト、樹脂の投入、樹脂注入、樹脂の硬化、半導体装置
（ＬＳＩ）の取り出し、ファイナル・キュアである。Further, using a molding device, the semiconductor chip 13 and the wire guide 1 are made of a predetermined resin in this state.
4. Encapsulate and seal the bonding wire 16. At this time, the wire guide 14 is heated and softened to wrap the bonding wire 16 inserted in the groove 15. As a result, lateral flow of each bonding wire 16 is completely blocked and they do not come into contact. In addition, the bonding wires 16 are arranged at desired intervals. At this time, the bonding wire 16 is supported by the wire guide 14 and is reinforced against the pressure of the encapsulating resin. Incidentally, this resin encapsulation is carried out in detail according to the usual transfer molding procedure. For example, preheating of a mold, lead frame setting, resin injection, resin injection, resin curing, semiconductor device (LSI) removal, and final cure.
【００１５】なお、ワイヤガイドに溝に代えて突起を形
成して各ボンディングワイヤを係止するように構成して
もよい。要は、モールド時に各ボンディングワイヤ同士
が所期の間隔を維持できるように、ボンディングワイヤ
の横方向への移動を規制すればよい。さらに、ワイヤガ
イドは中空体で形成してもよい。The wire guide may be formed with a protrusion instead of the groove so that each bonding wire is locked. The point is that the lateral movement of the bonding wires may be regulated so that the bonding wires can maintain a desired distance during molding. Further, the wire guide may be formed as a hollow body.
【００１６】さらに、上記実施例に加えてこの発明に係
る樹脂封止型半導体装置にあっては、ワイヤガイドは、
半導体チップを取り囲むように設けることなく、ワイヤ
に対応する位置に設けるようにしてもよい。また、ワイ
ヤガイドは一体的に形成されるものに限られることな
く、複数個のものを個別に設けるように構成することも
できる。また、ワイヤガイドの溝は、その側壁がテーパ
状であればよく、ワイヤの溝への案内はこのテーパ面に
沿って行うことができる。なお、ワイヤガイドとしては
その外形が傾斜した形状のものに限られることはない。Further, in the resin-sealed semiconductor device according to the present invention in addition to the above-mentioned embodiment, the wire guide is
The semiconductor chip may not be provided so as to surround it, but may be provided at a position corresponding to the wire. Further, the wire guide is not limited to being integrally formed, and a plurality of wire guides may be individually provided. Further, the groove of the wire guide has only to have a tapered side wall, and the wire can be guided to the groove along the tapered surface. Note that the wire guide is not limited to the one having an inclined outer shape.
【００１７】[0017]
【効果】この発明によれば、ワイヤの流れを完全に防止
することができる。また、封入樹脂等の選定が容易であ
る。また、モールド時のプランジャのスピードを高める
ことができ、生産性を高めることができる。また、半導
体装置のファイン化が可能になる。さらに、ボンディン
グワイヤのロング化が可能になる。また、ボンディング
ワイヤの細線化が可能になり、コスト低減につながる。
また、モールド後の外観不良（ピンホール発生）を防止
することが可能となる。According to the present invention, the wire flow can be completely prevented. Further, selection of the encapsulating resin or the like is easy. Further, the speed of the plunger at the time of molding can be increased, and the productivity can be increased. Further, finer semiconductor devices can be realized. Further, it is possible to lengthen the bonding wire. Further, the bonding wire can be thinned, which leads to cost reduction.
In addition, it is possible to prevent a defective appearance (generation of pinholes) after molding.
【図１】この発明の一実施例に係る樹脂封止型半導体装
置の封止前の状態を示す斜視図である。FIG. 1 is a perspective view showing a state before encapsulation of a resin-encapsulated semiconductor device according to an embodiment of the present invention.
【図２】この発明の一実施例に係るモールド時の半導体
装置の一部を示す断面図である。FIG. 2 is a sectional view showing a part of a semiconductor device at the time of molding according to an embodiment of the present invention.
【図３】従来の樹脂封止型半導体装置の平面図である。FIG. 3 is a plan view of a conventional resin-sealed semiconductor device.
【図４】従来の樹脂封止型半導体装置の断面図である。FIG. 4 is a sectional view of a conventional resin-sealed semiconductor device.
１１ リードフレームのアイランド部、 １２ リードフレームのリード部、 １３ 半導体チップ、 １４ ワイヤガイド、 １５ 溝、 １６ ボンディングワイヤ、 １７ 封入樹脂。 11 lead frame island, 12 lead frame lead, 13 semiconductor chip, 14 wire guide, 15 groove, 16 bonding wire, 17 encapsulating resin.
Claims (2)
れた半導体チップと、 一端が半導体チップの端子部に他端がリードフレームの
リード部にそれぞれ接続されたボンディングワイヤと、 この半導体チップとリード部との間に設けられ、ボンデ
ィングワイヤを支持する絶縁性のワイヤガイドと、 これらの半導体チップおよびボンディングワイヤを封止
する樹脂からなる封入樹脂部と、を備えた樹脂封止型半
導体装置において、 上記ワイヤガイドの表面に、上記ボンディングワイヤを
係止する溝または突起を形成した樹脂封止型半導体装
置。1. A semiconductor chip mounted on an island portion of a lead frame, a bonding wire having one end connected to a terminal portion of the semiconductor chip and the other end connected to a lead portion of the lead frame, and the semiconductor chip and the lead portion. In the resin-sealed semiconductor device, the resin-sealed semiconductor device includes an insulative wire guide that is provided between the insulating wire guide and a sealing resin portion that seals the semiconductor chip and the bonding wire. A resin-encapsulated semiconductor device in which a groove or a protrusion for locking the bonding wire is formed on the surface of the guide.
れた半導体チップと、 一端が半導体チップの端子部に他端がリードフレームの
リード部にそれぞれ接続されたボンディングワイヤと、 この半導体チップとリード部との間に設けられ、ボンデ
ィングワイヤを支持する絶縁性のワイヤガイドと、 これらの半導体チップおよびボンディングワイヤを封止
する樹脂からなる封入樹脂部と、を備えた樹脂封止型半
導体装置において、 上記ワイヤガイドは封入樹脂により軟化する熱軟化性材
料で形成した樹脂封止型半導体装置。2. A semiconductor chip mounted on an island portion of a lead frame, a bonding wire having one end connected to a terminal portion of the semiconductor chip and the other end connected to a lead portion of the lead frame, and the semiconductor chip and the lead portion. In the resin-sealed semiconductor device, the resin-sealed semiconductor device includes an insulative wire guide that is provided between the insulating wire guide and a sealing resin portion that seals the semiconductor chip and the bonding wire. The guide is a resin-encapsulated semiconductor device made of a thermosoftening material that is softened by an encapsulating resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18487495A JPH0917912A (en) | 1995-06-27 | 1995-06-27 | Resin sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18487495A JPH0917912A (en) | 1995-06-27 | 1995-06-27 | Resin sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0917912A true JPH0917912A (en) | 1997-01-17 |
Family
ID=16160830
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18487495A Pending JPH0917912A (en) | 1995-06-27 | 1995-06-27 | Resin sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0917912A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100411156C (en) * | 2004-03-24 | 2008-08-13 | 三洋电机株式会社 | Resin-sealed semiconductor device and method of manufacturing the same |
-
1995
- 1995-06-27 JP JP18487495A patent/JPH0917912A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100411156C (en) * | 2004-03-24 | 2008-08-13 | 三洋电机株式会社 | Resin-sealed semiconductor device and method of manufacturing the same |
| US7709941B2 (en) | 2004-03-24 | 2010-05-04 | Sanyo Electric Co., Ltd. | Resin-sealed semiconductor device and method of manufacturing the same |
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