JPH09172059A - Chip tray for ic - Google Patents
Chip tray for icInfo
- Publication number
- JPH09172059A JPH09172059A JP32870995A JP32870995A JPH09172059A JP H09172059 A JPH09172059 A JP H09172059A JP 32870995 A JP32870995 A JP 32870995A JP 32870995 A JP32870995 A JP 32870995A JP H09172059 A JPH09172059 A JP H09172059A
- Authority
- JP
- Japan
- Prior art keywords
- chip tray
- face
- base
- metal layer
- static electricity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Packaging Frangible Articles (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【０００１】[0001]
【発明の技術分野】本願はＩＣ用チップトレイに関す
る。TECHNICAL FIELD The present application relates to an IC chip tray.
【０００２】[0002]
【従来の技術】従来のＩＣ用チップトレイには、ＩＣを
静電気等から保護するために、導電性プラスチックが用
いられていた。2. Description of the Related Art In a conventional IC chip tray, conductive plastic is used to protect the IC from static electricity.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、導電性
プラスチックでは十分な導電性を得ることが難しく、Ｉ
Ｃチップの包装作業や輸送作業の際にＩＣチップとＩＣ
チップトレイとの摩擦等によって生じる静電気により、
ＩＣが破壊されてしまうおそれがあった。However, it is difficult to obtain sufficient conductivity with a conductive plastic, and I
IC chips and ICs during C chip packaging and transportation
Due to static electricity generated by friction with the chip tray,
There was a risk that the IC would be destroyed.
【０００４】本願に係わる発明の目的は、ＩＣを静電気
から確実に保護することが可能なＩＣ用チップトレイを
提供することである。An object of the invention relating to the present application is to provide an IC chip tray capable of reliably protecting an IC from static electricity.
【０００５】[0005]
【課題を解決するための手段】そこで、ＩＣ用チップト
レイの基体の表面に金属層をコーティングすることによ
り、チップトレイ表面のシート抵抗を大幅に減少させ、
ＩＣを静電気から確実に保護できるようにした。さら
に、基体の表面を凸凹状に形成すれば金属層との密着性
が向上する。Therefore, by coating the surface of the substrate of the IC chip tray with a metal layer, the sheet resistance on the surface of the chip tray is greatly reduced,
The IC can be surely protected from static electricity. Further, if the surface of the substrate is formed in a rough shape, the adhesion with the metal layer is improved.
【０００６】[0006]
【実施例】図１は実施例を示した説明図であり、プラス
チック製の基体１の表面すなわちＩＣ３と接触する面に
アルミニウムを用いた金属層２がコーティングされてい
る。基体１の構成は通常のＩＣ用チップトレイと同様
に、境界部１ａによって「田」の字状に区切られてい
る。金属層２はアルミニウムを真空蒸着することにより
１μｍ程度の厚さに形成されている。基体１の表面（金
属層２が蒸着される面）はサンドプラスト処理等によっ
て凸凹状に形成されており、基体１と金属層２との密着
性が増すようにしてある。このように、金属層２を基体
１の表面にコーティングすることにより、従来の導電性
プラスチックを用いたＩＣ用チップトレイではＭΩオー
ダであったシート抵抗値をほぼ０Ω近くにまで低減する
ことができた。したがって、包装作業や輸送作業の際に
生じる静電気によってＩＣが破壊されることが大幅に低
減される。なお、図１では下側のＩＣ用チップトレイの
み描いてあるが、ＩＣを収納する際に下側ＩＣ用チップ
トレイと向かい合わさる上側ＩＣ用チップトレイについ
ても同様の構成をとることが好ましい。EXAMPLE FIG. 1 is an explanatory view showing an example, in which a surface of a plastic substrate 1, that is, a surface in contact with an IC 3 is coated with a metal layer 2 made of aluminum. The structure of the base body 1 is divided into a "rice field" shape by the boundary portion 1a as in the case of a normal IC chip tray. The metal layer 2 is formed to have a thickness of about 1 μm by vacuum-depositing aluminum. The surface of the substrate 1 (the surface on which the metal layer 2 is vapor-deposited) is formed in an uneven shape by sand plast treatment or the like, so that the adhesion between the substrate 1 and the metal layer 2 is increased. Thus, by coating the surface of the substrate 1 with the metal layer 2, it is possible to reduce the sheet resistance value, which is on the order of MΩ in the conventional IC chip tray using the conductive plastic, to about 0Ω. It was Therefore, the destruction of the IC due to the static electricity generated during the packaging work and the transportation work is significantly reduced. Although only the lower IC chip tray is illustrated in FIG. 1, it is preferable that the upper IC chip tray, which faces the lower IC chip tray when storing the IC, has the same configuration.
【０００７】[0007]
【発明の効果】本願に係わる発明では、ＩＣ用チップト
レイの基体の表面（基体のＩＣと接触する面）に金属層
をコーティングしたので、金属層がコーティングされた
面のシート抵抗を大幅に減少させることができ、ＩＣを
静電気から確実に保護することが可能となる。また、基
体の表面（基体のＩＣと接触する面）を凸凹状に形成し
た場合には、基体と金属層との密着性を向上させること
が可能となる。According to the invention of the present application, since the metal layer is coated on the surface of the substrate of the IC chip tray (the surface of the substrate that contacts the IC), the sheet resistance of the surface coated with the metal layer is greatly reduced. Therefore, the IC can be reliably protected from static electricity. Further, when the surface of the base (the surface of the base that comes into contact with the IC) is formed in an uneven shape, the adhesion between the base and the metal layer can be improved.
【図１】本願の実施例を示した説明図。FIG. 1 is an explanatory diagram showing an example of the present application.
１ 基体 ２ 金属層 1 substrate 2 metal layer
Claims (4)
ことを特徴とするＩＣ用チップトレイ。1. A chip tray for an IC, wherein a surface of a substrate is coated with a metal layer.
ることを特徴とする請求項１に記載のＩＣ用チップトレ
イ。2. The chip tray for an IC according to claim 1, wherein the surface of the base is formed in an uneven shape.
ティングしたことを特徴とするＩＣ用チップトレイ。3. A chip tray for an IC, characterized in that a surface of the substrate which comes into contact with the IC is coated with a metal layer.
形成されていることを特徴とする請求項３に記載のＩＣ
用チップトレイ。4. The IC according to claim 3, wherein a surface of the base body which comes into contact with the IC is formed in an uneven shape.
Chip tray for.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32870995A JPH09172059A (en) | 1995-12-18 | 1995-12-18 | Chip tray for ic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32870995A JPH09172059A (en) | 1995-12-18 | 1995-12-18 | Chip tray for ic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09172059A true JPH09172059A (en) | 1997-06-30 |
Family
ID=18213313
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32870995A Withdrawn JPH09172059A (en) | 1995-12-18 | 1995-12-18 | Chip tray for ic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09172059A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1536943A2 (en) * | 2002-09-03 | 2005-06-08 | Entegris, Inc. | High temperature, high strength, colorable materials for use with electronics processing applications |
| US6926937B2 (en) | 2002-09-11 | 2005-08-09 | Entegris, Inc. | Matrix tray with tacky surfaces |
| US7108899B2 (en) | 2002-09-11 | 2006-09-19 | Entegris, Inc. | Chip tray with tacky surface |
| JP2010040681A (en) * | 2008-08-04 | 2010-02-18 | Seiko Npc Corp | Chip storage tray |
| JP2011155068A (en) * | 2010-01-26 | 2011-08-11 | Oki Semiconductor Co Ltd | Method of manufacturing semiconductor device, and substrate housing structure |
| JP2017152697A (en) * | 2016-02-25 | 2017-08-31 | コスタット，インク． | Semiconductor housing tray and cover for semiconductor housing tray |
-
1995
- 1995-12-18 JP JP32870995A patent/JPH09172059A/en not_active Withdrawn
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1536943A2 (en) * | 2002-09-03 | 2005-06-08 | Entegris, Inc. | High temperature, high strength, colorable materials for use with electronics processing applications |
| EP1536943A4 (en) * | 2002-09-03 | 2005-12-28 | Entegris Inc | High temperature, high strength, colorable materials for use with electronics processing applications |
| US6926937B2 (en) | 2002-09-11 | 2005-08-09 | Entegris, Inc. | Matrix tray with tacky surfaces |
| US7108899B2 (en) | 2002-09-11 | 2006-09-19 | Entegris, Inc. | Chip tray with tacky surface |
| JP2010040681A (en) * | 2008-08-04 | 2010-02-18 | Seiko Npc Corp | Chip storage tray |
| JP2011155068A (en) * | 2010-01-26 | 2011-08-11 | Oki Semiconductor Co Ltd | Method of manufacturing semiconductor device, and substrate housing structure |
| JP2017152697A (en) * | 2016-02-25 | 2017-08-31 | コスタット，インク． | Semiconductor housing tray and cover for semiconductor housing tray |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20030304 |