JPH01161732A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH01161732A
JPH01161732A JP32217487A JP32217487A JPH01161732A JP H01161732 A JPH01161732 A JP H01161732A JP 32217487 A JP32217487 A JP 32217487A JP 32217487 A JP32217487 A JP 32217487A JP H01161732 A JPH01161732 A JP H01161732A
Authority
JP
Japan
Prior art keywords
film
metal wiring
semiconductor device
resin
wirings
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32217487A
Other languages
Japanese (ja)
Inventor
Chukichi Adachi
安達 忠吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP32217487A priority Critical patent/JPH01161732A/en
Publication of JPH01161732A publication Critical patent/JPH01161732A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent a passivation film from cracking due to thermal stress and metal wirings from deforming without altering the width of metal wirings and to supply a large current by forming a predetermined number of grooves on an insulating film, and forming metal wirings having a wide width on the film including the groove. CONSTITUTION:In a semiconductor device in which metal wirings 3 having wide width is formed through an insulating film 2 on a semiconductor substrate 1, a passivation film 4 is further formed on the wirings 3 and the overall is sealed with resin 5, a predetermined number of grooves 2a are formed on the film 2, and the wide wirings 3 are formed on the film 2 including the grooves 2a. For example, an oxide film 2 is formed on the substrate 1, two grooves 2a are formed on the film 2, the wide wirings 3 are formed on the film 2 including the groove 2a, and the surface is covered with the film 4. Thus, it can prevent the passivation film from cracking due to a stress from the sealing resin or the metal wirings from deforming.

Description

【発明の詳細な説明】 〔産業上の利用分野〕この発明は、保護膜であるパッシ
ベーション膜のクラックや、このバッジベージロン膜で
保護される金属配線の変形を防止した樹脂封止形半導体
装置に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a resin-sealed semiconductor device that prevents cracks in a passivation film, which is a protective film, and deformation of metal wiring protected by this badge-vagelon film. It is related to.

〔従来の技術〕[Conventional technology]

第2図は従来の樹脂封止形半導体装置を示す断面図で、
半導体基板1の上に平面状に絶縁膜である酸化膜2が形
成され、この酸化膜2の上に装置内の回路配線用の金属
配線3が形成され、さらに、金属配線3の表面に水分や
不純物の浸入を防ぐバッジベージコン膜4が設けられた
後、封止樹脂5により装置が樹脂封止される。この金属
配線3に大電流を供給す装置内配線では、この大電流に
よる欠陥を防ぐため、電流密度を小さくする必要があり
、このために広い面積の配線層を設ける必要があり、か
つ幅の広い金属配線3が必要であった。
FIG. 2 is a cross-sectional view showing a conventional resin-sealed semiconductor device.
An oxide film 2, which is an insulating film, is formed in a planar manner on a semiconductor substrate 1, a metal wiring 3 for circuit wiring in the device is formed on this oxide film 2, and moisture is removed from the surface of the metal wiring 3. After the badge-containing film 4 for preventing the infiltration of impurities is provided, the device is sealed with a sealing resin 5. In the wiring within the device that supplies large current to the metal wiring 3, it is necessary to reduce the current density in order to prevent defects caused by this large current, and for this purpose it is necessary to provide a wiring layer with a wide area, and A wide metal wiring 3 was required.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の樹脂封止形半導体装置は以上のように構成されて
いるため、低温、高温の温度サイクルのような熱的スト
レスに伴うパッケージ素材である封止樹脂5の熱膨張、
収縮による応力によってバッジベージコン膜4のクラッ
クの発生や、金属配線3の変形を引きおこすという問題
点があり、これは半導体基板周辺における幅の広い配線
層が形成された場合に顕著である。
Since the conventional resin-sealed semiconductor device is configured as described above, thermal expansion of the sealing resin 5, which is the package material, due to thermal stress such as low-temperature and high-temperature cycles,
There is a problem in that the stress caused by shrinkage causes cracks in the badge-container film 4 and deformation of the metal wiring 3, and this is noticeable when a wide wiring layer is formed around the semiconductor substrate.

この発明は、上記の問題点を解消するためになされたも
ので、金属配線の幅を変えることなく、熱的ストレスに
よるパッシベーション膜のクラックや金属配線の変形が
起こらないようにし、かつ大電流の供給を可能にした樹
脂封止形半導体装置を得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and it prevents cracks in the passivation film and deformation of the metal wiring due to thermal stress without changing the width of the metal wiring, and also prevents the metal wiring from being deformed due to thermal stress. The purpose of this invention is to obtain a resin-sealed semiconductor device that can be supplied.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る樹脂封止形半導体装置は、半導体基板上
に形成された絶縁膜に所要数の凹形状溝を形成し、この
凹形状溝を含む絶縁膜上に幅の広い金属配線を形成した
ものである。
In the resin-sealed semiconductor device according to the present invention, a required number of concave grooves are formed in an insulating film formed on a semiconductor substrate, and a wide metal wiring is formed on the insulating film including the concave grooves. It is something.

(作用) この発明における半導体装置は、絶縁膜に凹形状溝を形
成し、この凹形状溝を含む絶縁膜上に金属配線を形成し
たことから、絶縁膜上の金属配線およびパッシベーショ
ン膜が凹凸構造になるため、パッシベーション膜および
金属配線に加わるストレスを分散し、パッシベーション
膜のクランクや金属配線の変形が防止される。
(Function) In the semiconductor device of the present invention, a concave groove is formed in an insulating film, and a metal wiring is formed on the insulating film including the concave groove, so that the metal wiring and the passivation film on the insulating film have a concave-convex structure. Therefore, stress applied to the passivation film and metal wiring is dispersed, and cranking of the passivation film and deformation of the metal wiring are prevented.

〔実施例〕〔Example〕

以下、この発明の一実施例を第1図について説明する。 An embodiment of the present invention will be described below with reference to FIG.

第1図に示すように、半導体基板1上に酸化膜(絶縁膜
)2を形成し、この酸化膜2に、凹形状溝2aを所要数
、例えば2個形成し、この凹形状溝2aを含む酸化膜2
上に金属配線3を形成し、この金属配線3の表面を保護
するためにパッシベーション膜4で覆う。
As shown in FIG. 1, an oxide film (insulating film) 2 is formed on a semiconductor substrate 1, and a required number of concave grooves 2a, for example two, are formed in this oxide film 2. Oxide film 2 containing
A metal wiring 3 is formed thereon and covered with a passivation film 4 to protect the surface of the metal wiring 3.

これにより基板周辺にそって大電流を供給するために広
い面積の金属配線3を設けた場合にも熱的ストレスによ
って、パッシベーション膜4に加わる封止樹脂5からの
応力が分散され、パッシベーション膜4のクラックや、
金属配線3の変形を防止することができる。
As a result, even when a metal wiring 3 with a wide area is provided along the periphery of the substrate to supply a large current, the stress from the sealing resin 5 applied to the passivation film 4 due to thermal stress is dispersed, and the passivation film 4 cracks and
Deformation of the metal wiring 3 can be prevented.

(発明の効果) 以上説明したように、この発明は半導体基板上に形成し
た絶縁膜上に所要数の凹形状溝を形成し、この凹形状溝
を含む前記絶縁膜上に前記幅の広い金属配線を形成した
ので、封止樹脂からの応力によってパッシベーション膜
にクラックが入ったり、金属配線が変形したりすること
がなくなり、マスクパターンを変更するだけで、信頼性
の高い半導体装置が得られる効果がある。
(Effects of the Invention) As explained above, the present invention forms a required number of concave grooves on an insulating film formed on a semiconductor substrate, and places the wide metal on the insulating film including the concave grooves. Since the wiring is formed, the stress from the sealing resin will not cause cracks in the passivation film or deformation of the metal wiring, and a highly reliable semiconductor device can be obtained by simply changing the mask pattern. There is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例を示す半導体装置の断面図
、第2図は従来の半導体装置を示す断面図である。 図において、1は半導体基板、2は酸化膜、2aは凹形
状溝、3は金属配線、4はパッシベーション膜、5は封
止樹脂である。 なお、各図中の同一符号は同一または相当部分を示す。 代理人 大 岩 増 雄    (外2名)第1図 第2図 手続補正書(自発) 昭和  マ  9月  6日 1、事件の表示   特願昭62−:(22174号2
・発明)名称   樹脂封止形半導体装置3、補正をす
る者 代表者志岐守哉 三菱電機株式会社内 (連絡先03(213) 3421特許部)5、補正の
対象 明細書の特許請求の範囲の欄および発明の詳細な説明の
、欄 6、補正の内容 (1)明細書の特許請求の範囲を別紙のように補正する
。 (2)明細書第1頁12行と13行の間に[〔産業上の
利用分野〕)を挿入する。 (3)同じく第1頁13行の「〔産業上の利用分野〕)
を削除する。 (4)同じ(第1頁14〜15行の[パッジベージロン
膜]を、「パッシベーション膜」と補正する。 (5)同じく第4頁16行の「前記」を削除する。 以上 2、特許請求の範囲 半導体基板上に絶縁膜を介して幅の広し1金属配綿が形
成され、さらに、乙の金属配線上(こ)(ツシベーショ
ン戻が形成され、全体力り樹IN封止された半導体装置
において、前記絶縁膜上(こ所要数の凹形状溝を形成し
、この凹形状溝を含む前記絶縁III上に前記幅の広い
金属配線を形成したことを特徴とする樹脂封止形半導体
装置。
FIG. 1 is a sectional view of a semiconductor device showing an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. In the figure, 1 is a semiconductor substrate, 2 is an oxide film, 2a is a concave groove, 3 is a metal wiring, 4 is a passivation film, and 5 is a sealing resin. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (2 others) Figure 1 Figure 2 Procedure amendment (voluntary) Showa Ma September 6 1, case description Patent application 1986-: (22174 No. 2)
・Invention) Name Resin-encapsulated semiconductor device 3, Person making the amendment Representative Moriya Shiki Mitsubishi Electric Corporation (Contact information: 03 (213) 3421 Patent Department) 5, Claims of the specification to be amended Column and Detailed Description of the Invention, Column 6, Contents of Amendment (1) The claims of the specification are amended as shown in the attached sheet. (2) Insert [[Industrial Application Field]] between lines 12 and 13 on page 1 of the specification. (3) Also on page 1, line 13, “[Industrial application field]”
Delete. (4) Same (correct the word "passivation film" in lines 14-15 of page 1 to "passivation film". (5) Delete "the above" in line 16 of page 4. A wide metal wafer is formed on the semiconductor substrate via an insulating film, and a sintering layer is formed on the metal wiring, and the entire semiconductor is encapsulated in an insulating material. In the resin-sealed semiconductor device, a required number of concave grooves are formed on the insulating film, and the wide metal wiring is formed on the insulation III including the concave grooves. .

Claims (1)

【特許請求の範囲】[Claims]  半導体基板上に絶縁膜を介して幅の広い金属配線が形
成され、さらに、この金属配線上にパッシベーションが
形成され、全体が樹脂封止された半導体装置において、
前記絶縁膜上に所要数の凹形状溝を形成し、この凹形状
溝を含む前記絶縁膜上に前記幅の広い金属配線を形成し
たことを特徴とする樹脂封止形半導体装置。
In a semiconductor device in which a wide metal wiring is formed on a semiconductor substrate via an insulating film, passivation is further formed on the metal wiring, and the whole is sealed with resin.
A resin-sealed semiconductor device characterized in that a required number of concave grooves are formed on the insulating film, and the wide metal wiring is formed on the insulating film including the concave grooves.
JP32217487A 1987-12-17 1987-12-17 Resin-sealed semiconductor device Pending JPH01161732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32217487A JPH01161732A (en) 1987-12-17 1987-12-17 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32217487A JPH01161732A (en) 1987-12-17 1987-12-17 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH01161732A true JPH01161732A (en) 1989-06-26

Family

ID=18140764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32217487A Pending JPH01161732A (en) 1987-12-17 1987-12-17 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH01161732A (en)

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