JPH09160797A - Method for transferring data to plural modules - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate the setting alteration and improve the transfer efficiency by making it possible to transfer a command to plural pins for executing the same command at the same time. SOLUTION: Each module 105 to be controlled receives a command, instructed by a host computer 101, through a bus line and performs desired setting. At this time, pins to receive the same command are selectively set in advance and then the command is transferred to the pins at the same time. Namely, plural pins are sectioned by a specific number (number of bits of 2nd bus 102, e.g. 16) and grouped and data for setting pins made to receive the command, group by group, as acceptors are transferred as one unit. When there are 256 pins in total and the 2nd bus has 16-bit constitution, setting of 16 pins can be done by single data transfer and the setting is completed by performing data transfer 16 times. After the setting of the acceptors is completed, the command is transferred to them at the same time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a command to be executed by each pin in a semiconductor tester having a structure (per-pin architecture) capable of receiving a command for each pin electronics (hereinafter referred to as "pin"). Transfer method. More specifically, the present invention relates to a transfer method capable of collectively sending commands for setting specified pins to have the same setting.

[0002]

2. Description of the Related Art A functional test of ICs, PC boards, etc. determines the pass or fail by supplying a desired signal to the terminal, measuring the signal appearing at the terminal in response, and comparing the value with an expected value. It is performed by a series of operations to do. The miniaturization of semiconductor technology in recent years has been remarkable, and along with it, as semiconductor parts have become more functional and have more pins, the amount of data required for testing at the time of manufacturing thereof has become enormous. As described above, when the amount of data required for the test increases, the time required to transfer the test data from the test control device (host computer or the like) to the controlled module increases. Therefore, especially in the manufacturing line, there is a demand to shorten the time required for product inspection as much as possible, and for that purpose, it is necessary to shorten the time required for each measurement item as much as possible. However, increasing the amount of test data and increasing the test speed due to the increase in the number of pins are contradictory requirements, and realization is extremely difficult.

In order to solve the problem of the transfer time of the test data, conventionally, the transfer speed of the data transfer path from the control device to the controlled module is increased or the memory capacity of the controlled module is increased. And so on. However, with such a solution, there are problems such as cost, and there is a limit to the reduction of the data transfer time.

In order to solve these problems,
As described in Japanese Patent Application No. 1-110939, “Test data compression method”, there is also a method of compressing and transferring test data, expanding it in a controlled module, and then using it. In the invention, the test data is composed of the expected input value, the output waveform format, the input / output timing number, and the like. Regarding the output waveform format and the input / output timing number, which have a low change frequency, only the change points Data is compressed by recording to shorten the data transfer time. However, this method is intended to reduce the redundant part in the data transfer to one controlled module, and the efficiency in transferring the same data to a plurality of controlled modules has not been achieved.

As described above, in the conventional semiconductor tester, each controlled module (since the controlled module and the pin have a one-to-one correspondence, both will be simply referred to as pins hereinafter) is set to the same setting. However, I could only send the same command repeatedly to all pins, or the same setting command to all pins. Therefore, there is a problem in that the same command must be sent to a plurality of pins to change the setting, and it takes extra time to change the setting.

[0006]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to enable transfer of a command to a plurality of pins that execute the same command at the same time, and to easily change the setting. It is to provide a good data transfer method.

[0007]

In order to solve the above problems, in the present invention, a pin to receive the same command is selectively set in advance, and then the command is simultaneously transferred to the pin. Method. That is, the plurality of pins are divided into a predetermined number (the number of bits of the second bus, 16 in one embodiment of the present invention) and divided into several groups, and the pins for which commands are to be received are grouped into groups. Data to be set as an acceptor is transferred as one unit (If there are 256 pins in total and the second bus has 16 bits, 16 pins can be set by one data transfer. When acceptor setting is completed by transfer), and when acceptor setting is completed, commands are simultaneously transferred to them. In addition, a command to release or set the acceptor for all pins is provided, a mode for transferring a command to a single pin, or a mode for simultaneously transferring the same command to all pins. It is also possible to provide such as.

[0008]

An embodiment according to the present invention will be described in detail below. In the semiconductor tester shown in FIG. 1, the host computer 101 and the controlled module 105 are connected to the first bus 103.
To the second bus 102 and the control line 104. Each controlled module receives the command instructed by the host computer through the bus line and makes the desired settings. Then, in response to a test start command from the host computer, each controlled module supplies a signal to each corresponding pin to start the test of the DUT 106. It should be noted that the host computer, each controlled module, the physical connection form between them, the signal transmission / reception between them, and the operation circuit thereof are well known to those skilled in the art, and the gist of the present invention is It is not directly related and will not be described further here.

As an addressing method using both the first bus and the second bus, a single-pin addressing mode, a multi-pin addressing mode,
It has four modes: universal addressing mode and multiple acceptor configuration mode. The function of each mode will be described in detail later.

As shown in FIG. 2, a command ID bit 201, a pin ID bit 202 and a transfer mode bit 203 are provided in the bits of the first bus. The command ID received by the pin is the command ID bit.
The bit is the pin ID that receives the command (in multiple acceptor configuration mode it indicates the value of the pin group and is ignored in universal addressing mode) and the transfer mode bit depends on which mode the transfer is A code indicating whether it is one is set. Since four transfer modes are provided in this embodiment, the transfer
Two bits are provided. Also, the pin ID bit is 8
Bits are provided so that 256 pins can be specified. Furthermore, 7 command ID bits are provided.
There are also 16 data bits 20 on the second bus.
4 is provided. Of course, the allocation of each bit can be changed depending on the scale of the system and the size of the bus, and the present invention is not limited to this embodiment. The same applies to the bus, which is not limited to this embodiment.
It may be configured by one bus or may be configured by a bus divided into three or more.

The function of each mode will be described in detail below.
Single pin addressing mode is used when transferring commands to only one pin. When the transfer bit indicates single pin addressing mode,
The command indicated by the command ID bit is transferred only to the pin designated by the ID bit.

The universal addressing mode is used when transferring the same command to all pins at the same time. The transfer bit is universal
When indicating the addressing mode, the value of the pin ID bit is ignored and all pins receive and execute the transferred command. This is effective when setting the same for all pins.

The multi-pin addressing mode is used when simultaneously sending commands to multiple pins designated as multiple acceptors (pins selected to receive the command). When the transfer bit indicates this mode, the value of the pin ID bit is ignored and only the pins previously designated as multiple acceptors in multiple acceptor configuration mode receive and execute the transferred command.

The multi-acceptor configuration mode is used to designate a plurality of pins as acceptors, which are desired to receive the same command at the same time. When the transfer bit indicates this mode, the desired pins selected are designated as acceptors. A method of designating an acceptor in this mode will be described later in detail. The pin designated by this mode receives and executes commands in the multi-pin addressing mode.

A method of designating a plurality of pins as acceptors in the multi-acceptor configuration mode will be described below with reference to the flow chart shown in FIG.

First, in the universal addressing mode, an acceptor release command (described later) is transferred, the acceptor is released, and all pins are left undesignated (401).

In order to specify the pin to receive the command as an acceptor, it is necessary to configure the command before transferring the command. However, if this configuration is performed for each pin, it is inefficient, and this is because It is divided into pin groups of a size, and pins are designated for each pin group.

For example, in the present embodiment, a value obtained by dividing the pin ID by 16 is called a pin group, and a value obtained by taking 16 modulo (corresponding to the lower 4 bits of the pin ID) is called a bit ID. . Then, each pin always belongs to any one pin group as shown in FIG. In this way, each pin can be represented by a pin group and a bit ID (402).

A pin group value of a pin to be designated is set in the command ID bit of the first bus, and at the same time, a bit of the pin to be designated on the second bus (bus width of this embodiment is 16 bits). Set the IDth bit up. (In this case, the pin ID bit is ignored.) In this way, by giving meaning to the bits of the second bus, a maximum of 16 pins (bus width) can be designated in one transfer in this embodiment. Is possible. In this way, each pin uses the data sent on the second bus when the value of the command ID bit sent in multiple acceptor configuration mode matches the pin group value to which it belongs. By reading the bit at the bit ID, it is judged whether or not the user becomes an acceptor (403).

Each pin set as an acceptor receives the same command in the multiple pin addressing mode (404). In this case, the command data is set in the command ID bit of the first bus. At this time, the pin ID bit is ignored and only the pin set as the acceptor receives the command.

As described above, when the same command is transferred to a plurality of pins, a plurality of acceptors are designated in the plurality of acceptor configuration modes, and a plurality of pin
Although the method of transferring commands in the addressing mode is effective, the minimum number of pins when the transfer efficiency is improved by using this mode will be calculated below.

For example, the maximum number of pins of a semiconductor tester is 25
6 if the second bus is 16 bits, then 16
Since it can be divided into pin groups, designation of a plurality of acceptors is completed in 16 transfers. Therefore, according to the formula shown below, the minimum number of pins for which the transfer efficiency is increased is shown in Table 1 with respect to the number of commands to be transferred to each designated acceptor. MinPin = (16+ (number of transfer commands)) / number of transfer commands In most cases, five or six commands have to be sent for setting for measurement, so as can be seen from the table,
This method is effective when four or more pins have the same setting.

[0023]

[Table 1]

The commands for setting the pins are transferred using each of the above-described modes. In addition to these commands, an acceptor release command and an acceptor designation command are prepared. . The acceptor release command releases a pin that has already been designated as an acceptor and puts it in a non-designated state. That is, when this command is sent in the universal addressing mode, all pins are unspecified. Further, the acceptor designation command is a command that, when sent in the universal addressing mode or the single pin addressing mode, sets the pin designated in that mode as an acceptor.

By using these commands, other transfer methods are possible depending on the number of pins set as acceptors. For example, most pins are set as acceptors and only a few pins are excluded from the setting.First, the acceptor specification command is transferred in the universal addressing mode, and then the single pin addressing mode is set. At, the acceptor release command is transferred to each pin to be excluded from designation, and the setting of the desired acceptor is completed. Then, the setting command is transferred at once in the multi-pin addressing mode. In this way, it is possible to make flexible settings depending on the situation.

[0026]

As described above in detail, according to the present invention, when data for performing the same setting for a plurality of pins is transferred, the data can be selectively transmitted to any desired number of desired pins. Since it can be transferred, there is an effect that the setting can be changed without spending extra time when changing the setting.

[Brief description of the drawings]

FIG. 1 is a block diagram of a semiconductor test system to which an embodiment of the present invention is applied.

FIG. 2 is a diagram showing bit assignment of a first bus and a bit line according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating a method of dividing a selected controlled module into pin groups according to an embodiment of the present invention.

FIG. 4 is a flowchart showing steps of a method of selectively transferring data to only desired plural pins in an embodiment of the present invention.

[Explanation of symbols]

 101: Host computer 102: Second bus 103: First bus 104: Control line 105: Controlled module 106: DUT 201: Command ID bit 202: Pin ID bit 203: Transfer mode bit 204: Data ·bit

Claims (4)

[Claims] 1. A method of transferring data to a plurality of modules, which comprises the following steps (a) and (b): (a) A plurality of controlled modules are divided into a predetermined number and divided into several groups. A step of dynamically specifying a controlled module to receive a command in advance for each group; (b) a step of simultaneously sending data to the controlled module specified in the step. 2. In the step (a), data representing a value obtained by dividing the number of each controlled module by the predetermined number is set to a predetermined bit on the bus, and data representing the remainder is set on the bus. The method for transferring data to a plurality of modules according to claim 1, further comprising the step of setting a predetermined bit. 3. The method according to claim 1 or 2, which has the following modes (1) to (4), wherein data representing each mode is set in a predetermined bit on the bus. Data transfer method to a plurality of modules: (1) First mode for sending a command to a single controlled module; (2) Second mode for simultaneously sending the same command to all controlled modules; 3) A third mode for designating a controlled module that receives the same command at the same time; (4) A fourth mode for sending a command to a controlled module that has been designated in advance to receive the command. 4. The method according to claim 1, further comprising a step of canceling designation of receiving a command for all modules before the step (a). Data transfer method to multiple modules described in.