JPH09133693A - Waveform shaping circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a waveform shaping circuit which can always binarize alternating analog signals outputted from a rotation sensor with accuracy without relying upon interference noise nor the characteristics of the rotation sensor. SOLUTION: A waveform shaping circuit is provided with a first voltage dividing circuit 20 which can be changed in voltage dividing ratio based on set data D2 and D3 and a first threshold generating circuit 32 which is constituted so that the circuit 32 can generate a threshold current If having a prescribed frequency characteristic based on the voltage-converted signal Vfv corresponding to the frequency of a binarized signal Sout ad a comparative reference signal Vth by supplying the threshold current If to the voltage dividing resistor 20 and can change the frequency characteristic of the current If based on set data D0 and D1. When the data D0-D3 are appropriately set, the comparative reference signal Vth can be always set at a signal level which is suitable for the binarization of alternating analog signals Sin over the full region of the number of revolutions of an engine.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a waveform shaping circuit that binarizes an alternating analog signal input from a predetermined rotation sensor.

[0002]

2. Description of the Related Art Conventionally, in an electronic control system for an engine mounted in an automobile or the like, detection signals from various sensors for detecting the operating state of the engine are input to a microcomputer, and the microcomputer is based on these detection signals. Generates an injection signal for the fuel injection device, an ignition signal for the ignition device, and the like to perform engine control according to the operating state of the engine.

Then, the microcomputer needs to accurately grasp at least the rotational speed of the engine in order to properly determine the control amount and control timing of the injection signal and the ignition signal. Therefore, in such a system, as shown in FIG. 8, a signal rotor 102, which is attached to a rotary shaft that rotates in synchronization with a cam shaft of an engine and has protrusions formed at predetermined intervals, and the signal rotor 102. An electromagnetic pickup 10 arranged in the vicinity of 102 and configured by winding a coil around a core made of a magnetic material.
The rotation sensor 106 that outputs an alternating analog signal Sin induced in the electromagnetic pickup 104 by sequentially passing the protrusions near the electromagnetic pickup 104 as the signal rotor 102 rotates. A waveform shaping circuit 108 for shaping the waveform by binarizing the alternating analog signal Sin with a predetermined comparison reference value Vth is provided, and the binarized signal Sout output from the waveform shaping circuit 108 is supplied to a microcomputer. The signal rotor 10 is input from this binarized signal Sout.
The number of revolutions of 2, and hence the number of revolutions of the engine are calculated.

Then, in order to perform accurate binarization so that the binarized signal Sout accurately corresponds to the alternating analog signal Sin, the waveform shaping circuit 108 has the alternating analog signal Sin.
And a threshold value generation circuit 124 that generates a comparison reference signal Vth based on a binarized signal Sout output from the comparator 122. Moreover, the threshold generation circuit 124 has a hysteresis and is configured to generate the comparison reference value Vth in which the width of the hysteresis changes according to the frequency of the binarized signal Sout, that is, the engine speed. Has been. Here, as shown in FIG. 11, one level of the comparison reference value Vth is fixed, and the other level (hereinafter referred to as the threshold voltage Vf) is set according to the engine speed, that is, the frequency of the alternating analog signal Sin. The width of the hysteresis is changed by changing the width.

That is, as shown in FIG. 8, another rotation sensor 107, which is similarly formed by using the signal rotor 103 and the electromagnetic pickup 105, is the same as the rotation sensor 10 shown in FIG.
6, the electromagnetic pickup 104 of the rotation sensor 106 is affected by the signal rotor 103 of the other rotation sensor 107, and the interference noise N is superimposed as shown in FIG. 9A. Alternating analog signal Sin
Is output. If such an alternating analog signal Sin is binarized by a comparison reference signal Vth having a fixed level, for example, as shown in FIG. 9B, fluttering occurs at the time of level inversion of the binarized signal Sout. From such a binarized signal Sout, the engine speed cannot be accurately obtained, which in turn reduces the reliability of the electronic control system.

However, if the comparison reference signal Vth has hysteresis and the width of the hysteresis, that is, the hysteresis voltage Vf is set larger than the amplitude of the interference noise N, as shown in FIG. 9C, Binary signal Sou
The flapping of t can be reliably prevented, and
The engine speed can be accurately obtained from the binarized signal Sout.

It should be noted that the larger the threshold voltage Vf, the more reliably the influence of the interference noise N can be removed. However, the threshold voltage Vf is output from the electromagnetic pickup 104 to be binarized, that is, the alternating analog signal S.
It cannot be greater than the amplitude of in.

Moreover, the amplitude of the interference noise N and the output of the electromagnetic pickup 104 are as shown in FIG.
Generally, when the engine speed is relatively low, it increases substantially in proportion to the engine speed, and when the engine speed becomes higher than a certain level, the rate of increase with respect to the engine speed decreases, or conversely. It has the property of decreasing. That is, when the threshold voltage Vf is smaller than the amplitude of the interference noise N (region B), the interference noise N
The effect of the electromagnetic pickup 10 cannot be eliminated.
If it is larger than the output of 4 (area C), the output of the rotation sensor 106 cannot be binarized. Therefore, the threshold voltage Vf is changed according to the engine speed so that the threshold voltage Vf, that is, the width of the hysteresis is always within the range between the regions B and C.

[0009]

However, the interference noise N
Characteristic (shape of area B) changes due to the arrangement with other rotation sensors, and the output characteristic (shape of area C) of the electromagnetic pickup 104 changes due to dispersion of the rotation sensor 106 alone. The optimum characteristic of the threshold voltage Vf differs depending on the electronic control system in which the arrangement of the peripheral devices is different, for example, the vehicle type in which the electronic control system is mounted is different. That is, it is necessary to prepare the waveform shaping circuit 108 having different characteristics of the threshold voltage Vf for each system.
There was a problem that 8 could not be commonly used in each system.

Also, for example, interference noise N or noise may be generated by adding a new sensor or device to an electronic control system already installed in an automobile or changing the characteristics of the rotation sensor due to aging. If the output characteristic of the electromagnetic pickup 104 changes, the characteristic of the threshold voltage Vf set in advance will deviate from the optimum value, so that there is a problem that the accuracy of binarization deteriorates. .

The present invention has been made in order to solve the above problems.
An object of the present invention is to provide a waveform shaping circuit that can always binarize an alternating analog signal from a rotation sensor with high accuracy regardless of interference noise and characteristics of the rotation sensor.

[0012]

According to another aspect of the present invention, which is made to achieve the above object, the comparing means compares the alternating analog signal input from the rotation sensor with the determination signal. To generate a binarized signal.
The determination signal has two determination levels, large and small, and changes to a smaller determination level when the alternating analog signal is larger than the large determination level, and changes to a large determination level when the alternating analog signal is smaller than the small determination level. That is, it has hysteresis.

That is, even if noise having a smaller amplitude than the difference between the determination levels, that is, the width of the hysteresis, is superimposed on the alternating analog signal, the level fluttering occurs near the inversion of the level of the binarized signal. There is no such thing. Moreover, the determination signal generating means for generating the determination signal based on the binarized signal from the comparing means changes the difference between the two determination levels of the determination signal according to the frequency of the alternating analog signal, and The frequency characteristic can be changed by a setting signal input from the outside.

Therefore, according to the waveform shaping circuit of the present invention,
The difference between the two judgment levels of the judgment signal is always larger than the amplitude of the noise superimposed on the alternating analog signal,
By setting the frequency characteristic, the alternating analog signal can be accurately binarized without being affected by noise by using this determination signal.

Further, in the waveform shaping circuit of the present invention, even if the frequency characteristics of the interference noise are variously different depending on the usage environment of the waveform shaping circuit, the difference in the judgment level depends on the usage environment depending on the setting signal. Since the frequency characteristic of can be always set to the optimum one, it can be commonly and suitably used in various systems and devices.

Next, in the invention described in claim 2,
The basic signal generation means generates a basic signal having a magnitude proportional to the frequency of the alternating analog signal, and based on this basic signal, the first determination level generation means generates a first determination level having a predetermined frequency characteristic. At the same time, the second determination level generating means generates the second determination level which is the predetermined fixed level, thereby generating the determination signal in which the difference between the two determination levels has the predetermined frequency characteristic.

Then, in the first decision level generating means,
By limiting the upper limit and the lower limit of the basic signal by the level limiting means, the signal level of the basic signal becomes constant regardless of the frequency above the upper limit frequency and below the lower limit frequency. By amplifying, the rate at which the signal level of the basic signal changes in accordance with the frequency changes, and further, the level shift means shifts the signal level of the basic signal, whereby the operating range of the basic signal shifts.

Therefore, according to the waveform shaping circuit of the present invention,
Since at least one of the upper limit value and the lower limit value of the level limiting means, the amplification factor of the amplifying means, and the shift amount of the level shifting means can be changed according to the setting signal, the frequency of the first determination level is set. The characteristics can be changed according to characteristics such as interference noise.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing the overall configuration of an electronic control system for a four-cylinder engine to which the waveform shaping circuit of this embodiment is applied.

As shown in FIG. 2, the electronic control system is
The signal rotor 2 that rotates in synchronization with the camshaft of the four-cylinder engine, the rotation sensor 6 including the electromagnetic pickup 4 that detects the rotation of the signal rotor 2, and the alternating analog signal Sin input from the rotation sensor 6 are binary. The waveform is shaped by digitizing, and the binarized signal Sout is output as the waveform shaping output.
A waveform shaping circuit 8 for outputting a signal, an A / D converter 10 for A / D converting an analog signal corresponding to an engine water temperature or a battery voltage, which is input via another sensor (not shown) provided in each part of the engine, So-called on / off signals such as electric load signals that indicate the operating state of various electronic circuits for engine control, idle signals that indicate whether the throttle valve is in the idle position, starter signals that indicate whether the starter is operating, etc. Input buffer 12 for inputting and converting these signal levels to levels suitable for digital processing, and various signals obtained through waveform shaping circuit 8, A / D converter 10, and input buffer 12 are fetched at any time, and these various signals The engine condition is obtained from the injection condition, and an injection signal for a fuel injection device (not shown) or an ignition device is determined according to the obtained engine condition. (Not shown), a microcomputer 14 for executing a process of generating an ignition signal or the like, a process of transmitting setting data D0 to D3 for setting the characteristics of the waveform shaping circuit 8 to the waveform shaping circuit 8, and the like. ing.

Of these, the signal rotor 2 constituting the rotation sensor 6 has four protrusions 2 made of a magnetic material on its outer peripheral surface.
a, 2b, 2c and 2d are formed at equal intervals of 90 °. On the other hand, the electromagnetic pickup 4 is configured by winding a coil around a core made of a magnetic material, and is arranged near the signal rotor 2.

Then, as the signal rotor 2 rotates, the projections 2a to 2d sequentially pass in the vicinity of the electromagnetic pickup 4, and the magnetic flux passing through the coil changes accordingly. An alternating analog signal Sin corresponding to the rotation of 2 and the rotation of the engine is induced. This induced alternating analog signal S
in is input to the waveform shaping circuit 8.

Next, in the waveform shaping circuit 8, as shown in FIG. 1, the inverting input is connected to the input terminal Ti, the output is connected to the output terminal To, and the rotation sensor 6 is connected via the input terminal Ti.
The alternating analog signal Sin input from the binarizer is binarized to output a binary signal Sout to the microcomputer 14 via the output terminal To, and an alternating signal based on the binary signal Sout output from the comparator 22. The comparison reference signal generation circuit 23 for generating the comparison reference signal Vth for binarizing the analog signal Sin and the setting data D0 to D3 received from the microcomputer 14 are held and supplied to the comparison reference signal generation circuit 23. Setting circuit 36
, And is constituted.

The setting circuit 36 uses the setting data D0 to D0.
Register 36a for holding the value of D3 (see FIG. 4)
When the waveform shaping circuit 8 is powered on,
An initial value prepared in advance is set in the register 36a, and then the setting data D0 to D
When 3 is received, the set value of the register 36a is rewritten to the received value and the microcomputer 14
Is configured to send a confirmation signal ACK to.

Further, the comparison reference signal generation circuit 23, based on the binarized signal Sout from the comparator 22, generates the voltage conversion signal Vfv corresponding to the frequency and the F / V conversion circuit 24 and the binarized signal Sout. Is a high level, a dynamic hysteresis current Im having a predetermined crest value and having its level attenuated at a speed proportional to the voltage value of the voltage conversion signal Vfv is generated and output via the diode 26. Similarly to the generation circuit 28, when the binarized signal Sout is at a high level, a first threshold generation that generates a threshold current If whose level changes according to the voltage value of the voltage conversion signal Vfv and outputs it via the diode 30. The circuit 32 and the power supply voltage VDD are divided, and the dynamic hysteresis current Im and the threshold current If are voltage-divided. The value obtained by converting the value into a value and adding the divided voltage and the converted voltage is used as the alternating analog signal S.
The first voltage dividing circuit 20 which is applied to the non-inverting input of the comparator 22 as the comparison reference signal Vth for binarizing in.
And a second threshold generation circuit 34 that generates a predetermined voltage together with the first voltage dividing circuit 20 when the binarized signal Sout is at a low level and applies this as a comparison reference signal Vth to the non-inverting input of the comparator. It is composed by.

Of these, the second threshold generation circuit 3
4 includes a resistor 45 having one end connected to the non-inverting input of the comparator 22, a transistor Q7 having a collector connected to the other end of the resistor 45 and an emitter grounded, and a transistor Q7 which inverts the output of the comparator 22. When the binarized signal Sout is at a low level, the transistor Q7 is turned on and the non-inverting input of the comparator 22 is grounded via the resistor 45. A predetermined voltage determined by the resistance value of the voltage dividing circuit 20 of 1 and the resistance value of the resistor 45 is generated.

On the other hand, the first threshold generation circuit 32
1, the voltage conversion signal Vfv is applied to the base of the transistor Q1 whose emitter is grounded through the resistor 38, and the transistor Q2 whose emitter is connected to the base of the transistor Q1 and whose collector is grounded. When,
A second voltage dividing circuit 40 for dividing the power source voltage VDD by a predetermined voltage dividing ratio and applying it to the base of the transistor Q2; a transistor Q3 having a collector connected to the collector of the transistor Q1 and an emitter connected to the power source; The base is connected to the collector of transistor Q1 and the emitter is resistor 4
A transistor Q5 connected to the base of the transistor Q3 via a 2 and having a collector grounded; a base connected to the base of the transistor Q3; an emitter connected to the power supply; and a base current correction type with the transistors Q3 and Q5 and the resistor 42. Transistor Q4 that forms the mirror circuit of
, A collector of which is connected to the collector of the transistor Q4, an emitter of which is grounded, and a base of which is connected to the output of the inverting circuit 43 which inverts the binarized signal Sout, and the transistor Q6 which is connected in parallel with the predetermined current Ic. And a constant current circuit 44 for flowing the current.

The constant current circuit 44 and the second voltage dividing circuit 4
0 and the transistor Q2 correspond to the level limiting means in the present invention, the first voltage dividing circuit 20 corresponds to the level shifting means, and the transistor Q1, the resistor 38, and the first voltage dividing circuit 20 correspond to the amplifying means.

In the first threshold generation circuit 32 thus constructed, the transistor Q1 supplies a predetermined collector current Iref according to the voltage conversion signal Vfv. Since the transistors Q3, Q4, Q5 and the resistor 42 form a mirror circuit, the transistor Q4 also flows the collector current Iref similar to that of the transistor Q1.

Here, when the voltage level of the voltage conversion signal Vfv is small and the collector current Iref is less than or equal to the constant current Ic flowing through the constant current circuit 44, all the collector current Iref of the transistor Q4 is absorbed by the constant current circuit 44. , The threshold current If output from the first threshold generation circuit 32 becomes zero.

On the other hand, when the voltage level of the voltage conversion signal Vfv increases and the collector current Iref becomes larger than the constant current Ic, the current (Iref-Ic) subtracted by the constant current Ic from the collector current Iref becomes the threshold current If.
Becomes Then, when the voltage level of the voltage conversion signal Vfv further increases and becomes higher than the base voltage of the transistor Q2, that is, the output voltage Vb of the second voltage dividing circuit 40, the transistor Q2 is turned on and the voltage level of the voltage conversion signal Vfv. , The base voltage of the transistor Q1 is
The voltage is held at a constant voltage determined by the voltage division value of the voltage dividing circuit 40, and the collector current Iref and the threshold current If are also kept constant. In addition, 2 from the comparator 22
When the binarized signal Sout is at the low level, the transistor Q6 conducts, and the threshold current If
Outflow is prohibited.

Here, FIG. 3 is an electric circuit diagram showing the configuration of the first voltage dividing circuit 20, the second voltage dividing circuit 40, and the constant current circuit 44. As shown in FIG. 3, the constant current circuit 44
Is a constant current source 46 which receives a current from a terminal a connected to the collector of the transistor Q4 and flows a constant current Ic1.
And a switch SL which is turned on when the setting data D0 set in the register 36a of the setting circuit 36 is at a high level (= 1), and a constant current Ic2 is supplied by receiving a current from the terminal a through the switch SL. And a constant current source 48 that flows.

That is, as shown in FIG. 4A, when the switch SL is in the off state (D0 = 0), the collector current I
ref (dotted line in the figure) is the constant current value Ic1 that the constant current circuit 44 flows.
When a predetermined engine speed equal to is reached, the threshold current If starts to flow, and when the switch SL is in the ON state (D0 = 1), the collector current Iref becomes equal to the constant current value Ic1 + Ic2 at a predetermined engine speed. When it reaches, the threshold current If starts to flow.

The second voltage dividing circuit 40 has one end connected to the power supply and the other end connected to the resistor 50 (resistance value Ra) connected to the output terminal b to the base of the transistor Q2, and one end connected to the output terminal b. And a resistor 52 (resistance value Rb1) whose other end is grounded
And the setting data D1 set in the register 36a is High
A switch SH that is turned on at the level (= 1),
The resistor 54 (resistance value Rb2) has one end connected to the output terminal b through the switch SH and the other end grounded.

That is, the switch SH is in the off state (D1 =
The output voltage Vb {D1 = 0} at the time of 0) is expressed by the equation (1),
Output voltage V when switch SH is on (D1 = 1)
b {D1 = 1} is expressed by equation (2). Vb {D1 = 0} = VDD * Rb1 / (Ra + Rb1) ... (1) Vb {D1 = 1} = VDD * Rb / (Ra + Rb) ... (2) However, Rb = Rb1 * Rb2 / (Rb1 + Rb2) ), And Rb1
Since> Rb, when the switch SH is in the ON state,
The voltage applied to the base of the transistor Q2 becomes lower (Vb {D1 = 0}> Vb {D1 = 1}) than in the off state.

Then, as shown by the dotted line in FIG.
The voltage conversion signal Vfv is the output voltage V of the second voltage dividing circuit 40.
VH0 (= Vb {D1 = 0} + Vbe), VH1 (= Vb {D, which is larger than the voltage Vbe between the base and emitter of the transistor than b)
The collector current Iref becomes a constant value at a predetermined engine speed equal to or higher than 1 = 1} + Vbe).

As described above, the characteristic of the threshold current If is set by the setting data D0 and D1. Next, the first voltage dividing circuit 20 responds to the setting data D2 and D3.
Output SLij (i, j = 0,1, where i is D2 and j is D
(Representing the set value of 3), a selector 60 that selects any one of the switches S11 and S21 that is turned on when the output SL00 is selected, and a switch S12 that is turned on when the output SL01 is selected. S22 and output SL1
Switches S13 and S2 that are turned on when 0 is selected
3 and switches S14 and S24 which are turned on when the output SL11 is turned on, one end of which is connected to the power supply VDD and the other end of which is connected to the non-inverting input of the comparator 22 through the switches S11, S12, S13 and S14, respectively. Of the resistors 61 (resistance value R11, the same applies hereinafter), 63 (R
12), 65 (R13), 67 (R14), and resistors 62 (R21), 6 whose one end is connected to the output terminal c through switches S21, S22, S23, S24, respectively, and whose other end is grounded.
4 (R22), 66 (R23) and 68 (R24).

The resistance value of each resistor is expressed by the following equation (3).
It is set so as to satisfy the relationship of (8). R21 / (R11 + R21) = R22 / (R12 + R22) = K0 ... (3) (R11 / R21 = R12 / R22) R23 / (R13 + R23) = R24 / (R14 + R24) = K1 ... (4) (R13 / R23 = R14 / R24) K0> K1 ・ ・ ・ (5) R11 ・ K0 = R13 ・ K1 = α0 ・ ・ ・ (6) R12 ・ K0 = R14 ・ K1 = α1 ・ ・ ・ (7) α0> α1 ・ ・(8) Then, when the signal SLij is selected by the selector 60, the threshold current If and the first voltage dividing circuit 2
The threshold voltage Vf generated by 0 and is expressed by the following equation (9).

Vf {SLij} = VDD · Ki + If · αj (9) That is, as shown in FIG. 4B, the threshold voltage V
f is the threshold current If according to the first term of the equation (9).
The voltage value in the region A1 where zero is zero, that is, the lower limit value of the threshold voltage Vf is determined, and the slope of the region A2 in which the threshold current If linearly changes according to the engine speed by the second term, and further the threshold current If. Voltage value in the region A3 in which V is constant, that is, the threshold voltage V
The upper limit value of f is determined.

When the setting data D3 is fixed and only the setting data D2 (ie, i) is changed, only the value of the first term in the equation (9) changes, so that the slope of the area A2 should be changed. The characteristic of the threshold voltage Vf is not changed, and the setting data D2 is fixed and the setting data D3 is fixed.
If only (i.e., j) is changed, only the value of the second term is changed. Therefore, the slope of the area A2 and the upper limit of the threshold voltage Vf are changed without changing the lower limit of the threshold voltage Vf.

In FIG. 4B, the setting data D0 =
Although four characteristics obtained by fixing only 1 and D1 = 1 and changing only the setting data D2 and D3 are shown, 4 characteristics are similarly obtained for each combination of the setting data D0 and D1.
Since one characteristic can be realized, a total of 16 characteristics can be set.

As described above, by appropriately setting the setting data D0 to D3, the threshold voltage Vf, that is, 2
Comparison reference value V when the digitized signal Sout is at high level
th is set to a desired characteristic. That is, the binarized signal Sou
The comparison reference signal Vth when t is at a low level is fixed to a constant value by the second threshold generation circuit 34. Therefore, by changing the threshold voltage Vf, the width of the hysteresis of the comparison reference signal Vth is changed. It can be done.

By the way, the dynamic hysteresis generating circuit 28 is disclosed in Japanese Patent Application No. 6-
No. 211499, which is not a main part of the present invention, a detailed description thereof will be omitted. FIG. 5 shows a waveform diagram of the dynamic hysteresis current Im output from the dynamic hysteresis generation circuit 28. Show. That is, as shown in FIG. 5B, the dynamic hysteresis current Im has a predetermined peak value when the binarized signal Sout is inverted from the low level to the high level,
After that, the voltage is attenuated at a constant rate according to the voltage conversion signal Vfv,
It has a waveform that becomes zero after a predetermined time Tm. The peak value is constant regardless of the magnitude of the voltage conversion signal Vfv. Therefore, the larger the voltage conversion signal Vfv, that is, the larger the engine speed, the shorter the time Tm required for damping is. The peak value is always set to zero before the binarized signal Sout is inverted from the high level to the low level. Note that FIG. 5C shows the threshold current I
It is a waveform diagram of f, and as shown in the figure, the threshold current If becomes a level according to the voltage conversion signal Vfv when the binarized signal Sout is at a high level.

Therefore, in the comparison reference signal generating circuit 23,
As shown in FIG. 6A, the comparison reference signal Vth generated when the binarized signal Sout is at the high level has the hysteresis voltage Vf and the dynamic hysteresis current Im as the first value.
The dynamic hysteresis voltage Vf generated by flowing into the voltage dividing circuit 20 is added.

The dynamic hysteresis voltage Vm
Can be obtained by the following equation (10). Vm = Im · αi (10) As described above, the comparison reference voltage Vth is equal to the threshold voltage Vth.
Since it has hysteresis for f, it is possible to prevent malfunction due to interference noise N, and because the dynamic hysteresis voltage Vm is added, ignition noise, etc.
Even if the noise N1 having an amplitude larger than the threshold voltage Vf is superimposed on the alternating analog signal Sin, it does not malfunction as shown in FIG.
As shown in (c), the alternating analog signal Sin to be detected
It is possible to obtain a binarized signal Sout that correctly corresponds to

Next, the setting process of the setting data D0 to D3 executed by the microcomputer 14 will be described with reference to the flowchart shown in FIG. The setting process is repeatedly executed at a predetermined cycle after being executed in the initialization process that is performed immediately after the microcomputer 14 is powered on.

When this process is started, first, step 1
10, setting data D0 to D stored in the ROM in advance
3 is read, and in the following step 120, the read setting data D0 to D3 is transferred to the waveform shaping circuit 8, and the process proceeds to step 130. In step 130, it is judged whether or not there is a response by the confirmation signal ACK from the waveform shaping circuit 8,
If there is a response, this processing is ended as it is, and if there is no response, the routine proceeds to step 140, where abnormal processing is executed and then this processing is ended.

As the abnormality processing executed in step 140, for example, when the setting data D0 to D3 are retransmitted and there is still no response of the confirmation signal ACK, communication is performed to a predetermined area on the front panel (not shown). The driver may be informed of the abnormality by performing a display indicating the abnormality or sounding a buzzer (not shown).

As described above, according to the waveform shaping circuit 8 of the present embodiment, the characteristic of the threshold voltage Vf can be variously set by the setting data D0 to D3, so that the alternating analog signal Sout is set. Since it can be commonly used in various electronic control systems in which the characteristics of the superimposed interference noise N are different from each other and the optimum threshold voltage Vf can be set according to the system used, the alternating analog is always used. It is possible to supply the binarized signal Sout that exactly corresponds to the signal Sin, and it is possible to improve the control accuracy and reliability of the electronic control system.

After the waveform shaping circuit 8 of this embodiment is incorporated in the system, for example, the output of the rotation sensor 6 deteriorates for some reason, or a new rotation sensor is arranged near the rotation sensor 6. Even if the usage conditions change and the characteristics of the interference noise N change due to the above, the waveform shaping circuit 8 is not removed and the setting data D0 to D3 are simply changed without changing the setting data. It is possible to easily reset the optimum threshold voltage Vf according to the usage conditions.

Further, according to this embodiment, the setting data D
0 and D1 set the lower limit and the upper limit of the engine speed at which the threshold voltage Vf linearly changes according to the engine speed, and the set data D2 and D3 set the lower limit value of the threshold voltage Vf and the threshold voltage Vf. The slope of the characteristic of the region that changes linearly (by extension,
Since the upper limit value of the threshold voltage Vf) can be independently set, desired characteristics can be easily set.

In the above embodiment, a total of 4 bits of setting data D0 to D3 is used to set the characteristic of the threshold voltage Vf.
The number of bits may be increased to more than 1 bit, or the first voltage dividing circuit 20,
By fixing the value of either the second voltage dividing circuit 40 or the constant current circuit 44, it may be reduced to 3 bits or less.

In the above embodiment, the resistance of the first voltage dividing circuit 20 is switched by the setting data D3 to change the slope of the characteristic of the threshold voltage Vf in the area A2. This may be realized by changing the resistance value of the resistor 38 connected to the emitter of the transistor Q1 and changing the slope of the collector current Iref of the transistor Q1 with respect to the voltage conversion signal Vfv.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing an overall configuration of a waveform shaping circuit according to an embodiment.

FIG. 2 is a block diagram showing an overall configuration of an electronic control system.

FIG. 3 is a circuit diagram showing an adjustment circuit that adjusts the frequency characteristic of a determination signal.

FIG. 4 is an explanatory diagram showing how the frequency characteristic of a determination signal changes according to setting data.

FIG. 5 is an explanatory diagram showing an operation of a dynamic hysteresis generation circuit.

FIG. 6 is an explanatory diagram showing the operation of the waveform shaping circuit.

FIG. 7 is a flowchart showing a setting process executed by a microcomputer.

FIG. 8 is a block diagram showing a configuration of a conventional device.

FIG. 9 is an explanatory diagram showing a problem of the conventional device.

FIG. 10 is a graph showing a relationship between engine speed and threshold voltage.

FIG. 11 is an explanatory diagram showing the operation of the conventional device.

[Explanation of symbols]

2 ... Signal rotor 2a, 2b, 2c, 2d ... Protrusion 4 ... Electromagnetic pickup 6 ... Rotation sensor 8 ...
Waveform shaping circuit 10 ... A / D converter 12 ... Input buffer 14
... microcomputer 20 ... first voltage dividing circuit 22 ... comparator 23
... comparison reference signal generation circuit 24 ... F / V conversion circuit 26, 30 ... diode 28 ... dynamic hysteresis generation circuit 32 ... first
Threshold generating circuit 34 ... Second threshold generating circuit 36 ... Setting circuit 36a ... Registers 38, 42, 45, 50, 52, 54, 61-68 ... Resistor 40 ... Second voltage dividing circuit 43, 47 ... Inversion circuit 4
4 ... Constant current circuit 46, 48 ... Constant current source 60 ... Selector Q1, Q2, Q3, Q4, Q5, Q6, Q7 ... Transistor

Claims (2)

[Claims] 1. An alternating analog signal input from a predetermined rotation sensor and a large and small judgment level. When the alternating analog signal becomes larger than a large judgment level, it changes to a small judgment level, and when it becomes smaller than a small judgment level. A comparison unit that compares a judgment signal that changes to a larger judgment level to generate a binarized signal corresponding to the alternating analog signal, and a difference between the two judgment levels based on the binarized signal from the comparison unit. In a waveform shaping circuit, wherein the determination signal generating means generates a determination signal having a predetermined frequency characteristic with respect to the frequency of the alternating analog signal, and the determination signal generating means is set to an externally input setting signal. Accordingly, the waveform shaping circuit is configured so that the frequency characteristic of the difference between the two determination levels can be changed. 2. The determination signal generating means, a basic signal generating means for generating a basic signal having a magnitude proportional to the frequency of the alternating analog signal, and a level limiting means for limiting an upper limit value and a lower limit value of the basic signal. First determination level generating means for generating a first determination level having a predetermined frequency characteristic from the basic signal, the amplification means amplifying the basic signal, and level shifting means for shifting the signal level of the basic signal. And a second judgment level generating means for generating a second judgment level which is a predetermined fixed level, and an upper limit value of the level limiting means, an amplification factor of the amplifying means, and a shift amount of the level shifting means. The waveform shaping circuit according to claim 1, wherein at least one of them is configured to be changeable according to the setting signal.