JPH09129604A - Method of formation of microscopic pattern for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain sufficient resolution even on an existing exposing device by a method wherein the base layer is etched to the middle part, the second resist pattern is formed on a substrate leaving a resist pattern, and the base film is etched using the combined resist pattern as a mask. SOLUTION: One half of film thickness of a base layer 12 is etched off using the first resist pattern 15 as a mask, and the second resist film 16 is adhered thereto. The thickness of resist of the resist film formed by compounding the first and the second resist films is thickly formed on the first resist pattern 15, and thinly formed on the recessed part of the first resist pattern. Then, a prebaking operation is conducted, the resist film 16 is exposed, developed through the second resist pattern 17, and the second resist pattern 18 is formed. Then, a post baking operation is conducted, the remaining film of the base film is etched using the compounded resist pattern as a mask, and a contact hole 21 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a fine pattern on a semiconductor device.

[0002]

2. Description of the Related Art In the manufacture of semiconductor devices, fine patterns are mainly formed by photolithography and etching techniques. The photolithography technique is a process of transferring a mask pattern to a resist, and the etching technique is a process of processing a base film using the patterned resist as a mask.

As an example of the method of forming the fine pattern, a conventional method of forming a contact hole will be described.

FIG. 3 is a schematic vertical sectional view showing a conventional method of forming a contact hole. The formation of the contact hole is composed of the following five main steps using the photolithography technique and the etching technique.

A SiO ₂ film 12 is formed on a Si substrate 11. A resist 33 made of a photosensitive polymer is applied thereon. Then, prebaking is performed to remove the organic solvent contained in the resist film 33 (FIG. 3A).

The mask pattern 34 is transferred onto the resist film 33 by exposure (FIG. 3B).

The resist is developed to form a mask pattern 3
A resist pattern 35 having a concave portion 19 corresponding to 4 is formed. Then, post-baking is performed to evaporate the water content contained in the resist pattern 35, and the SiO ₂ film 12 is removed.
To improve the adhesion (Fig. 3 (c)).

Using the resist pattern 35 as a mask, the SiO ₂ film 12 is etched to form a contact hole 21 (FIG. 3 (d)).

Next, the resist pattern 35 that has become unnecessary
Are removed (FIG. 3 (e)).

FIG. 4 is a schematic vertical sectional view showing a conventional contact hole thus formed.

With higher integration of semiconductor devices, circuit patterns have become finer, and further fine processing technology is required. Regarding the photolithography technology, it is necessary to improve the resolution, and the improvement of the exposure apparatus and the development of materials are being promoted.

Improvements in the exposure apparatus have been made in the directions of increasing the lens aperture diameter, using a short wavelength exposure wavelength, and using a phase shift mask. The method using the phase shift mask is a method in which a shifter for changing the phase by 180 ° is provided in one of the adjacent openings on the mask to suppress the interference of light from the adjacent openings to improve the resolution.

As for the development of the resist material, the development of a high resolution resist, the contrast amplification material for light exposure: CE
Development of L (Contrast Enhanced Layer) materials is underway. The method using the CEL material has a CE having a much higher absorbance than the resist film on the resist film.
By coating the L film, only relatively strong light is transmitted and weak light is cut, and as a result, the contrast of the exposure image incident on the lower resist film is increased.

[0014]

However, when a phase shift mask is used, it has excellent fine workability and line width controllability, but it requires a considerable amount of cost to develop the mask.
Further, it is necessary to provide a phase shifter according to the pattern type, and it is difficult to correct the mask when a mask defect occurs.

When a CEL material is used, it is still excellent in fine workability, but there is a problem that the pattern dimension changes due to the film thickness variation of the CEL film due to the step difference in the underlying layer. Further, since the transmitted light is cut because of the CEL film, a large amount of exposure is required, the exposure time becomes long, and the throughput decreases. There is also a problem that the cost of the CEL material is high.

Thus, the phase shift mask and the CEL
As can be seen from the problems that the materials have, the improvement of these exposure apparatuses and the development of resist materials that increase the precision of microfabrication cause problems due to increased costs and new processes.

On the other hand, also in the etching technique, the decrease in yield due to the miniaturization of the pattern becomes more problematic. For example, in the case of a contact hole, when the hole diameter becomes smaller, it becomes difficult for the etching gas to enter, and the etching rate decreases. Therefore, if there are contact holes with different sizes, the etching rate will be different for each contact hole, and the etching time required to open each contact hole will be different even if the underlying film thickness is the same. The problem of further damage to the base film of the base film due to overetching occurs. Therefore, when designing a mask, a method of unifying the hole diameter to the minimum contact hole diameter is adopted, but since the number of fine contact holes increases, the yield of opening the contact holes decreases. Further, also in the subsequent metal film formation in the contact hole, it is difficult to form a film with good step coverage on the bottom of the fine contact hole, which further reduces the yield.

That is, if the fine processing is 0.5 μm or less, it becomes difficult to obtain a stable and sufficient resolution for pattern formation with an existing exposure apparatus, and a new exposure apparatus is improved and a resist material is developed. Also raises costs, creates new process problems, and makes process development difficult.

The present invention has been made in view of the above problems, and it is possible to obtain a sufficient resolution even with an existing exposure apparatus, and it is possible to form a fine pattern without significantly increasing the cost. It is an object of the present invention to provide a fine pattern forming method.

A further object of the present invention is to improve the yield when etching a fine pattern and the yield when forming a film in a fine pattern by improving the step coverage, and to improve the yield of a semiconductor device.

[0021]

The present inventors have found that a fine pattern can be formed by repeating a photolithography process and an etching process.

According to the method of forming a fine pattern of the present invention, a first resist pattern is formed on a substrate, the base film is etched halfway using the first resist pattern as a mask, and the first resist pattern is formed. A second resist pattern is formed on the remaining substrate, and the underlying film is further etched using the resist pattern in which the first resist pattern and the second resist pattern are combined as a mask. It has a feature.

A first resist pattern having a rectangular cross section is formed by a normal photolithography process. This first
The underlying film is etched to a predetermined depth using the resist pattern as a mask, and then a second resist film is applied.

Then, the second resist film is applied to the upper part of the first resist pattern and the concave portion between the first resist patterns. However, when the first resist film and the second resist film are overlapped, The resist is thick in the region of the first resist pattern, and the resist is thin in the concave portions between the first resist patterns. Since the resist film thickness can be changed depending on the location in this manner, the resist film thickness of the conventional resist film thickness can be secured as the resist film thickness of the region of the first resist pattern, and the resist film of the concave portion between the first resist patterns can be obtained. Can be made thinner than the film thickness of a conventional resist. Further, since the underlayer film is etched halfway and the remaining thickness of the underlayer film is thin, the resist film thickness required for etching can be further reduced.

Therefore, since the resist is thin in the recesses between the first resist patterns, the resolution at the time of exposure is improved, and a fine resist pattern can be formed in the recesses.

Further, according to the method of the present invention, the thickness of the underlying film on which the fine pattern is formed is the thickness after etching using the first resist pattern as a mask, which is thin. . Therefore, it is possible to suppress a decrease in yield due to variations in etching when forming a fine pattern.

Further, according to the method of the present invention, a cross-sectional shape in which a rough pattern and a fine pattern are stepped is formed on the base film. Due to this cross-sectional shape, the film can be formed with good step coverage in the subsequent film formation.

FIG. 2 is a schematic sectional view showing a contact hole formed by the method of the present invention. The contact hole 21 has a stepped shape, and the upper hole is wider than that of the conventional contact hole (FIG. 4), so that a metal film can be formed in the contact hole 21 with good step coverage.

When applying the second resist film, it is preferable to apply a low-viscosity resist at a high speed. By doing so, the resist film thickness in the case where the first resist film and the second resist film are overlaid is made thicker in the region of the first resist pattern and in the recessed region between the first resist patterns. It can be applied effectively as thin.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An example in which the method for forming a fine pattern of a semiconductor device according to the present invention is applied to the formation of contact holes will be described below with reference to the drawings. FIG. 1 is a schematic sectional view showing each step for explaining this fine pattern forming method.

Si substrate 1 on which SiO ₂ film 12 is formed
A first resist film 13 made of a photosensitive polymer is applied onto the first layer 1. Then, prebaking is performed to remove the organic solvent contained in the resist film 13 (FIG. 1A).

The resist film 13 is exposed through the first mask pattern 14. Then, a baking process (PEB process) is performed to alleviate the standing wave effect during exposure (FIG. 1).
(B)).

By developing, a first resist pattern 15 having a recess 19 is formed. Then, post-baking is performed to evaporate the water content contained in the resist to enhance the adhesion to the base film (FIG. 1 (c)).

By performing a far-ultraviolet light curing treatment (UV curing), the coating characteristics of the second resist film later are improved (FIG. 1 (d)).

Using the first resist pattern 15 as a mask, the underlying SiO ₂ film 12 is etched to a predetermined depth, for example, half the film thickness of the underlying SiO ₂ film 12 (FIG. 1).
(E)).

A second resist film 16 is applied (see FIG. 1).
(F)). The area around the upper part of the first resist pattern 15 is thin, but the other areas are coated with a substantially uniform resist film thickness. The combined resist film thickness of the first resist film and the second resist film is equal to the first resist pattern 1
The resist is thick in the fifth portion, and the resist is thin in the concave portion 19 between the first resist patterns. Then, prebaking is performed to remove the organic solvent contained in the resist.

The resist film 16 is exposed through the second mask pattern 17. Then, PEB treatment is performed to mitigate the standing wave effect (FIG. 1 (g)).

By developing, a second resist pattern 18 having a recess 20 is formed. Then, post-baking is performed to evaporate the water content contained in the resist to enhance the adhesion to the base film (FIG. 1 (h)).

Using the synthesized resist pattern as a mask, the remaining film amount of the underlying film is etched to contact the contact hole 2
1 is opened (FIG. 1 (i)).

Then, the unnecessary resist pattern 1
Remove 8,15.

The amount of etching the underlayer film using the first resist pattern as a mask is preferably 30 to 70% of the total amount of etching.

The reason is as far as etching is concerned.
If the etching amount is too small, the residual film amount of the underlying film during the subsequent etching by the synthesized resist pattern may be large, and the etching yield may be reduced. If the etching amount is too large, the first resist pattern may not be formed. This is because the base film may be completely etched depending on the location due to variations in etching during the etching by the etching.

As for the subsequent film formation, if the etching amount is too small, the contribution to the improvement of the step coverage during the film formation is small, and if the etching amount is too large, the etching by the first resist pattern is not performed. This is because the step coverage for the formed step portion deteriorates.

In applying the second resist film, since the thin film is applied to the recessed area between the resist patterns, the viscosity is 10 to 15 cp (resist application film thickness is 0.3 to
0.5 μm) low viscosity resist at 5000 rpm
Above all, it is preferable to apply at a high speed rotation of 6000 rpm or more. This is because if the rotation speed is slow, the resist is likely to accumulate in the recessed region and the resist film in the recessed region tends to be thick. However, the maximum speed of a normal device is 700
It is about 0 rpm.

[0045]

EXAMPLE An example in which the method for forming a fine pattern of a semiconductor device according to the present invention is applied to the formation of a contact hole will be specifically described below with reference to FIG.

PFX-1 manufactured by Sumitomo Chemical Co., Ltd. is formed on the Si substrate 11 on which the SiO ₂ film 12 is 0.8 μm thick.
5 resists (viscosity 25 cp) are applied at a rotation speed of 5000 rpm to form a first resist film 13 having a film thickness of 1.1 μm. Then, prebaking was performed at 95 ° C. for 2 minutes (FIG. 1A).

Using the first mask pattern 14 for forming a 0.9 μm contact hole, NSR manufactured by Nikon Corporation is used.
The resist film 13 was exposed by a 1505G7E stepper under an exposure condition of 325 mj / cm ² . Then 115
PEB treatment was performed under conditions of 2 ° C. and 2 minutes (FIG. 1B).

By developing, a first resist pattern 15 having a recess 19 was formed. Then, post baking was performed at 120 ° C. (FIG. 1 (c)).

A far-ultraviolet light curing treatment (UV curing) was performed (FIG. 1 (d)).

Using the first resist pattern 15 as a mask, the underlying SiO ₂ film 12 was etched by 0.4 μm (FIG. 1 (e)).

A low-viscosity resist PFX-15 resist (viscosity 15 cp) was applied at 5000 rpm to form a second resist film 16 having a film thickness of 0.5 μm on the flat portion on the first resist pattern 15. Then, prebaking was performed at 95 ° C. for 2 minutes (FIG. 1 (f)).

Using the second mask pattern 17 for forming a 0.5 μm contact hole, NSR1505G is used.
The 7E stepper exposed the second resist film 16 under the exposure condition of 175 mj / cm ² . PEB treatment was performed under the conditions of 115 ° C. and 2 minutes (FIG. 1 (g)).

By developing, a second resist pattern 18 having a recess 20 was formed. Post baking was performed at 120 ° C. (FIG. 1 (h)).

Using the synthesized resist pattern as a mask, the remaining film amount of the SiO ₂ film was 0.4 μm and the contact hole 21 was opened (FIG. 1 (i)).

Then, the unnecessary resist patterns 18 and 15 were removed.

The etching of the SiO ₂ film is CF
A mixed gas of ₄ , CHF ₃ , He and Ar was used, a parallel plate type apparatus was used, and high frequency power was 850 W, an electrode interval was 1.0 cm, and a sample temperature was −30 ° C.

By doing so, it was possible to form a contact hole having a step with a hole diameter of 0.5 μm at the bottom and a hole diameter of 0.9 μm at the top.

[0058]

As described above in detail, in the method for forming a fine pattern of a semiconductor device of the present invention, a sufficient resolution can be obtained even with an existing exposure apparatus, and a fine pattern can be formed without significantly increasing the cost. Can be formed.

Further, according to the present invention, the yield at the time of etching a fine pattern and the yield at the time of forming a film in a fine pattern by improving the step coverage can be improved, and the yield of a semiconductor device can be improved.

Tables 1 and 2 show a comparison between the method of the present invention and the conventional method.

[0061]

[Table 1]

[0062]

[Table 2]

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a method of forming a fine pattern of a semiconductor device of the present invention in order of steps.

FIG. 2 is a schematic cross-sectional view of a contact hole of the present invention.

FIG. 3 is a schematic cross-sectional view showing a method of forming a fine pattern of a conventional semiconductor device in order of steps.

FIG. 4 is a schematic cross-sectional view of a conventional contact hole.

[Explanation of symbols]

11 Si substrate 12 SiO ₂ film 13 First resist film 14 First mask pattern 15 First resist pattern 16 Second resist film 17 Second mask pattern 18 Second resist pattern 19 Recessed portion 20 Recessed portion 21 Contact hole 33 resist film 34 mask pattern 35 resist pattern

Claims (1)

[Claims] 1. A first resist pattern is formed on a substrate, a base film is partially etched by using the first resist pattern as a mask, and the first resist pattern is left on the substrate. A fine pattern of a semiconductor device, characterized in that a second resist pattern is formed, and the underlying film is further etched using a resist pattern obtained by combining the first resist pattern and the second resist pattern as a mask. Forming method.