CN114464524A - Photoetching and stripping process and method for manufacturing chip - Google Patents
Photoetching and stripping process and method for manufacturing chip Download PDFInfo
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- CN114464524A CN114464524A CN202210114500.2A CN202210114500A CN114464524A CN 114464524 A CN114464524 A CN 114464524A CN 202210114500 A CN202210114500 A CN 202210114500A CN 114464524 A CN114464524 A CN 114464524A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
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- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
Embodiments of the present application relate to photolithography, lift-off processes, and methods of manufacturing chips. According to an embodiment of the present application, a method of a photolithography process includes: providing a photoresist layer on a substrate; exposing only a partial region of the upper surface of the photoresist layer twice so that regions extending from the partial region to the lower surface of the photoresist layer form upper and lower portions having different developing characteristics; and developing the twice exposed photoresist layer, wherein the upper part remains after developing, and the lower part becomes smaller in width after developing and forms a side wall approximately vertical to the substrate. The embodiment of the application also provides a stripping process and a method for manufacturing a chip, which comprise the method of the photoetching process. The photoetching and stripping process and the method for manufacturing the chip provided by the embodiment of the application can effectively solve the problems in the traditional technology.
Description
Technical Field
Embodiments of the present application relate generally to the field of semiconductors, and more particularly, to photolithography, lift-off processes, and methods of manufacturing chips.
Background
In semiconductor processes, a two-dimensional pattern on a reticle is often transferred to a photoresist layer by a photolithography process using the photoresist layer, and the two-dimensional pattern is then transferred to a target layer by some process, such as a lift-off process, and the structure of the photoresist layer after photolithography generally affects the formation of a target structure on the target layer.
Accordingly, the present application proposes an improved photolithography, lift-off process and method of manufacturing chips.
Disclosure of Invention
It is therefore an objective of the claimed embodiments to provide a photolithography process, a lift-off process and a method for manufacturing a chip, which can effectively transfer a target pattern onto a target layer by controlling a formation structure of a photoresist layer.
An embodiment of the present application provides a method of a photolithography process, including: providing a photoresist layer on a substrate; exposing only a partial region of the upper surface of the photoresist layer twice so that regions extending from the partial region to the lower surface of the photoresist layer form upper and lower portions having different developing characteristics; and developing the photoresist layer after the two exposures, wherein the upper part of the photoresist layer is remained after the development, and the lower part of the photoresist layer is reduced in width and forms a side wall approximately vertical to the substrate after the development.
According to another embodiment of the present application, the method further comprises: the parameters of the exposure are adjusted so that the lower portion becomes smaller in width and forms sidewalls substantially perpendicular to the substrate after development.
According to another embodiment of the present application, the method further comprises: the photoresist layer is heated prior to exposure.
According to another embodiment of the present application, wherein the two exposures comprise: exposing the partial area for the first time; and performing a second exposure on the whole area of the upper surface of the photoresist layer, wherein the exposure dose used by the first exposure is less than that used by the second exposure.
According to another embodiment of the present application, wherein the upper portion has a length of at least about 3 microns and a width of about 100 nanometers to 2 microns; and the lower portion has a length of at least about 1 micron and a width of between about 100 nanometers and 2 microns.
Another embodiment of the present application also provides a lift-off process method, which includes the above-mentioned method of the photolithography process.
Still another embodiment of the present application further provides a method for manufacturing a chip, which includes the aforementioned lift-off process method.
Compared with the prior art, the photoetching and stripping process and the method for manufacturing the chip provided by the embodiment of the application can effectively control the formation structure of the photoresist layer, and are convenient for the effective processing of the next process.
Drawings
Drawings necessary for describing embodiments of the present application or the prior art will be briefly described below in order to describe the embodiments of the present application. It is to be understood that the drawings in the following description are only some of the embodiments of the present application. It will be apparent to those skilled in the art that other embodiments of the drawings can be obtained from the structures illustrated in these drawings without the need for inventive work.
Fig. 1-4 are schematic diagrams of a method of a lithographic process according to some embodiments of the present application.
Fig. 5 is an image under a scanning electron microscope of a T-shaped structure made by a method of a photolithographic process according to some embodiments of the present application.
Detailed Description
In order to better understand the spirit of the embodiments of the present application, the following further description is given in conjunction with some preferred embodiments of the present application.
Embodiments of the present application will be described in detail below. Throughout the specification of the present application, the same or similar components and components having the same or similar functions are denoted by like reference numerals. The embodiments described herein with respect to the figures are illustrative in nature, are diagrammatic in nature, and are used to provide a basic understanding of the present application. The embodiments of the present application should not be construed as limiting the present application.
As used herein, the terms "substantially", "substantially" and "about" are used to describe and illustrate minor variations. When used in conjunction with an event or circumstance, the terms can refer to instances where the event or circumstance occurs precisely as well as instances where the event or circumstance occurs in close proximity. For example, when used in conjunction with numerical values, the term can refer to a range of variation that is less than or equal to ± 10% of the stated numerical value, such as less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%. For example, two numerical values are considered to be "substantially" identical if the difference between the two numerical values is less than or equal to ± 10% (e.g., less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%) of the mean of the values.
In this specification, unless specified or limited otherwise, relative terms such as: the terms "vertical," "lateral," "upper," "lower," and derivatives thereof (e.g., "upper surface," etc.) should be construed to refer to the orientation as then described in the discussion or as shown in the drawings. These relative terms are for convenience of description only and do not require that the present application be constructed or operated in a particular orientation.
Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity, and should be interpreted flexibly to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited.
Further, for convenience of description, "first," "second," and the like may be used herein to distinguish one process from another or between different operations of a series of processes. "first", "second", etc. are not intended to describe corresponding processes.
Fig. 1-4 are schematic diagrams of a method of a lithographic process, according to some embodiments of the present application.
The method includes providing a photoresist layer 101 (fig. 1) over a substrate 100; exposing only a partial region 102 of the upper surface of the photoresist layer 101 twice (fig. 2) so that an upper portion 103 and a lower portion 104 (fig. 3) having different developing characteristics are formed from a partial region of the upper surface of the photoresist layer 101 to a region 105 (a dotted line portion in fig. 3) of the lower surface of the photoresist layer 101, as shown in fig. 2, regions on both adjacent sides of the partial region 102 may be covered by a portion 120 which is opaque to light; and developing the double exposed photoresist layer, wherein the upper portion 103 remains after developing, and the lower portion 104 becomes smaller in width and forms sidewalls 106 (fig. 4) substantially perpendicular to the substrate 100 after developing.
As shown in fig. 4, the photoresist layer is developed to form a T-shaped structure having sidewalls substantially perpendicular to the substrate, thereby transforming the two-dimensional pattern on the reticle into a three-dimensional T-shaped structure of the photoresist layer, which is advantageous for the next process operation. The traditional process technology can only form an inverted trapezoidal structure at most, so that the next process flow is limited.
Since the photoresist material constituting the photoresist layer is usually composed of a photosensitive component, a resin and a solvent, some components thereof react or generate new substances when the photoresist material is subjected to a process (such as light irradiation or heating), and then the desired pattern can be obtained by removing the partial region with a developer. When exposing partial region of the upper surface of the photoresist layer, the light absorption of the region extending downward from the upper surface of the photoresist layer is different, so that the region extending from the partial region of the upper surface of the photoresist layer to the lower surface of the photoresist layer forms an upper portion and a lower portion having different developing characteristics.
According to some embodiments of the application, the method further comprises: the exposure parameters are adjusted to make the width of the lower portion 104 smaller after development and form a sidewall 106 substantially perpendicular to the substrate 100, so that the formation structure of the photoresist layer can be adjusted to facilitate the operation of the subsequent process.
According to some embodiments of the present disclosure, the photoresist layer 101 may be heated before exposure according to the specific characteristics of the photoresist layer to remove the solvent in the photoresist layer and improve the adhesion between the photoresist layer and the substrate and the mechanical scratch resistance of the photoresist layer.
According to some embodiments of the present application, only a partial region 102 of the upper surface of the photoresist layer 101 may be exposed twice: exposing only a partial region 102 of the upper surface of the photoresist layer 101 for the first time, and exposing the partial region 102 on the photoresist layer illuminated by the light source through a mask so that the partial region is soluble in a developing solution after reaction, for example, a photosensitive component in the region is converted into carboxylic acid; and performing a second exposure on the entire upper surface of the photoresist layer 101, and then forming an upper portion 103 and a lower portion 104 having different developing characteristics in a region 105 extending from the partial region of the upper surface of the photoresist layer 101 to the lower surface of the photoresist layer 101, wherein the partial region 102 has a lower solubility after the first exposure than the second exposure due to a cross-linking reaction.
Heating prior to the second exposure also sometimes causes the resin portions to undergo a crosslinking reaction at relatively high temperatures, while the carboxylic acids promote the crosslinking reaction, thereby causing the crosslinking reaction to occur much more in the partial regions 102 than in the unexposed regions.
According to an embodiment of the present application, a method of forming a T-shaped structure using a Merck AZ positive/negative switchable photoresist (e.g., AZ5214E) as a photoresist material according to the above method may include:
(1) in order to make the surface on the substrate have hydrophobicity so as to enhance the adhesion between the surface of the substrate and the photoresist, an adhesion promoter can be coated on a silicon-based substrate, a quartz substrate, a sapphire substrate and the like;
(2) spin coating AZ5214E on the substrate at the rotation speed of about 4000r/30s to uniformly coat the photoresist on the surface of the substrate;
(3) pre-baking the photoresist at a temperature of about 90 to about 100 deg.C, such as about 95 deg.C, for a time of about 80 to about 100 seconds, such as about 90 seconds;
(4) performing mask exposure on the photoresist layer by using a mask plate on an exposure machine (such as a MA6 contact type), namely, exposing only partial area of the photoresist layer, wherein the broadband light source can be Ultraviolet (UV) with the wavelength of about 365 and 420 nanometers, and the exposure dose is about 12-30mJ/c square meter, for example, about 24mJ/c square meter;
(5) the photoresist layer is reverse baked, for example, the photoresist layer can be baked on a hot plate at about 100 ℃ and 120 ℃ for about 60-90s, for example, baked on a hot plate at about 110 ℃ for about 60 s;
(6) performing flood exposure on the photoresist layer, namely exposing all areas of the photoresist layer on an exposure machine without using a mask plate, wherein a broadband light source is UV with the wavelength of about 365-420 nanometers, and the flood exposure dose is about 60-360mJ/c square meter, such as about 300mJ/c square meter; and
(7) the photoresist layer is exposed to a developing solution, such as tetramethylammonium hydroxide (TMAH, with a concentration of about 2.38 wt%), for a developing time of about 40s to 45s, e.g., about 40s, and if necessary, a hardening (e.g., heating at about 110 ℃ for about 90s) process may be performed.
According to some embodiments of the present application, a T-shaped structure as shown in FIG. 4 may be formed, depending on the specific pattern on the reticle used when the mask is exposed. Wherein the upper portion 103 has a width 107 of at least about 3 microns and a height 109 of between about 100 nm and 2 microns; and lower portion 104 has a width 108 of at least about 1 micron and a height 110 of between about 100 nanometers and about 2 microns.
Fig. 5 is an image under a scanning electron microscope of a T-shaped structure made by a method of a lithographic process according to some embodiments of the present application.
As shown in fig. 5, a T-shaped structure 201 is located above a substrate 200, with an upper portion 203 having a width of about 8 microns and a height of about 300 nanometers, and a lower portion 204 having a width of about 3 microns and a height of about 1.2 microns.
It should be understood that although the photoresist layer in this embodiment uses the photoresist AZ5214E, this is only an exemplary embodiment for illustrating a method of a photolithography process provided in the present application and should not be construed as limiting the scope of protection of the present application. According to other embodiments of the present application, other similar photoresist layers may be processed to form T-shaped structures based on the above-described method.
The method of the photoetching process can be beneficial to the operation of the next process, compared with the situation that the gradient of an inverted trapezoidal structure made by a traditional photoresist layer is not easy to control, the T-shaped structure and the size of the T-shaped structure can be controlled by adjusting exposure parameters, the pattern distortion is small, and the dry etching resistance is high.
Embodiments of the present application also provide a lift-off process, which can pattern a metal layer by the above-mentioned photolithography process, and is more advantageous to perform the metal lift-off process than the inverted trapezoid 105 formed by the conventional method. Wherein the metal layer can be patterned by the above-mentioned lift-off process. As shown in fig. 5, since the T-shaped structure 201 is wider at the top and narrower at the bottom, the lower portion 204 is much narrower than the upper portion 203 during the lift-off process, so that no metal is deposited on the side surface of the lower portion 204, and the metal is easily removed when the photoresist is removed, and the metal attached to the upper portion 203 is also removed, thereby achieving the purpose of patterning the metal layer and reducing the pattern distortion.
Embodiments of the present application further provide a method for manufacturing a chip, which can implement patterning of a metal layer through the above-mentioned lift-off process.
The technical content and technical features of the present application have been disclosed as above, however, those skilled in the art may still make various substitutions and modifications based on the teaching and disclosure of the present application without departing from the spirit of the present application. Therefore, the protection scope of the present application should not be limited to the disclosure of the embodiments, but should include various alternatives and modifications without departing from the scope of the present application, which is covered by the claims of the present patent application.
Claims (8)
1. A lithographic process, comprising:
providing a photoresist layer on a substrate;
exposing only a partial region of the upper surface of the photoresist layer twice so that regions extending from the partial region to the lower surface of the photoresist layer form upper and lower portions having different developing characteristics; and
and developing the double-exposed photoresist layer, wherein the upper part is remained after the development, and the lower part is reduced in width and forms a side wall which is approximately vertical to the substrate after the development.
2. The method of claim 1, further comprising: the parameters of the exposure are adjusted so that the lower portion becomes smaller in width and forms sidewalls substantially perpendicular to the substrate after development.
3. The method of claim 1, further comprising: heating the photoresist layer before exposure.
4. The method of any of claims 1-3, wherein the two exposures comprise:
exposing the partial area for the first time; and
and carrying out second exposure on the whole area of the upper surface of the photoresist layer.
5. The method of claim 4, wherein the first exposure uses a smaller exposure dose than the second exposure.
6. The method of claim 1, wherein:
the upper portion has a width of at least about 3 microns and a height of about 100 nanometers to 2 microns; and
the lower portion has a width of at least about 1 micron and a height of between about 100 nanometers and 2 microns.
7. A lift-off process method comprising the method according to any one of claims 1-6.
8. A method of manufacturing a chip comprising the lift-off process method of claim 7.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210114500.2A CN114464524A (en) | 2022-01-30 | 2022-01-30 | Photoetching and stripping process and method for manufacturing chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210114500.2A CN114464524A (en) | 2022-01-30 | 2022-01-30 | Photoetching and stripping process and method for manufacturing chip |
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| CN114464524A true CN114464524A (en) | 2022-05-10 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116643453A (en) * | 2023-07-25 | 2023-08-25 | 捷捷微电(南通)科技有限公司 | Photoetching method based on semiconductor device |
| WO2024140477A1 (en) * | 2022-12-29 | 2024-07-04 | 通威太阳能（成都）有限公司 | Solar cell and preparation method therefor |
-
2022
- 2022-01-30 CN CN202210114500.2A patent/CN114464524A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024140477A1 (en) * | 2022-12-29 | 2024-07-04 | 通威太阳能（成都）有限公司 | Solar cell and preparation method therefor |
| CN116643453A (en) * | 2023-07-25 | 2023-08-25 | 捷捷微电(南通)科技有限公司 | Photoetching method based on semiconductor device |
| CN116643453B (en) * | 2023-07-25 | 2023-11-10 | 捷捷微电(南通)科技有限公司 | Photoetching method based on semiconductor device |
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