JPH09127705A - Pattern forming method and production of semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase and stabilize the sensitivity of a chemically amplifying resist film in a short time by supplying acid from an acid protective film deposited on a chemically amplifying resist film so as to replenish the acid which is trapped by a stabilizer in the chemically amplifying resist film. SOLUTION: A chemically amplifying positive resist film 10 is formed on a semiconductor substrate is. This positive resist consists of, for example, a material containing a novolac resin, acid producing agent, and dissolution inhibitor as the main component and contains trimethylsulfonium iodide as a stabilizer. Then an acid protective film 11 is formed on the positive resist film 10. The film 11 consists of isothianaphthene diyl sulfonate compd. and can increase the sensitivity of the positive resist film 10 for electron beams in a short time. This is because the acid trapped by trimethylsulfonium iodide in the stabilizer in the positive resist film 10 can be replenished by supplying acid from the acid protective film 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern forming method and a semiconductor integrated circuit device manufacturing technique, and more particularly to an electron beam lithography technique for forming a predetermined pattern by irradiating a chemically amplified resist film with an electron beam. It is related to the technology effectively applied to.

[0002]

2. Description of the Related Art With the miniaturization of elements and wirings constituting a semiconductor integrated circuit device, the wavelength limit is becoming a real problem in the lithography technique using light such as g-line and i-line. Electron beam lithography technology is expected as the most practical technology that exceeds the limits of such optical lithography technology.

However, the electron beam lithography technique has a problem of low throughput, and many techniques have been developed to apply it to mass production process technique. Higher sensitivity of electron beam resist film is also one of such technological development items, and various studies have been made.

As a resist film that meets such requirements, there is a chemically amplified resist film. To this resist film, a chemical species that generates an acid (H ⁺ ) by exposure treatment is added, and the acid acts as a catalyst to accelerate the crosslinking or decomposition reaction, thereby amplifying the reaction of the resist and increasing the sensitivity. This is a resist film intended to be improved. Since this chemically amplified resist film has high reactivity and reacts poorly at room temperature and has poor stability, it may be stored in a refrigerator or the like.

Regarding the chemically amplified resist film,
For example, it is described in "Silicon LSI and Chemistry", P96, P97, issued October 10, 1993 by Dainippon Books Co., Ltd.

[0006]

According to the results of studies by the present inventors, the chemically amplified resist film has no problem during storage under refrigeration, but has low sensitivity for about 2 weeks when stored at room temperature, and It has the property that the unstable state continues, and the sensitivity continues to be stable for about a month, and the chemically amplified resist film can be actually used about 2 weeks later. It has been found that there is a problem that the production start time becomes long and the period during which the chemically amplified resist film can be effectively used becomes short.

The reason why the chemically amplified resist film has such a property is considered as follows. That is, trimethylsulfonium iodide or the like is added to the chemically amplified resist film in order to improve the bottle life of itself, but the trimethylsulfonium iodide is exposed to light from the acid generation in the chemically amplified resist film during the exposure treatment. It is considered that this is due to the fact that since the acid generated by the above is taken in, the amount of the acid that reacts with the inhibitor in the chemically amplified resist film to make the resist film alkali-soluble originally decreases. However, it is unclear about the mechanism by which the sensitivity is improved again as the room temperature is prolonged. Therefore, an attempt was made to stabilize the chemically amplified resist film by aging treatment for a short period of time, but no effective result was obtained.

An object of the present invention is to provide a technique capable of increasing the sensitivity of a chemically amplified resist film in a short time and stabilizing it.

Another object of the present invention is to provide a technique capable of prolonging the effective use period of the chemically amplified resist film.

Another object of the present invention is to significantly reduce the time from the resist film deposition process to the exposure process when a chemically amplified resist film is used in a lithography process which is a manufacturing process of a semiconductor integrated circuit device. It is to provide a technology that can be shortened to.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

The pattern forming method of the present invention has the following steps when a predetermined pattern is transferred by irradiating a chemically amplified resist film deposited on a predetermined substrate with radiation.

(A) A step of depositing a chemically amplified resist film on the predetermined substrate.

(B) A step of hardening the chemically amplified resist film by baking, and then depositing an acidic protective film on the chemically amplified resist film.

(C) A step of irradiating a predetermined position of a predetermined substrate on which the chemically amplified resist film and the acidic protective film are deposited with radiation.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will now be described in detail with reference to the drawings (note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments. The repeated explanation is omitted).

1 to 3 are cross-sectional views of the main part of the semiconductor integrated circuit device during the pattern forming process of the present embodiment, and FIGS. 4 and 5 are explanatory views of the electron beam sensitivity of the chemically amplified resist film. 6 to 10 are cross-sectional views of essential parts of the semiconductor integrated circuit device during the pattern forming process following FIG.

In this embodiment, the case where the pattern forming method of the present invention is applied to, for example, a method of forming a predetermined pattern of a semiconductor integrated circuit device will be described.

FIG. 1 shows a cross section of a main part during a manufacturing process of a semiconductor integrated circuit device. The semiconductor substrate 1s constituting the semiconductor integrated circuit device is, for example, p ⁻ -type silicon (S
i) It is made of a single crystal, and the p well 2p and the n well 2n are formed on the upper part thereof. In the p well 2p,
For example, p-type impurity boron is introduced. Also, n
For example, n-type impurity phosphorus or arsenic (As) is introduced into the well 2n.

A field insulating film 3 for element isolation made of, for example, silicon dioxide (SiO ₂ ) is formed on the semiconductor substrate 1s. Then, the p well 2p and the n well 2n surrounded by the field insulating film 3 are formed.
Above the n-channel MOS-FET (Meta
l Oxide Semiconductor Field Effect Transistor: simply referred to as nMOS) 4 and p-channel MO
An S-FET (hereinafter, simply referred to as pMOS) 5 is formed.

The nMOS 4 includes a pair of semiconductor regions 4a and 4b formed above the p well 2p and spaced from each other.
It has a gate insulating film 4c formed on the semiconductor substrate 1s and a gate electrode 4d formed on the gate insulating film 4c.

The semiconductor regions 4a, 4b are regions for forming the source / drain regions of the nMOS 4, and the semiconductor regions 4a, 4b are doped with, for example, n-type impurity phosphorus or As. The semiconductor region 4
A channel region of the nMOS 4 is formed between a and 4b.

The gate insulating film 4c is made of SiO ₂ , for example. The gate electrode 4d is made of low resistance polysilicon, for example. However, the gate electrode 4d is not limited to being formed of a single film of low resistance polysilicon, and may be formed of, for example, a laminated film in which a silicide film is deposited on the low resistance polysilicon film.

A cap insulating film 6a and a sidewall 6b are formed on the upper surface and the side surface of the gate electrode 4d. Both of these are made of, for example, SiO ₂ .

The pMOS 5 includes a pair of semiconductor regions 5a and 5b formed above the n-well 2n and spaced apart from each other,
It has a gate insulating film 5c formed on the semiconductor substrate 1s and a gate electrode 5d formed on the gate insulating film 5c.

The semiconductor regions 5a and 5b are regions for forming source / drain regions of the pMOS 5, and p-type impurity boron, for example, is introduced into the semiconductor regions 5a and 5b. A channel region of the pMOS 5 is formed between the semiconductor regions 5a and 5b.

The gate insulating film 5c is made of SiO ₂ , for example. The gate electrode 5d is made of low resistance polysilicon, for example. However, the gate electrode 5d is not limited to being formed of a single film of low resistance polysilicon, and may be formed of, for example, a laminated film in which a silicide film is deposited on the low resistance polysilicon film.

A cap insulating film 6a and a sidewall 6b are formed on the upper surface and the side surface of the gate electrode 5d. Both of these are made of, for example, SiO ₂ .

Interlayer insulating films 7a to 7c made of, for example, SiO ₂ are deposited on such a semiconductor substrate 1s, whereby the nMOS 4 and pMOS described above are deposited.
5 is coated. The interlayer insulating films 7a and 7b are made of, for example, SiO ₂ , and the interlayer insulating film 7c is made of, for example, BPSG.
(Boro Phospho Silicate Glass).

First layer wirings 8a, 8b made of, for example, an aluminum (Al) -Si-copper (Cu) alloy are formed on the upper surface of the interlayer insulating film 7c. The first layer wirings 8a and 8b are electrically connected to the semiconductor region 4a of the nMOS4 and the semiconductor region 5a of the pMOS5 through the conductor films 8a1 and 8b1 in the connection holes 9a formed in the interlayer insulating films 7a to 7c. . The conductor films 8a1 and 8b1 are made of, for example, tungsten. And such a first
The layer wirings 8a and 8b are covered with an interlayer insulating film 7d made of, for example, SiO ₂ .

First, as shown in FIG. 2, a chemically amplified positive resist film 10 is applied on such a semiconductor substrate 1s by a spin coating method or the like. That is, the following is done.

First, the semiconductor substrate 1s is placed on a disc-shaped holding plate having a rotation support mechanism. Thin grooves and small holes are formed on the surface of the holding plate. The small holes are mechanically connected to the vacuum exhaust system, and are holes for fixing the semiconductor substrate 1s by vacuum suction when it is placed on the holding plate.

Subsequently, after the chemical amplification type positive resist solution stored in a refrigerated state (for example, 5 degrees or less) is brought to a room temperature state, a required amount is dropped on the semiconductor substrate 1s. Almost at the same time, the holding plate, for example, 3000-8000rp
It is rotated at a high speed up to about m to uniformly apply a chemically amplified positive resist solution onto the semiconductor substrate 1s.

The rotation speed at this time is variously changed depending on the diameter of the semiconductor substrate 1s and the property of the resist, but immediately after the chemical amplification type positive resist solution is dropped, it is several hundred rp.
The resist solution is rotated for about a few seconds so that the state of the resist solution spreads to a uniform film thickness on the semiconductor substrate 1s, and then the rotation speed is increased to remove the solvent and apply.

The chemically amplified positive resist used in the present embodiment is made of a material containing, for example, a novolac resin, an acid generator and a dissolution inhibitor as main components, and a stabilizer such as trimethylsulfonium is used. It also contains iodide.

As the acid generator, for example, an alkyl onium salt is used. Further, as the dissolution inhibitor, for example, a naphthoquinonediazide compound is used. The thickness of the chemically amplified positive resist film 10 at this time is, for example, about 1.5 to 1.7 μm.

Thereafter, the semiconductor substrate 1s is subjected to a pre-annealing treatment of, for example, 80 to 130 degrees. this is,
The solvent remaining in the chemically amplified positive resist film 10 is eliminated, and the distortion caused by the stress applied to the resist at high speed rotation is eliminated. Furthermore, the chemically amplified positive resist film 10 and the semiconductor substrate 1s are removed. This is a treatment for increasing the adhesiveness with.

Next, after cooling the semiconductor substrate 1s at room temperature by air cooling or the like, as shown in FIG. 3, the acid protection film 1 is formed on the chemically amplified positive resist film 10, for example.
1 is applied by a spin coating method or the like.

This method is the same as that of the chemically amplified positive resist film 10 described above. That is, after mounting the semiconductor substrate 1s on a disc-shaped holding plate having a rotation support mechanism, a necessary amount of the protective film forming aqueous solution is dropped onto the semiconductor substrate 1s, and the holding plate is rotated at a predetermined rotation speed almost at the same time. By rotating, the protective film forming aqueous solution is uniformly applied onto the semiconductor substrate 1s.

The acidic protective film 11 used in this embodiment is
For example, it is composed of an isothianaphthenediyl-sulphonate compound, and its thickness is, for example, about 70Å to 120Å, preferably about 100Å. However, the acidic protective film 11 is not limited to this and can be variously modified, and may be, for example, polythienylalkanesulfonic acid. In this case, the thickness of the acid protective film 11 is, for example, about 200Å. All of these materials have conductivity.

The acidic protective film 11 has a function of increasing the electron beam sensitivity of the chemically amplified positive resist film 10 in a short time. According to the inventor's examination, this is
The acid that has been incorporated into trimethylsulfonium iodide or the like contained as a stabilizer in the chemically amplified positive resist film 10 can be supplied from the acidic protective film 11 to make up for it, thus decomposing the dissolution inhibitor. Is assumed to be performed well.

Here, the electron beam resist sensitivity state and the electron beam irradiation amount state with and without the acidic protective film 11 are shown in FIGS. 4 and 5. A is an acid protective film 11
In the case of “B”, B indicates the case without the acid protective film 11.

As shown in FIG. 4, it takes about 2 weeks for the electron beam resist sensitivity to stabilize at a high value in the case B without the acid protective film 11, whereas in the case A with the acid protective film 11 The electron beam resist sensitivity is high and constant from the point of almost the same time as the application of the acid protective film 11.

When the acid protective film 11 was not provided, the electron beam sensitivity was unstable at about 4 to 5 μC / cm ² for about 2 weeks. Moreover, it becomes possible to make the electron beam sensitivity constant at, for example, ² μC / cm ² .

Similarly in FIG. 5, in the case where the acidic protective film 11 is not provided B, a large amount of electron beam irradiation is required, that is, the electron beam resist sensitivity is low, but the acidic protective film 11 is present. It can be seen that A can be applied with a constant electron beam irradiation amount, that is, the electron beam resist sensitivity is high and constant from almost the same time as the application of the acid protective film 11.

Then, the semiconductor substrate 1s is exposed. That is, as shown in FIG. 6, the semiconductor substrate 1s
The electron beam EB is irradiated to a predetermined position of. At this time, in the present embodiment, the ground electrode V _SS of the exposure apparatus and the acid protective film 11 are used.
And are electrically connected.

As a result, the charges generated by the electron beam irradiation escape to the ground electrode V _SS side of the exposure apparatus through the acidic protection film 11 having conductivity, so that it is possible to prevent the pattern from becoming thick due to the charges.

After that, the semiconductor substrate 1s is washed with water to remove the acid protective film 11 and the like, and then the semiconductor substrate 1s is subjected to a post-baking treatment. This is a treatment for improving the stability, adhesion, etching resistance and ion implantation resistance of the transferred pattern, and the treatment temperature is, for example, 100 to 200 degrees, preferably about 110 degrees.

Next, the semiconductor substrate 1s is developed. That is, the chemically amplified positive resist film 10
Of these, the portion irradiated with the electron beam is dissolved to form a resist pattern 10a made of a chemically amplified positive resist film on the semiconductor substrate 1s, as shown in FIG.

As an example of the developing method, for example, the semiconductor substrate 1s after the exposure processing is placed on a rotatable holding plate, and while being rotated, a predetermined developing solution is applied from above the main surface of the semiconductor substrate 1s like a shower. A method of removing the exposed portion by pouring is used. As the developing solution, for example, an inorganic alkaline developing solution of 2.38% is used.

Subsequently, by using the resist pattern 10a thus formed as an etching mask, the semiconductor substrate 1s is subjected to a dry etching process or the like, so that a predetermined position of the interlayer insulating film 7d is formed as shown in FIG. To
Connection hole 9 that exposes part of the first-layer wirings 8a and 8b
After punching b, the resist pattern 10a is removed by an ashing process or the like.

Then, for example, Al is formed on the interlayer insulating film 7d.
After depositing a conductor film made of a —Si—Cu alloy by a sputtering method or the like, the conductor film is patterned by the photolithography technique using the above-described chemically amplified resist film, whereby interlayer insulation is performed as shown in FIG. Second layer wirings 12a and 12b are formed on the film 7d.

Next, as shown in FIG. 10, an interlayer insulating film 7e made of, for example, SiO ₂ is formed on the interlayer insulating film 7d by C.
After being deposited by the VD method or the like, the connection hole 9c is formed at a predetermined position of the interlayer insulating film 7e by the photolithography technique and the dry etching technique using the above-described chemically amplified resist film.

Subsequently, for example, a conductor film made of tungsten, a conductor film made of an Al--Si--Cu alloy, a conductor film made of tungsten, and an insulating film made of silicon nitride are sequentially deposited from the lower layer, and then the laminated conductor film is formed as described above. By patterning by the photolithography technique and the dry etching technique described above, the third layer wiring 13a,
13b is formed.

Then, for example, Si is formed on the interlayer insulating film 7e.
By depositing the surface protection film 14 formed by depositing a silicon nitride film on O ₂ or SiO ₂ by the CVD method or the like, the wafer process of the semiconductor integrated circuit device is finished, and the semiconductor integrated circuit is subjected to the assembly and packaging steps. Finish manufacturing the device.

As described above, according to this embodiment, the following effects can be obtained.

(1). When a predetermined pattern of a semiconductor integrated circuit device is formed, an acidic protective film 11 is deposited on a chemically amplified positive resist film 10 to form a chemically amplified positive resist film 10. Since the acid taken in by the stabilizer in 10 can be supplied from the acidic protective film 11 to supplement the acid, the sensitivity of the chemically amplified positive resist film 10 can be shortened without waiting for 2 weeks. It becomes possible to stabilize it at a high level.

(2) By the above (1), it is possible to obtain a high and stable resist sensitivity in a short time without waiting for about two weeks. Therefore, the effective use period of the chemically amplified positive resist film 10 is improved. It is possible to make it longer. That is, the resolution and dimensional accuracy of the chemically amplified positive resist film 10 can be stabilized over a long period of time, and highly reliable pattern transfer can be performed. Therefore, the yield, reliability and reproducibility of the semiconductor integrated circuit device can be improved. It becomes possible to improve.

(3) According to the above (1), when the chemically amplified positive resist film 10 is used in the lithography step which is the manufacturing process of the semiconductor integrated circuit device, the chemically amplified positive resist film 10 is deposited. Since the exposure process can be performed immediately after the process, the time from the deposition process of the positive resist film 10 to the exposure process can be significantly shortened.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, in the above embodiment, the MOS
The case where the present invention is applied to the pattern forming technology of a semiconductor integrated circuit device having an FET has been described, but the present invention is not limited to this, and various applications are possible, such as a semiconductor integrated circuit device having a bipolar transistor and a bipolar transistor. It is also applicable to a semiconductor integrated circuit device in which a MOS • FET is provided on the same semiconductor substrate.

Further, in the above-described embodiment, the case where the present invention is applied to the photolithography technique using the positive type resist film of the chemical amplification type has been described, but the present invention is not limited to this, and for example, the chemical amplification type. It is also applicable to the photolithography technique using the negative resist film of.

In the above description, the case where the invention made by the present inventor is mainly applied to the semiconductor integrated circuit device technology which is the background field of application has been described.
The present invention is not limited to this, and can be applied to, for example, a photomask or a pattern forming technique on a liquid crystal substrate. The present invention can be applied to at least a photolithography technique using a chemically amplified resist film.

[0065]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1). According to the pattern forming method of the present invention,
The acid taken in by the stabilizer in the chemically amplified resist film can be supplied and supplemented from the acidic protective film deposited on the chemically amplified resist film. It is possible to stabilize the value high in a short time without waiting for a week.

(2) By the above (1), a high and stable resist sensitivity can be obtained in a short time without waiting for about two weeks, so that the effective use period of the chemically amplified resist film can be extended. It will be possible.

(3) According to the above (1), when a chemically amplified resist film is used in a lithography process which is a manufacturing process of a semiconductor integrated circuit device, an exposure process is performed immediately after the deposition process of the chemically amplified resist film. Is possible,
It is possible to significantly reduce the time from the resist film deposition process to the exposure process.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a main part of a semiconductor integrated circuit device during a pattern forming process of this embodiment.

FIG. 2 is a cross-sectional view of a main part of a semiconductor integrated circuit device during a pattern forming process following FIG.

FIG. 3 is a cross-sectional view of a main part of a semiconductor integrated circuit device during a pattern forming process following FIG.

FIG. 4 is an explanatory diagram of electron beam sensitivity of a chemically amplified resist film.

FIG. 5 is an explanatory diagram of electron beam sensitivity of a chemically amplified resist film.

FIG. 6 is a cross-sectional view of essential parts of a semiconductor integrated circuit device during a pattern forming step following FIG.

FIG. 7 is a cross-sectional view of essential parts of the semiconductor integrated circuit device during a pattern forming step following FIG.

FIG. 8 is a cross-sectional view of essential parts of the semiconductor integrated circuit device during a pattern forming step following FIG. 7.

9 is a cross-sectional view of essential parts of the semiconductor integrated circuit device during the pattern forming process following FIG.

FIG. 10 is a cross-sectional view of essential parts of the semiconductor integrated circuit device during the pattern forming process following FIG.

[Explanation of symbols]

1s Semiconductor substrate 2p p-well 2n n-well 3 Field insulating film 4 n-channel type MOS / FET 5 p-channel type MOS / FET 6a Cap insulating film 6b Sidewalls 7a to 7e Interlayer insulating film 8a, 8b First layer wiring 8a1 , 8b1 conductive film 9a~9c connection hole 10 positive type of chemical amplification resist film 10a resist pattern 11 acidic protective film 12a, 12b second layer wiring 13a, 13b third layer wiring 14 surface protective film EB electron beam V _ss ground electrode

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification number Agency reference number FI Technical display location H01L 21/30 541M

Claims (3)

[Claims] 1. A pattern forming method comprising the following steps when a predetermined pattern is transferred by irradiating a chemically amplified resist film deposited on a predetermined substrate with radiation. (A) A step of depositing a chemically amplified resist film on the predetermined substrate. (B) A step of hardening the chemically amplified resist film by baking, and then depositing an acidic protective film on the chemically amplified resist film. (C) A step of irradiating a predetermined position of the predetermined substrate on which the chemically amplified resist film and the acidic protective film are deposited with radiation. 2. The pattern forming method according to claim 1, wherein the acidic protective film is made of an isothianaphthenediyl-sulfonate compound or polythienylalkanesulfonic acid, and the chemically amplified resist film is a novolac resin.
A pattern forming method comprising an inhibitor and an acid generator as main components. 3. A semiconductor integrated circuit device comprising the following steps when transferring a predetermined semiconductor integrated circuit pattern by irradiating a chemically amplified resist film deposited on a semiconductor substrate with radiation. Manufacturing method. (A) A step of depositing a chemically amplified resist film on the predetermined substrate. (B) A step of hardening the chemically amplified resist film and then depositing an acidic protective film on the chemically amplified resist film. (C) A step of irradiating a predetermined position of the predetermined substrate on which the chemically amplified resist film and the acidic protective film are deposited with radiation. (D) A step of forming a resist pattern by removing the radiation irradiation position in the chemically amplified resist film by developing the semiconductor substrate after cleaning the semiconductor substrate. (E) By using the resist pattern as an etching mask, an etching process is performed on the semiconductor substrate to etch away a base film portion exposed from the resist pattern to form a predetermined semiconductor integrated circuit pattern on the semiconductor substrate. Forming process.