JPH09121146A - Gate processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable optimum setting in realtime by measuring the magnitude of an input signal when the operation of a threshold value is indicated, calculat ing the threshold value based on the measurement value and setting it as the threshold value of an open/close device. SOLUTION: An open/close indicating signal is outputted from an open/close signal generator 3 whenever the input signal is inputted and supplied to a coefficient genenrating part 8. Thus, whenever the new open/close indicating signal is inputted, the more proper rise coefficient and fall coefficient are calculated based on the envelope waveform of the input signal at that time in the coefficient generating part 8. The coefficient which is held in the coefficient memory 7 as the calculated coefficient is updated. Therefore, the rise and fall characteristics of a gate waveform are set to the optimum ones in realtime by following the state change of the input signal. Then, when the connection of coefficient setting is indicated by a coefficient operating element, the coefficient R held in a register 811 is set as the rising coefficient K in the coefficient memory 7 and the coefficient R held in the register 812 is set as the falling coefficient K.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate processor for controlling passage of an input signal such as removing a noise portion of the input signal.

This type of gate processing device is used as a noise gate in, for example, an electronic musical instrument, and this noise gate mutes an output signal in a portion where there is no musical tone signal to output annoying noise. To prevent that.

As a conventional general gate processing device, an input signal is output through a gate, and a threshold value slightly higher than the noise level is set in advance to set the threshold value as the input signal level. If the input signal level is smaller based on the comparison result, the gate is closed to shut off the input signal, and if the input signal level is larger, the gate is opened and the input signal is output as it is. It is known to pass through. According to this gate processing device, when only noise equal to or less than the threshold value is input, this noise can be blocked so as not to be output to the output side.

In such a gate processing apparatus, the threshold value is a very important parameter, and it is necessary to set an appropriate threshold value in order to properly open and close the gate. For example, in the case of a noise gate, if the threshold value is too smaller than an appropriate value, noise above the threshold value will be output without being cut. On the other hand, if the threshold value is too large, the beginning portion of the input musical tone signal is cut, so that the musical tone is suddenly emitted, which gives an unnatural feeling.

However, in order to set an appropriate threshold value, it is necessary to repeat trials in various input signal states, correct and set the threshold value, which complicates the setting work.
Moreover, there is a problem in that it cannot always be properly set.

Further, in the above-mentioned gate processing device, when the gate is constituted by the switch and the input signal is simply turned on / off, the waveform of the input signal is suddenly cut off at the time of turning on / off, and thus the waveform is not smooth. Noise may be generated. Therefore, instead of turning on / off with the gate composed of a switch, VCA is used as the gate.
There has been proposed a method of smoothing the rising and falling waveforms of an input signal by smoothly changing the passing gain of the input signal using a (voltage control amplifier) or the like. For example, by using a waveform such as charge / discharge or counter reading as a gain change waveform (also referred to as a gate waveform) for changing the gain of the gate, smoothing the change in the gain at the time of opening / closing the gate causes noise and instability. Suppress the movement.

When the gate processor is used as a noise gate of an electronic musical instrument, musical tone signals of various types of musical instruments are input as input signals. For example, a drum musical tone signal and a strings musical tone signal are input. The signal waveforms are completely different, and in order to realize a natural sense of hearing, it is necessary for the above-mentioned gain change waveform to have characteristics (rise waveform, fall waveform) according to each timbre. For this reason, there has been proposed a method devised so that the rising and falling speeds of the gain change waveform at the time of opening and closing can be set in order to obtain a gain change suitable for the type of signal to be passed.

However, in order to properly set the rising and falling speeds of this gain change waveform, it is necessary to repeat trials and corrections under various input signal states to make corrections, and the setting work is complicated. However, there is a problem that it is difficult to set properly, the waveform itself cannot be changed, and when the state of the input signal changes, a new setting must be made each time. .

[0009]

SUMMARY OF THE INVENTION In view of the above circumstances, the present invention is to make it possible to properly set the threshold value in a gate processing apparatus by a simple operation, and to open / close the gate. With regard to the setting of the gain change characteristic at the time, it is possible to make an appropriate setting with a simple operation.
The purpose of the present invention is to enable real-time optimum setting by following changes in the state of an input signal.

[0010]

In order to solve the above-mentioned problems, the gate processing device according to the present invention is, as one form, a gate means for controlling passage of an input signal by opening and closing, and the opening and closing of this gate means. An opening / closing instruction means generated by comparing the magnitude of the input signal with a predetermined threshold value, and an operation means for instructing the setting of the threshold value,
A threshold value that is set as the threshold value of the opening / closing instruction means by measuring the magnitude of the input signal and calculating the threshold value when the setting of the threshold value is instructed by this operation means. And setting means.

In this gate processing apparatus, when the threshold value setting means is instructed by the operating means, the threshold value setting means measures the magnitude of the input signal at that time and the threshold value is set based on the measured value. Is calculated and set as the threshold value in the opening / closing instruction means. Therefore, since the threshold value can be set to an appropriate value with a simple operation, the setting operation of the threshold value can be reduced and appropriate gate processing of the input signal can be performed.

As another form of the gate processing apparatus according to the present invention, gate means for controlling passage of an input signal by opening and closing by gain change, and gate means with a predetermined gain change characteristic according to arrival of the input signal. Gain instructing means for instructing the changing gain, operation means for instructing the setting of the gain change characteristic, and when the operation means is instructed to set the gain change characteristic, the envelope waveform of the input signal is measured and the measurement result is measured. Change characteristic setting means for setting the gain change characteristic calculated based on the above as the gain change characteristic of the gain instruction means.

In this gate processing device, when the setting of the gain change characteristic is instructed by the operating means, the change characteristic setting means measures the envelope waveform of the input signal at that time and changes the gain calculated based on the measurement result. The characteristic is set as the gain change characteristic of the gain instruction means. The gate means controls the passage of the input signal with this set gain change characteristic. Therefore, the gain change characteristic at the time of opening and closing the gate can be set by a simple work, and the setting work can be reduced, and the noise and the unstable operation can be suppressed, and the gate processing suitable for the input signal can be performed. .

In another form of the gate processing apparatus according to the present invention, a gate means for controlling passage of an input signal by opening and closing by a gain change, and a gate means having a predetermined gain change characteristic according to the arrival of the input signal. Gain indicating means for indicating a changing gain, input signal detecting means for detecting arrival of an input signal, and measurement of the envelope waveform of the input signal when the arrival of the input signal is detected by the input signal detecting means Change characteristic correction means for correcting the gain change characteristic of the gain instruction means by the gain change characteristic calculated based on the result.

In this gate processing device, when the arrival of the input signal is detected by the input signal detecting means, the change characteristic correcting means measures the envelope waveform of the input signal at that time and calculates it based on the measurement result. The gain change characteristic of the gain instruction means is corrected by the gain change characteristic.
The gating means controls the passage of the input signal with this modified gain change characteristic. Therefore, the gain change characteristic can be set to the optimum one in real time with respect to the change in the state of the input signal, so that noise or noise is always input to the change in the input signal or the input in which different envelope signals are mixed. It is possible to perform optimum gate processing in which stable operation is suppressed.

In the above gate processing device, the gain change characteristic is set to one of the rising and falling characteristics of the gain change, and the rising characteristic of the gain change is input based on the rising waveform of the envelope of the input signal. The falling characteristic of the gain change can be calculated based on the falling waveform of the envelope of the signal. This makes it possible to perform optimum gate processing according to the rising and falling waveforms of the envelope of the input signal.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a gate processing apparatus as an embodiment of the present invention. Further, FIG. 2 shows the waveform of each signal in the embodiment apparatus. In FIG. 2, is the envelope waveform of the input signal to the gate processing device, is the waveform of the switching instruction signal output from the switching signal generator 3, and is the gate waveform output from the gate waveform generator 6.

In FIG. 1, the input signal is an A / D converter 1
It is input to the gate processing unit 1 via 0 and also to the envelope extraction unit 2. The gate processing unit 1 receives the gate waveform G (t) generated by the gate waveform generation unit 6 from the input signal.
Is a circuit that multiplies a coefficient (gain of 0 to 1) corresponding to and outputs the result, and has a function equivalent to VCA. Gate processing unit 1
Is output as an output signal via the D / A converter 11.

The envelope extracting section 2 is a circuit for extracting the envelope waveform of the input signal shown in FIG. 2, and supplies the extracted envelope waveform to the switching signal generator 3, the threshold value generating section 5, and the coefficient generating section 8. A known configuration can be used as the envelope extraction unit 2.

The open / close signal generator 3 compares the threshold value (threshold value, hereinafter the same) held in the threshold value memory 4 with the magnitude of the envelope waveform extracted from the envelope extracting section 2, and the comparison result is obtained. Based on Figure 2
An opening / closing instruction signal for instructing opening / closing of the gate is generated and given to the gate waveform generator 6 and the coefficient generator 8.
As the open / close instruction signal, a gate close signal of "0" is output when the threshold value> envelope waveform, and a gate open signal of "1" is output when the threshold value≤envelope waveform.

The gate opening / closing operation is performed at the rising and falling edges of the envelope waveform. In this embodiment,
The threshold value Tho for the open gate and the threshold value Thc for the closed gate when the switching signal generator 3 compares.
Are different values, and the respective values are held in the threshold value memory 4. Threshold values Tho and Thc held in the threshold value memory 4
Is updated by the threshold value generation unit 5 when the operator gives an instruction from the operation unit 9.

The gate waveform generator 6 generates the gate waveform shown in FIG. 2 which rises when the gate open signal is "1" and falls when the gate close signal is "0". This gate waveform is a rising coefficient Ku stored in the coefficient memory 7.
The rising characteristic and the falling characteristic are determined by p and the falling coefficient Kdn. The coefficients Kup and Kdn of the coefficient memory 7 are updated by the coefficient generation unit 8 in response to an instruction from the operation unit 9 or an opening / closing instruction signal from the opening / closing signal generator 3.

First, the schematic operation of the apparatus of this embodiment will be described below. In the state where no significant input signal such as a musical tone signal is input to the apparatus of the embodiment (that is, only background noise is input), the threshold value generation unit 5 includes the noise envelope waveform from the envelope extraction unit 2. Is supplied. In this state, the operator
When a threshold value setting instruction is performed by operating the, the threshold value generation unit 5 causes the maximum value Nmax of the envelope amplitude level of noise in the period during which the setting instruction is performed (the period from the setting start instruction to the setting end instruction). Is detected, threshold values Tho and Thc of appropriate levels exceeding the maximum value Nmax are calculated, and these are set in the threshold value memory 4.

As a result, when a significant input signal (such as a tone signal) as shown in FIG. 2 is input, the switching signal generator 3 causes the rising amplitude level of the input signal to rise as shown in FIG. When the open threshold value Tho is exceeded, the open / close instruction signal is changed to the open signal "1", and "1" is continuously output until the amplitude level falls below the close threshold value Thc, and when the close threshold value Thc is exceeded, the close signal "1" is output. 0 ".

In this way, when the operation unit 9 is instructed to start the threshold value setting, a threshold value suitable for the amplitude level is newly obtained from the amplitude level of the noise waveform measured during the setting period, and the setting is completed. When you specify
The value held in the threshold value memory 4 is updated with the newly obtained threshold value. As a result, the threshold value in the gate processing device can be set to an appropriate value by a simple operation.

When the gate waveform generator 6 receives the open / close instruction signal shown in FIG. 2 from the open / close signal generator 3, the gate waveform generator 6 generates the gate waveform shown in FIG. 2 having a smooth rise and fall based on the open / close instruction signal. . The rising and falling characteristics of the gate waveform are the rising coefficient K held in the coefficient memory 7.
up, determined by the falling coefficient Kdn. This gate waveform is supplied to the gate processing unit 1, and the gate processing unit 1 performs the gate processing of multiplying the input signal by this gate waveform to smoothly open and close the gate.

Next, the rising and falling characteristics of the gate waveform according to the input signal are adjusted as follows. That is,
Before inputting a significant input signal, the operation unit 9
The coefficient setting instruction is given by. As a result, the coefficient generator 8
When an input signal is input, a rising coefficient Kup corresponding to the slope of the envelope waveform of the input signal in the vicinity of the open threshold value Tho is calculated when the input signal is input, and similarly,
At the falling portion, a falling coefficient Kdn corresponding to the slope of the envelope waveform of the input signal near the closed threshold value Thc
Is calculated, and the value held in the coefficient memory 7 is updated with these coefficients Kup and Kdn.

In this way, when the coefficient setting start is instructed by the operation unit 9, the coefficient for determining the rising and falling characteristics of the gate waveform according to the envelope waveform is extracted from the envelope waveform extracted during the coefficient setting period. Newly requested,
When the end of setting is instructed, the value held in the coefficient memory 7 is updated with the newly obtained coefficient. As a result, it becomes possible to set the gate waveform when the gate is opened and closed by a simple work and an appropriate setting.

Next, when the characteristics of the input signal change, the rising and falling characteristics of the gate waveform are corrected according to the change as follows. Here, consider the case where significant input signals having different characteristics are discretely input. An open / close instruction signal is output from the open / close signal generator 3 each time an input signal is input, and this is supplied to the coefficient generation unit 8. Therefore, in the coefficient generation unit 8, every time a new open / close instruction signal is input. A more appropriate rising coefficient Kup and falling coefficient Kdn are calculated based on the envelope waveform of the input signal at that time, and the coefficient held in the coefficient memory 7 is updated with the calculated coefficient. This makes it possible to set the rising and falling characteristics of the gate waveform to be optimum in real time in accordance with the change in the state of the input signal.

Next, the configuration and operation of the main circuit portion of the embodiment apparatus will be described in detail with reference to the drawings.

First, the gate waveform generator 6 will be described. FIG. 3 shows a configuration in which the gate waveform generator 6 is represented by functional blocks. The switch 61 is a switch for selecting a constant Ku or a constant “0”, and the selected coefficient is input to one input terminal of the adder 63. Switch 6
The constant Ku connected to the 1-side contact of 1 is a constant that determines a predetermined rising characteristic, the constant “0” connected to the 0-side contact is a constant that determines the falling characteristic, and the gate waveform Is the target value that converges.

The switch 62 is a switch for selecting the rising coefficient Kup or the falling coefficient Kdn of the coefficient memory 7, and the rising coefficient Kup is 0 at the 1 side contact (the contact indicated by "1"). The falling coefficient Kdn is input to each side contact (the contact indicated by “0”). The selected coefficient is input to the multiplier 66 as a multiplication coefficient. The rising coefficient Kup and the falling coefficient Kdn are set as conditions such that Kup ≧ 1 1> Kdn ≧ 0.

Switching of these switches 61 and 62 is controlled by an opening / closing instruction signal from the opening / closing signal generator 3.
That is, when the open / close instruction signal is the open signal "1", the contact is switched to the 1 side contact, and when the close signal is "0", the contact is switched to the 0 side contact.

The addition result of the adder 63 is input to the limiter 64, and the output signal of the limiter 64 is output to the gate processing unit 1 as a gate waveform and is also supplied to the delay unit 65 delaying by one sample time. This limiter 64 limits to "1" when the value of the addition result of the adder 63 becomes larger than "1", and outputs "0" when it becomes equal to or smaller than a predetermined value. The output signal of the delay unit 65 is multiplied by the coefficient by the multiplier 66 and then input to the other input terminal of the adder 63.

The operation of the gate waveform generator 6 will be described below. In the initial state, the opening / closing instruction signal from the opening / closing signal generator 3 is the closing signal “0”, and the output gate waveform is “0”. When the open / close instruction signal becomes the open signal “1”, the switches 61 and 62 are respectively connected to the 1-side contacts, and the following calculation, G (t) = Ku + G (t-1) × Kup, is performed every sampling cycle. , A gate waveform G rising with a curve as shown in FIG. 2 is generated. Here, G (t) means the value at the current sampling time, and G (t-1) means the value at the previous sampling time. The gate waveform G (t) of this calculation result is "1".
When it becomes larger, it is limited to "1" by the limiter 64 and "1" is continuously output.

Next, when the opening / closing instruction signal from the opening / closing signal generator 3 becomes the closing signal "0", the switches 61 and 62 are respectively connected to the 0 side contacts, and the following calculation is performed every sampling cycle, G (t) = G (t-1) × Kdn is performed to generate a gate waveform having a curve falling as shown in FIG. This operation is theoretically forever "0"
Since it becomes an asymptotic line close to, the limiter 64 is set to "0" when the value becomes equal to or less than a predetermined value.

In the case of digital processing, if a value less than a certain value is automatically rounded down to "0" due to the number of bits used for calculation, a limiter for setting "0" is necessary. Absent.

Next, the threshold value generator 5 will be described. The threshold value generation unit 5 generates a threshold value from an input signal input during the operation period (or a predetermined time after the operation) when the operator operates the threshold value setting operator of the operation unit 9. Then, it is set in the threshold value memory 4.

FIG. 4 shows a configuration in which the threshold value generator 5 is represented by functional blocks. As shown in FIG. 4, the envelope waveform from the envelope extraction unit 2 is input to one input terminal of the comparator 51, and the comparator 51
Of the output signal of the comparator 51 via the 1-sample delay device 52.
Of the maximum value register 53. The output signal from the maximum value register 53 is input to a multiplier 54 that multiplies the coefficient Ko and a multiplier 55 that multiplies the coefficient Kc, respectively, and the multipliers 54 and 5 respectively.
The output signal 5 is input to the threshold value memory 4.

The operation of the threshold value generator 5 will be described below. In the threshold value generation unit 5, processing is started by a threshold value setting start instruction from the operation unit 9 to generate a threshold value, and when a setting operation end instruction is received from the operation unit, the threshold value memory with the generated threshold value is received. The contents of 4 are updated and the process ends.

When the threshold value setting start instruction is received from the operation unit 9, the delay unit 5 delays by one sample time.
2 is reset, the envelope waveform output from the envelope extraction unit 2 and the signal one sample before from the delay unit 52 are compared by the comparator 51, and the larger one is output. The process of comparing the output of the envelope extraction unit 2 and the signal of the delay unit 52 and selecting the larger one is continuously performed until the setting end instruction is received from the operation unit 9, and this process is ended together with the setting end instruction. Since the output of the comparator 51 at the time of the setting end instruction is the maximum value during the setting operation period, the value is held in the maximum value register 53 holding the maximum value.

In the above description, both the start operation and the end operation are performed by the operation unit 9. However, only the start instruction may be given and the setting end instruction may be automatically given after a predetermined time has elapsed. Good.

The maximum value of the maximum value register 53 is multiplied by the coefficients Ko and Kc by the multipliers 54 and 55, respectively, so that the open threshold value (rising threshold value) is obtained.
Tho, closed threshold value (falling threshold value) T
hc is calculated, and the calculated value is used as the threshold value memory 4
To update.

The arithmetic expressions of the open threshold value and the closed threshold value are shown below. That is, the maximum value of the amplitude level of the envelope waveform is Nmax and the open threshold value is Th.
If the closed threshold value is Thc, then Tho = Nmax × Ko Thc = Nmax × Kc (1.0≤Kc≤Ko), and the calculated value is stored in the threshold value memory 4.

Further, in order to obtain a timing to be used in the coefficient correction processing described later, a value Tho 'which is a predetermined multiple of the open threshold value Tho and a value Thc' which is a predetermined multiple of the closed threshold value Thc are calculated and held. doing.

The values of the coefficients Kc and Ko are 2.0 and 2.0, respectively, when the threshold value is increased by 6 dB with respect to the measured amplitude value of noise or the like. Also, different values may be used. The example of FIG. 2 shows a case where the falling threshold value is set lower. The values of the coefficients Kc and Ko may be appropriately set in advance by an experiment, but may be arbitrarily set by the user himself / herself.

Next, the coefficient generator 8 will be described. In the coefficient generation unit 8, the coefficient setting operator of the operation unit 9 is operated to increase the rising coefficient Kup from the envelope state near the threshold value of the input signal input during the operation (or during a predetermined time after the operation). And the falling coefficient Kdn is detected,
Set.

The function of the coefficient generating section 8 is different when the coefficient is set by the coefficient setting operation from the operation section 9 and when the coefficient is corrected in real time thereafter. FIG. 5 shows a functional block diagram of the configuration of the coefficient generation unit 8 at the time of coefficient setting, and FIG. 6 shows a functional block diagram of the configuration of the coefficient generation unit 8 at the time of coefficient correction. The coefficient generation unit 8 has the configuration shown in FIG. 5 in response to a coefficient setting start instruction from the operation unit 9, and the coefficient setting process is started. When the setting end instruction is received from the operation unit 9, the already set rising edge, The falling coefficient is updated and the coefficient setting processing is ended, and thereafter, the coefficient correction processing is performed after the configuration shown in FIG. 6 is obtained.

First, the configuration of the coefficient generator 8 when setting the coefficients shown in FIG. 5 will be described. When the coefficient setting operator of the operation unit gives an instruction to start the coefficient setting, the coefficient generation unit 8 has the configuration shown in FIG. 5, and the coefficient can be set. In FIG. 5, when an envelope waveform is input from the envelope extraction unit 2, this envelope waveform is input to the divider 802 as the input signal A and
It is also input to the delay device 801 that delays the sample, and the output signal of this delay device 801 is input to the divider 802 as the input signal B. As a result, the envelope value E (t) at the current sampling time is input as the input signal A, and the envelope value E (t-1) at the previous sampling time (t-1) is input as the input signal B to the divider 802.

The divider 802 calculates A ÷ B for the two input signals A and B, and the calculated result is the ratio R of the envelope values at the current sampling time and the previous sampling time.
(t) (hereinafter referred to as change ratio) R (t) = E (t) / E (t-1) is output.

The change ratio R output from the divider 802
(t) is input to the shift registers 803 and 804, respectively. The shift register 803 changes from to to to 'in FIG.
2 and the shift register 804 has the number of stages corresponding to the time difference from tc 'to tc in FIG.

The signals output from the respective stages of the shift register 803 are added by the adder 805, multiplied by the coefficient Ku by the multiplier, and held in the register 811 as the rising coefficient Ro. On the other hand, the signals output from the respective stages of the shift register 804 are added by the adder 806, multiplied by the coefficient Kd by the multiplier, and held in the register 812 as the falling coefficient Rc.

The calculation performed by these circuits is a calculation for averaging a predetermined number of change ratios R (t) as described below to obtain a rising coefficient Ro and a falling coefficient Rc. Ro = {R (to) + R (to +1) + ... R (to ')} * Ku Rc = {R (tc') + R (tc '+ 1) + ... R (tc)} * Kd where to , Tc is the time of the rising and falling portions of the opening / closing instruction signal obtained by the preset threshold value, to 'is the time after a predetermined time after to, and tc' is the time before tc. It is the time after the set predetermined time, and the constant Ku is Ku = 1 / (to'-
to + 1), (to '-to +1) is the number of samplings from to' to to, and the constant Kd is Kd = 1 /
(Tc-tc '+ 1) and (tc-tc' + 1)
Is the sampling number from tc to tc '.

The timing generator 809 holds the coefficients in the registers 811 and 812 with to 'and t'.
Generate and do the timing of c.

In the coefficient generating section 8 having such a configuration, when the envelope waveform of the significant input signal as shown in FIG. 2 is inputted from the envelope extracting section 2, a portion of the envelope waveform in the vicinity of the threshold value Tho (from time t o to to '
The rising coefficient Ro is obtained from the change ratio of the rising edge coefficient Rc, and the falling coefficient Rc is obtained from the changing ratio of the portion in the vicinity of the threshold value Thc (section from time tc 'to tc). The rising coefficient Ro is stored in the register 811. The falling coefficient Rc is held in the register 812, respectively.

Then, when the coefficient setting operator of the operation unit instructs the end of the coefficient setting, the coefficient Ro held in the register 811 is used as the rising coefficient Kup, and the coefficient Rc held in the register 812 is used as the falling coefficient. Kdn is set in the coefficient memory 7 respectively. Instead of giving an end instruction with the operation unit 9, the operation unit 9 gives only an instruction to start coefficient setting and updates the coefficient memory 7 after a predetermined time has elapsed or when new coefficient data is obtained. The operation may be ended.

In the above description, since the change of the change ratio R (t) at the rising and falling portions of the envelope waveform is large, the average is calculated using the shift register, adder and multiplier. , If the change in the calculated change ratio is not so large, or if a large change is removed during the processing of the divider, the result of the divider (A ÷ B) is calculated without calculating the average. It is also possible to use the product of the coefficients of and the rising coefficient and the falling coefficient.

Next, the configuration of the coefficient generator 8 at the time of modifying the coefficient shown in FIG. 6 will be described. After the coefficient setting end is instructed by the operation unit 9, the rising coefficient Kup and the falling coefficient Kdn set in the preceding coefficient setting process are corrected according to the envelope of the newly input input signal, and the gate waveform generator 6 Then, the gate waveforms of the rising and falling characteristics corresponding to the corrected rising coefficient Kup and falling coefficient Kdn are generated,
The gate processing unit 1 is controlled.

First, the basic concept of this coefficient correction will be described. When the input signal is gated, the rising edge of the gate waveform should be as steep as possible in order not to lose the rising portion of the envelope waveform, but the gate waveform is too steep even though the rising edge of the gated input signal is gentle. When applied to an electronic musical instrument or the like, for example, a sudden change in volume is felt at the beginning, which gives an unnatural feeling. Therefore, the rise coefficient Kup is set to a value that is most suitable for the rise of the input signal at that time when the coefficient is set. However, when an input signal with a steeper rise is input after that, the steep input signal is increased. In this case, the rising coefficient should be corrected sequentially. On the other hand, with respect to the falling coefficient Kdn, the falling coefficient Kdn is sequentially modified so as to match the falling characteristic of the currently input input signal.

When the coefficient generation unit 8 is instructed to finish the coefficient setting, it has the configuration shown in FIG. In this configuration, the opening / closing instruction signal from the opening / closing signal generator 3 operates in the section of the open signal "1" to correct the coefficient. That is, when a significant input signal is input, the timing generation unit 823 outputs the respective timing signals to and tc based on the switching instruction signal generated by the switching signal generator 3 in response to the input signal.
', To -tc is generated. Timing signal to -tc
Corresponds to the open / close instruction signal shown in FIG. 2, and the open signal “1”
During the period of, the coefficient generation unit 8 having this configuration performs processing.

The delay unit 801 and the divider 802 are the same as those described above, and the divider 802 is the envelope extraction unit 2
The change ratio R (t) of the envelope waveform from is calculated, and this change ratio R (t) is input to one input terminal of the comparator 814 and one input terminal of the adder 819.

The timing signal to generated by the timing generation unit 823 is a signal which becomes "1" only at the rising portion of the opening / closing instruction signal shown in FIG. 2, and is input to the switch 813 as a control signal. As a result, the switch 81
Reference numeral 3 is a rising portion of the switching instruction signal, and the rising coefficient Kup already set in the register 811 is supplied to the other input terminal of the comparator 814. When the rising portion is exceeded, the output signal of the 1-sample delay unit 815 is input to the other input terminal. The switching is controlled so that it is supplied to the terminals.

The comparator 814 compares the amplitude levels of the two input signals, selects the larger one, and outputs the output signal Ro.
It is a circuit that outputs as (t) '. The comparator 814 supplies the output signal Ro (t) 'to the limiter 816 and also to the delay device 815. The limiter 816 limits the minimum value of the input signal Ro 'by the following equation and outputs it. Ro (t) = Max [ro (t) ', Rmin] (where, Rmin is the minimum value of the preset rise coefficient) This equation, the input signal R _o (t)' If is greater than the minimum value Rmin This means that the minimum value Rmin is output instead of the input signal R _o (t) ′ if it is equal to or less than the minimum value Rmin. The reason for performing such limit processing is that it is not necessary to delay the rise of the gate waveform so much.

On the other hand, the timing signal tc 'of the timing generator 823 is a signal which becomes "1" only at time tc' (see FIG. 2) which is a predetermined time before the falling edge of the opening / closing instruction signal, and is controlled by the switch 812. It is input as a signal.
As a result, the switch 812 causes the falling coefficient Kdn set in the register 812 to be input to the other input terminal of the adder 819 via the inverter 818 at time tc ', which is a predetermined time before the falling portion of the switching instruction signal. It is supplied and is also supplied to one input terminal of the adder 821, and is 1 in the subsequent period.
It is switch-controlled to supply the output signal of the sample delay device 822. The output signal of the adder 819 is input to the other input terminal of the adder 821 via the multiplier 820 that multiplies the coefficient C, and the output signal of this adder 821 is the delay device 82.
2 is input.

Therefore, the configuration of the lower stage adder 819, coefficient multiplier 820, adder 821, delay device 822, inverter 818, and switch 817 is the timing signal t.
The following calculation is performed with the falling coefficient Rc held in the register 812 from the time of c ′ as an initial value: Rc (t) = C × {R (t) -Rc (t-1)} + Rc (t-1) (However, the value of c is 0 ≦ C ≦ 1) and the obtained value is supplied to the coefficient memory 7 as the falling coefficient Kdn.

The operation of the coefficient generator 8 when modifying the coefficient will be described below. When the open / close instruction signal generated by the open / close signal generator 3 becomes the open signal “1”, in the configuration including the comparator 814, the delay device 815, and the switch 811, the comparator 814 holds the rising coefficient held in the register 811. R
With o as the initial value, R (t) and the delay device 8 input sequentially
The operation of comparing the value of 15 and selecting and outputting the larger input signal is performed. Therefore, the maximum value is held in the delay device 815. The output value R _o (t) of this comparator 814
′ Is sequentially stored in the coefficient memory 7 as the rising coefficient Kup via the limiter 816. Therefore, the rising coefficient Kup
Changes with time, and the rising coefficient Kup set by the above-mentioned coefficient setting operation is sequentially corrected.

On the other hand, the lower stage adder 819 and coefficient multiplier 8
In the configuration including 20, adder 821, delay device 822, inverter 818, and switch 817, the following calculation is performed using the falling coefficient Rc held in the register 812 from the time of the timing signal tc ′ as an initial value. Rc (t) = C * {R (t) -Rc (t-1)} + Rc (t-1) is performed.

The processing by this arithmetic expression is performed by the falling coefficient R
c (t) is the initial value Rc (t
-1) is a process of approaching the value R (t) that is sequentially input with the passage of time. When the coefficient C is "0", the falling coefficient Rc (t) is the initial value Rc. (t-1) is maintained as it is, and when the coefficient C is "1", the falling coefficient Rc
It means that (t) is immediately replaced by the input value R (t), and the closer the coefficient C is to “1”, the lower the coefficient Rc.
The time when (t) approaches the input value R (t) becomes shorter.

When the open / close instruction signal falls from the open signal "1" to the close signal "0", the processing of the coefficient generating section 8 ends, and the falling coefficient Kdn of the coefficient memory stored at that time.
The gate waveform falls accordingly.

In implementing the present invention, various modifications other than those described above are possible. For example, in the above-described embodiment, the threshold values Tho and Thc, the rising coefficient Kup, and the falling coefficient Kdn are set according to the amplitude level of the envelope waveform of the input signal, but of course the present invention is not limited to this. Alternatively, it may be performed based on the rate of change of power.

Further, in the coefficient correction operation in the coefficient generator 8, the rising coefficient is corrected in response to each input of a steep rising edge as an input signal, but the present invention is not limited to this, and it is already set. It is also possible to take an average of the rising coefficient and the rising coefficient obtained from the newly input signal and set this as the new rising coefficient. The same applies to the falling coefficient.

Although the gate waveform generator 6 used in the above description forms a gate waveform by calculation, the rising and falling portions of the gate waveform are stored in advance as sampling data and read out. The rising characteristics and the falling characteristics may be controlled by controlling the speed. Alternatively, if the gate waveform is generated by calculation based on the table, the rising characteristic or the falling characteristic may be controlled by controlling the table data. Alternatively, if a charge / discharge curve or a straight line is simply used as the gate waveform, the rising characteristic and the falling characteristic may be controlled by controlling the time constant data.

[0073]

As described above, according to the present invention, regarding the setting of the threshold value in the gate processing device,
Appropriate settings are possible with simple work. Further, regarding the setting of the gain change characteristic at the time of opening / closing the gate, it is possible to make an appropriate setting by a simple operation, and further, it is possible to follow the change of the state of the input signal and make the optimum setting in real time.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a gate processing apparatus as an embodiment of the present invention.

FIG. 2 is a diagram showing a waveform of each signal in the apparatus of the embodiment.

FIG. 3 is a diagram showing a functional block configuration of a gate waveform generator in the apparatus of the embodiment.

FIG. 4 is a diagram showing a functional block configuration of a threshold value generation unit in the device of the embodiment.

FIG. 5 is a diagram showing a functional block configuration when a coefficient is set in a coefficient generation unit in the apparatus of the embodiment.

FIG. 6 is a diagram showing a functional block configuration when a coefficient is corrected by a coefficient generation unit in the embodiment apparatus.

[Explanation of symbols]

1 Gate Processing Unit 2 Envelope Extraction Unit 3 Switching Signal Generator 4 Threshold Value Memory 5 Threshold Value Generation Unit 6 Gate Waveform Generator 7 Coefficient Memory 8 Coefficient Generation Unit

Claims (3)

[Claims] 1. A gate means for controlling passage of an input signal by opening and closing, and an opening and closing instruction means for generating a signal for instructing opening and closing of the gate means by comparing the magnitude of the input signal with a predetermined threshold value. And an operating means for instructing the setting of the threshold, and when the operating means instructs the setting of the threshold, the magnitude of the input signal is measured and the threshold is calculated based on the measured value. And a threshold value setting means for setting the threshold value of the opening / closing instruction means. 2. A gate means for controlling passage of an input signal by opening and closing by gain change, and a gain instructing means for instructing the gate means to change a gain with a predetermined gain change characteristic in response to arrival of the input signal. Operation means for instructing the setting of the gain change characteristic, and when the operation means instructs the setting of the gain change characteristic,
A gate processing device comprising: a change characteristic setting unit that measures an envelope waveform of the input signal and sets a gain change characteristic calculated based on the measurement result as a gain change characteristic of the gain instruction unit. 3. Gate means for controlling passage of an input signal by opening and closing by a gain change, and gain instructing means for instructing the gate means to change a gain with a predetermined gain change characteristic in response to arrival of the input signal. An input signal detecting means for detecting the arrival of the input signal, and a gain change calculated based on the measurement result of the envelope waveform of the input signal when the arrival of the input signal is detected by the input signal detecting means. And a change characteristic correcting unit that corrects the gain change characteristic of the gain instruction unit according to the characteristic.