JPH09116595A - Serial communication processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten communication processing time by distributing a header part judgement processing for judging whether or not plural data are normally received and a check sum processing for accumulating the data so as to find the errors of the plural data of messages among the intervals of the data and performing them. SOLUTION: This serial communication processor is composed of a master ECU(electronic control unit) 1 and plural slave ECUs 2 for receiving request message data from the master ECU 1 and transmitting responses. Then, the header part judgement processing for judging whether or not the plural data of the header parts of the messages are normally received and the check sum processing for accumulating the data so as to find the errors of the plural data of the messages are distributed among the intervals of the data and performed. By the means, a processing after ending message reception is shortened and thus, the waiting time of the other processings is reduced and responsiveness is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial communication processing device for serially communicating a plurality of data as a message, and an object of the present invention is to provide a serial communication processing device capable of shortening the communication processing time. .

[0002]

2. Description of the Related Art FIG. 8 is a diagram for explaining a conventional serial communication processing device, and FIG. 9 is a diagram showing a transmission / reception buffer. As shown in FIG. 8, in the conventional serial communication processing device, one message received serially includes a header part of a plurality of data and a data part of a plurality of data. Checksum (CS) data is provided at the end of the data section. The reception data is sequentially stored in the reception buffer shown in FIG. Each data consists of 1 byte.

When it is determined that the message has been received, the normal reception of the header portion is determined (header portion check). Next, the checksum (CS) is used to determine whether the data portion is normally received. That is, a value obtained by adding the first to n-th data is obtained, and it is determined whether the added value and the checksum data value match (CS check).

If these judgments are normal, the response data for the received data is stored in the transmission buffer as shown in FIG. 9, transmission is started and the response processing is ended.

[0005]

By the way, in the serial communication processing device, after the message end judgment, during the header part check, the data part check, and the response process,
Other processes having lower priority than this serial communication process are interrupted (see FIG. 8). However, if this interruption process is long, there is a problem that other processes are delayed. Further, even if there is an error in the header part, the receiving process is performed to the end, so that there is a problem that the receiving process from the time of occurrence of the error to the end is untimely. Furthermore, the data storage capacities of the reception buffer and the transmission buffer are determined based on the maximum number of bytes negotiated in communication, but at this time, there is a problem in that the storage capacity should be as small as possible.

Therefore, in view of the above problems, the present invention can shorten the time of interruption of other processing, shorten the wasteful reception processing time when there is an error in the header portion, and reduce the storage capacity of the transmission / reception buffer. An object is to provide a serial communication processing device.

[0007]

In order to solve the above problems, the present invention provides a serial communication processing device for serially communicating a plurality of data as a message, in which a plurality of data in the header part of the message is normally processed. A header part determining process as to whether the data has been received and a checksum process for accumulating data to find an error in a plurality of data of the message are dispersed and performed in intervals of the data. By this means, the processing after the reception of the message is shortened, so that the waiting time of other processing is reduced and the responsiveness can be improved.

In the distributed header determination processing, the subsequent communication processing may be terminated when there is an abnormality in reception. By this means, by checking the data content for each reception, it is possible to speed up error detection and to omit unnecessary processing thereafter. A reception buffer having a storage capacity of one data may be used for the distributed header determination process and the checksum process. By this means, the receiving buffer can be reduced from the maximum number of bytes negotiated in communication to a capacity of 1 byte.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. 1 is a diagram showing a serial communication processing device according to an embodiment of the present invention, and FIG.
3 is a diagram showing a transmission / reception buffer in FIG. As shown in the figure, the serial communication processing device includes a master ECU (electronic control device) 1 and a plurality of slaves E that receive request message data from the master ECU 1 and send a response.
And a CU (electronic control unit) 2. Each slave ECU
Reference numeral 2 denotes an input / output circuit 21 for the master ECU 1 and a serial buffer 22 including a transmission buffer and a reception buffer.
And a memory 23 and a calculation unit 24. Here, as shown in the figure, the data storage capacity of the transmission buffer is determined based on the maximum number of bytes negotiated in the communication, but the reception buffer has a data storage capacity of 1 as described later.
The amount of data is, for example, 1 byte.

FIG. 3 is a diagram showing the structure of serial reception of a request message from the master ECU 1. As shown in the figure, the structure of the serial communication of the request message is as follows: format byte data indicating the origination ID, target address data indicating the destination ID, destination ID
With the source address data that indicates the service ID and the service ID that indicates the service ID that the user supports.
It is a figure which shows the structure of the serial reception which consists of data, the data of parameter 1, ..., The data of parameter n, and the data part which has checksum data. Each data is 1 byte, the time interval of each data is 1 ms, the interval between the header part and the data part is 0 to 20 ms,
The interval between each data is several μs.

FIG. 4 is a diagram showing timings for explaining reception and response processing of the serial communication processing device according to the embodiment of the present invention. As shown in the figure,
In the response process, the header section check, the CS check data addition process, the setting of the response data in the transmission buffer, etc. are performed every time the serial data is received. In other words, since the process that was conventionally performed in the determination process after the end of message reception is distributed for each serial data reception, the time required for the determination process after the end of message reception is the time (t2) of the present invention in comparison with the conventional time (t1). ) Becomes shorter. Then, the other processing time becomes shorter. The details will be described below.

5 and 6 show reception / sending of the slave ECU 2.
It is a flow chart explaining response processing. Step S
At 1, input serial data into the receive buffer,
The data reception interrupt process is performed for each input, and 1 is added to the reception counter value CRCV. In step S2, it is determined whether or not the reception counter value> the maximum transmission (MAX) number is satisfied. If this determination is "YES", the process proceeds to step S3, and if "NO", the process proceeds to step S4.

In step S3, if the reception counter value exceeds the maximum number of transmissions, the communication is ended and the interruption is ended. Here, upon completion of communication, communication timing initialization and communication memory all clear are performed. In step S4, if the reception counter value does not exceed the maximum number of transmissions, it is determined whether or not the reception counter value CRCV = 1 holds. If this determination is "YES", the process proceeds to step S5, and if "NO", the process proceeds to step S7.

In step S5, it is determined whether the format byte of the header part is normally received.
If this determination is “YES” and the reception is normal, step S2
If it is "NO", the process proceeds to step S6. If the reception of the format byte in the header portion is abnormal in step S6, the communication is ended and the interruption is ended.

In step S7, it is determined whether or not the reception counter value CRCV = 2 holds. If this determination is "YES", the process proceeds to step S8, and if "NO", the process proceeds to step S10. In step S8, it is determined whether the reception of the target address in the header is normal. If this determination is "YES" and the reception is normal, the process proceeds to step S21, and if "NO", the process proceeds to step S9.

If the reception of the target address in the header is abnormal in step S9, the communication is ended and the interruption is ended. In step S10, it is determined whether or not the reception counter value CRCV = 3 holds. If this determination is "YES", the process proceeds to step S11, and if "NO", the process is step S13.
Proceed to.

In step S11, it is determined whether or not the source address of the header is normally received. If this determination is "YES" and the reception is normal, step S21.
And if "NO", proceed to step S12. If the reception of the source address in the header is abnormal in step S12, the communication is ended and the interruption is ended.

In step S13, it is determined whether or not the reception counter value CRCV = 4 holds. If this determination is "YES", the process proceeds to step S17, and if "NO", the process is step S14.
Proceed to. In step S14, it is determined whether the service ID in the header is normally received. If this determination is "YES", the process proceeds to step S15, and if "NO", the process proceeds to step S16.

If the reception of the service ID in the header is normal in step S15, the service is set and the process proceeds to step S21. In step S16, if the reception of the service ID in the header is abnormal, the communication process ends and the interrupt ends. In the above steps, since it is determined whether or not the data in the header part is normal, it is not necessary to check the header part after the reception of the message.

In step S17, if the reception counter value CRCV> 4, the parameter ID is read. In step S18, it is determined whether or not the parameter value is met. If this determination is "YES", the flow proceeds to step S19, and if "NO", the flow proceeds to step S20. Step S1
In 9, when the parameter value does not correspond to the parameter value, the reception data is set in the transmission buffer, and the interrupt ends. This received data is the last received data.

In step S20, if the parameter value corresponds to the parameter value, the response data of the parameter ID is set in the transmission buffer according to the service. In step S21, the previous CS is read from the RAM (random access memory). In step S22, the following calculation is performed.

CS = CS + Received data In step S23, the CS is stored in the RAM, and the interruption is completed. In the above steps, since the checksum is performed every time the data of the header part and the data part is received, it is not necessary to perform the checksum after the reception of the message.

Further, since the header part check and the checksum are performed every time the data is received, the receiving buffer only needs to have a capacity for storing one byte of data. FIG. 7 is a flow chart for explaining the processing after receiving the message. In step S31, interruption is started upon completion of message reception. In step S32,
It is determined whether or not the checksum data of the last received data portion matches the checksum CS made in step S22. If this determination is "YES", the process proceeds to step S33, and if "NO", the process proceeds to step S35.

If they match in step S33, the transmission data stored last in step S20 is deleted. In step S34, the header data for transmission and the checksum data are set in the transmission buffer. In step S35, the transmission process is started and the interruption is ended.

If they do not match in step S36, the communication is ended and the interruption is ended. In this way, the number of processes after the reception of a message is significantly reduced as compared with the conventional technique, and the waiting time for other processes is shortened.

[Brief description of the drawings]

FIG. 1 is a diagram showing a serial communication processing device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a transmission / reception buffer in FIG.

FIG. 3 is a diagram showing a configuration of serial reception of a request message from a master ECU 1.

FIG. 4 is a diagram showing a timing for explaining reception and response processing of the serial communication processing device according to the embodiment of the present invention.

FIG. 5 is a flowchart illustrating a reception / response process of slave ECU 2.

FIG. 6 is a flowchart illustrating a reception / response process of slave ECU 2.

FIG. 7 is a flowchart illustrating a process after receiving a message.

FIG. 8 is a diagram illustrating a conventional serial communication processing device.

FIG. 9 is a diagram showing a transmission / reception buffer.

[Explanation of symbols]

 1 ... Master ECU 2 ... Slave ECU 21 ... Transmission / reception buffer

Claims (3)

[Claims] 1. A serial communication processing device that serially communicates a plurality of data as a message, wherein a header part determination process as to whether or not a plurality of data in the header part of the message is normally received, and a plurality of data of the message are received. A serial communication processing apparatus, wherein checksum processing for accumulating data to find an error is performed in a distributed manner during intervals of the data. 2. The serial communication processing device according to claim 1, wherein the distributed header determination processing ends subsequent communication processing when reception is abnormal. 3. The serial communication processing device according to claim 1, wherein a distributed reception buffer having a storage capacity of one data is used for the header determination processing and the checksum processing.