JPH0897442A - Compound semiconductor epitaxial wafer and semiconductor device - Google Patents

Abstract

PURPOSE: To make an interfacial carrier profile of an p-n junction with an n-type GaAs layer by making an accepter in a p<+> type GaAs layer to be carbon. CONSTITUTION: A GaAs epitaxial wafer for VCD having a carbon-doped p<+> type GaAs layer is formed. High-purity hydrogen gas is made to flow inside a furnace as carrier gas, an n<+> type GaAs substrate 1 is placed in a furnace so as to raise a susceptor temperature up to 650 deg.C while making AsH3 gas to flow. TMG gas, AsH3 and Si2 H6 gases are made to flow so as to grow an n-type GaAs layer 2 on the GaAs substrate 1 at 650 deg.C. Thereby, the n-type GaAs layer, of which carrier concentration changes by 5×10<15> to 2×10<17> cm<-3> , is formed. Temperature is lowered down to 500 deg.C, TMG and AsH3 are made to flow so that the ratio of AsH3 /TMG may be 2 in order to grow a p<+> type GaAs layer 4 having acceptor concentration of 1×10<19> cm<-3> . Carbon has a smaller diffusion coefficient in GaAs as compared to zinc so as to make a carrier profile of a p-n junction interface with an n-type GaAs layer to be steep.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor epitaxial wafer and a semiconductor device for a variable capacitance diode, and more particularly to an improved pn interface.

[0002]

2. Description of the Related Art A conventional variable capacitance diode (hereinafter referred to as VC
An example of the structure of a GaAs epitaxial wafer for (abbreviated as D) is shown in FIG. Si-doped n on n ⁺ type GaAs substrate 1
-Type GaAs layer and Zn-doped p ⁺ -type Ga on the GaAs layer
The As layer is formed. Thus, conventionally, p
^As an acceptor impurity in the ⁺ type GaAs layer, zinc (Z
n) was doped.

[0003]

However, Zn, which is an acceptor impurity, has a problem in that it has a large diffusion coefficient in GaAs and cannot form a pn junction having a steep carrier profile. Further, when the acceptor concentration becomes high, there is a problem that crystal defects are likely to be formed in the p ⁺ type GaAs layer or near the pn junction interface, which adversely affects device characteristics such as deep level.

An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a compound semiconductor epitaxial wafer having a pn junction with a sharp carrier profile and few crystal defects.

Another object of the present invention is to provide a semiconductor device having improved VCD characteristics by using the above epitaxial wafer.

[0006]

A compound semiconductor epitaxial wafer of the present invention comprises an n ⁺ type GaAs substrate, an n type GaAs layer having a carrier concentration varying in the thickness direction, and
In a compound semiconductor epitaxial wafer for a variable capacitance diode in which a high-concentration p ⁺ -type GaAs layer is sequentially laminated, carbon is used as an acceptor in the p ⁺ -type GaAs layer.

In the semiconductor device of the present invention, a Schottky electrode is provided on the side of the p ⁺ type GaAs layer constituting the wafer,
Ohmic electrodes are provided on the n ⁺ type GaAs substrate side, respectively.

[0008]

Function: Carbon has a much smaller diffusion coefficient in GaAs than zinc, and it is hard to form crystal defects. Therefore, if the acceptor in the p ⁺ -type GaAs layer is carbon, n-type GaA
The carrier profile at the interface of the pn junction with the s layer can be made steep. Further, even if the acceptor concentration becomes high, crystal defects are unlikely to be formed in the p ⁺ type GaAs layer or in the vicinity of the pn junction interface, so that the device characteristics such as deep level are not adversely affected, and the p ⁺ type GaAs layer is not affected. Crystal quality is improved.

[0009]

EXAMPLES Examples of the compound semiconductor epitaxial wafer of the present invention and a semiconductor device using the wafer will be specifically described below with reference to Examples 1 to 3.

Example 1 Metal Organic Chemical Vapor Deposition (MOVP)
V) having a carbon-doped p ⁺ -type GaAs layer by the method E)
A GaAs epitaxial wafer for CD was grown. The wafer structure is shown in FIG.

Purified high-purity hydrogen gas is used as a carrier gas during the growth and is constantly flown into a MOVPE reactor, and an n ⁺ type GaAs substrate 1 (having a plane orientation of (100)) is placed on the graphite susceptor in the furnace. The susceptor temperature was raised to 650 ° C. while flowing arsine (AsH ₃ ) gas.

Next, at 650 ° C., trimethylgallium (T
MG) gas, AsH ₃ and disilane (Si ₂ H ₆ ) gas were flown to grow an n-type GaAs layer 2 on the GaAs substrate 1 to a thickness of 2 μm. At this time, the flow rate of Si ₂ H ₆ was gradually changed to control the carrier profile in the n-type GaAs layer 2 so as to satisfy a desired capacitance-voltage characteristic. From this, the carrier concentration is 5 × 10 ¹⁵ to 2 × 10 ^{17 in the} thickness direction.
An n-type GaAs layer having a cm ⁻³ change was obtained.

Next, the susceptor temperature was lowered to 500 ° C. (AsH ₃ was flown during this time), and TMG and AsH ₃ were transferred to AsH.
Flowing with the ratio of ₃ / TMG to be 2, p ⁺ type Ga
The As layer 4 was grown to 0.2 μm. From this, a p ⁺ type GaAs layer having an acceptor concentration of 1 × 10 ¹⁹ cm ⁻³ was obtained. Control of the acceptor concentration is performed by the AsH ₃ / TMG ratio, the growth temperature,
It can be controlled by changing the growth pressure and the gas flow rate in the furnace.

FIG. 2 shows a GaAs epitaxial wafer for VCD having this carbon-doped p ⁺ -type GaAs layer as a SIM.
The depth profile of carbon obtained by S (secondary ion mass spectrometry) analysis is shown in comparison with the profile of Zn of the GaAs epitaxial wafer for Zn-doped VCD.

From this, it was found that a steep p ⁺ n junction interface can be obtained by using carbon as the acceptor impurity of the p ⁺ type GaAs layer.

The typical conditions for the above epitaxial growth are: hydrogen flow rate 20 l / min, TMG flow rate 2 cc / min,
AsH ₃ flow rate of 4 cc / min (during p ⁺ type GaAs layer growth), 40 cc / min (during n type GaAs layer growth), Si ₂ H ₆ flow rate of 2 × 10 ^-6 cc / min to 2 × 10 ^-4 cc / min. The growth furnace is a vacuum vertical furnace.

Of course, these conditions are AsH ₃ and TM
G flow rate ratio (which controls the carrier concentration of the p ⁺ type GaAs layer) and Si ₂ H ₆ and TMG flow rate ratio (n type GaA
The carrier concentration of the s layer is controlled)
It can be changed over a wide range. For example, if the average gas flow rate in the furnace is increased, it is possible to grow even at normal pressure.

Example 2 A VCD epitaxial wafer having a carbon-doped p ⁺ -type GaAs layer was grown by MOVPE method. N ⁺ type GaA by changing the flow rate of Si ₂ H ₆
The process is the same as in Example 1 until the n-type GaAs layer is grown on the s substrate.

Then, the supply of Si ₂ H ₆ was stopped, carbon tetrachloride (CCl ₄ ) was made to flow as a carbon dopant, and a p ⁺ type GaAs layer was grown to a thickness of 0.2 μm. From this, a p ⁺ type GaAs layer having an acceptor concentration of 1 × 10 ¹⁹ cm ⁻³ was obtained. The acceptor concentration was controlled by changing the flow rate of CCl ₄ .

The structure and carrier profile of the GaAs epitaxial wafer for VCD thus grown are the same as those in FIGS. 1 and 2. FIG. 3 shows the depth profile of carbon obtained by SIMS analysis in comparison with that of a Zn-doped VCD GaAs epitaxial wafer.

From this, it was found that a steep p ⁺ -type n-junction interface can be obtained by using carbon as the acceptor impurity of the p ⁺ -type GaAs layer.

The typical conditions for the above epitaxial growth are as follows: hydrogen flow rate 20 l / min, TMG flow rate 2 cc / min,
AsH ₃ flow rate 40cc / min, CCl ₄ flow rate 2cc / min, S
The i ₂ H ₆ flow rate is 2 × 10 ⁻⁶ cc / min to 2 × 10 ⁻⁴ cc / min. The growth furnace is an atmospheric vertical furnace.

Of course, these conditions can be changed over a wide range by appropriately selecting the flow rate of CCl _{4 and} the flow rate ratio of Si ₂ H ₆ and TMG.

An epitaxial wafer having similar characteristics can be obtained by using carbon tetrabromide (CBr ₄ ) as a carbon dopant (NI Bucha et al.).
c, Journal of Crystal Grow
th 110 (1991) 405-414). The flow rate of CBr ₄ is 1 cc / min under the above growth conditions.

(Embodiment 3) As shown in FIG. 4, a semiconductor device was manufactured using the GaAs epitaxial wafer for VCD described in Embodiments 1 and 2. An Al electrode 5, which is a Schottky electrode, and an n ⁺ type GaA on the surface of the p ⁺ type GaAs layer 4.
s AuGeNi electrode 6 is vapor-deposited on the surface of substrate 1
The eNi electrode 6 side was alloyed in N ₂ at 450 ° C. for 10 minutes to form an ohmic electrode. Then, a general device forming process such as forming a protective film, dicing, packaging, wire bonding and the like was performed to form a VCD device. The produced VCD element showed good characteristics.

[0026]

According to the compound semiconductor epitaxial wafer of the present invention, since the dopant of the p ⁺ type GaAs layer is carbon, the pn of the p ⁺ type GaAs layer and the n type GaAs layer is formed.
The carrier profile at the junction interface can be made steep, crystal defects can be reduced, and the crystal quality of the p ⁺ -type GaAs layer can be improved.

According to the semiconductor device of the present invention, the carrier profile has a pn junction interface having a steep profile, and p ⁺ -type GaA
Since the crystal quality of the s layer is high, the variable capacitance diode characteristics can be improved.

[Brief description of drawings]

FIG. 1 is a Ga for carbon (C) -doped VCD for explaining an example of a compound semiconductor epitaxial wafer of the present invention.
Sectional drawing which shows the structure of an As epitaxial wafer.

FIG. 2 is a diagram showing a carrier profile of a GaAs epitaxial wafer for C-doped VCD of this example.

FIG. 3 is a diagram showing a carbon depth-direction profile of a C-doped VCD epitaxial wafer of this example by SIMS analysis.

FIG. 4 is a sectional view of a VCD showing an embodiment of a semiconductor device of the present invention.

FIG. 5 is a sectional view showing the structure of a conventional GaAs epitaxial wafer for Zn-doped VCD.

[Explanation of symbols]

1 n ⁺ type GaAs substrate 2 Si-doped n-type GaAs layer 4 C-doped p ⁺ type GaAs layer 5 Al electrode (Schottky electrode) 6 AuGeNi electrode (ohmic electrode)

Claims (2)

[Claims] 1. An n-type GaAs layer having a carrier concentration varying in the thickness direction and a high-concentration p-type on an n ⁺ -type GaAs substrate.
^In a compound semiconductor epitaxial wafer for a variable capacitance diode in which ⁺ type GaAs layers are sequentially stacked,
A compound semiconductor epitaxial wafer, wherein the acceptor in the ⁺ -type GaAs layer is carbon. 2. A compound semiconductor epitaxial wafer according to claim 1, wherein a Schottky electrode is provided on the p ⁺ type GaAs layer side and an ohmic electrode is provided on the n ⁺ type GaAs substrate side. .