JPH0897203A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To prevent generation of deterioration of device characteristics like insufficient withstand voltage of an oxide film, at the time of field oxidation at 1050 deg.C or higher, when element isolation structure is formed, by forming a polysilicon film at a temperature higher than or equal to a specified value, and forming a silicon nitride film whose film thickness is in a specified range. CONSTITUTION: A Pad oxide film 2, a polysilicon film 3 and a silicon nitride film 4 are formed in order on a silicon substrate 1. The silicon nitride film 4 is used as a mask, and element isolation structure is formed by field oxidation. In this case, the polysilicon film 3 is formed at 600 deg.C or higher, and the silicon nitride film 4 is formed to be 100-180nm thick. The field oxidation is performed at 1050 deg.C or higher. For example, the Pad oxide film 2 is grown to be several nm thick on the silicon substrate 1, and the polysilicon film 3 is grown on the Pad oxide film 2 to be about 50nm thick by an LPCVD method at 624 deg.C. Further, an Si3 N4 film 4 whose thickness is in the range from 100nm to 180nm is grown by an LPCVD method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device including a step of forming an element isolation structure by polybuffered LOCOS.

[0002]

2. Description of the Related Art Poly-buffered LOCOS is a technique for selectively oxidizing silicon with a structure in which a polysilicon film is sandwiched between a pad oxide film and a silicon nitride film. This technique has a feature that bird's beaks generated at the edges of the field oxide film can be reduced.

A conventional element isolation structure forming method using poly-buffered LOCOS will be described below with reference to FIG. First, a pad oxide film 2 of 20n is formed on the silicon substrate 1.
m film is formed, and a polysilicon film 33 is formed thereon by LPCV.
It is formed to a thickness of about 50 nm by the D (Low Pressure Chemical Vapor Deposition) method, and the silicon nitride film 34 is formed thereon.
Is similarly formed to a thickness of about 200 nm by the LPCVD method (FIG. 3A). Next, after applying a resist on the silicon nitride film 34, patterning is performed to form a resist pattern 5 (FIG. 3B). Then, only the silicon nitride film 34 exposed at the opening is removed by dry etching using the resist pattern 5 as a mask (FIG. 3C). After that, the resist pattern 5 is removed (FIG. 3D), and the polysilicon film 33 and the silicon substrate 1 are oxidized at a temperature of about 1050 ° C. to form a field oxide film 6 (FIG. 3E). .

[0004]

When field oxidation is performed at a temperature lower than 1050 [deg.] C. in the step shown in FIG. 3 (e), as shown in FIG. Voids 7 (unevenness, holes, etc.) occur at the edge portion 8 with the element isolation region. When the void 7 is generated in the edge portion 8 of the polysilicon film 33,
At the time of removing the polysilicon film 33, excessive over-etching is applied to the lower portion of the void 7 to give damage to the silicon substrate 1, so that there is a problem that the reliability of a capacitor oxide film to be formed later is lowered. Occurs. Note that FIG. 4 shows the step (e)
3 is a top view schematically showing the polysilicon film 33 in FIG. On the other hand, if the field oxidation is performed at 1050 ° C. or higher, the hardness of the field oxide film 6 can be lowered by the high temperature oxidation, so that the stress acting on the edge portion 8 of the polysilicon film 33 is relaxed. It is possible to prevent the generation of the void 7.

However, when the field oxidation is performed at a temperature higher than 1050 ° C., the device characteristics may be deteriorated depending on the thickness of the silicon nitride film 34. That is, if the silicon nitride film 34 is too thick, there is a problem that stress is applied to the edge portion 8 too much and the oxide film withstand voltage defect occurs. On the contrary, if the silicon nitride film 34 is too thin, the silicon nitride film 34 becomes a mask for selective oxidation. There is a problem in that the shape of the edge portion 8, that is, the so-called bird's beak shape becomes large.

The present invention has been invented in view of the above problems, and when forming an element isolation structure, 1050
An object of the present invention is to provide a method of manufacturing a semiconductor device which does not cause deterioration of device characteristics such as defective oxide film withstand voltage even if field oxidation is performed at a temperature of ℃ or higher.

[0007]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises a step of sequentially forming a pad oxide film, a polysilicon film and a silicon nitride film on a silicon substrate to form a silicon nitride film. A method of manufacturing a semiconductor device, comprising the step of forming an element isolation structure by performing field oxidation using a film as a mask, wherein a polysilicon film is
It is characterized in that it includes a step of forming the silicon nitride film having a film thickness of 100 nm to 180 nm and a step of performing field oxidation at 1050 ° C. or more.

[0008]

If the polysilicon film is formed at a temperature of 600 ° C. or higher and the thickness of the silicon nitride film is 100 to 180 nm, even if the field oxidation is performed at a temperature of 1050 ° C. or higher, the element isolation region and the active region are not separated. Relieves the stress that acts on the edge,
It was confirmed by an experiment that deterioration of device characteristics such as oxide film withstand voltage characteristics can be suppressed. Therefore, by using the method for manufacturing a semiconductor device according to the above method, without generating a void in the edge portion of the polysilicon film,
Further, the element isolation structure can be formed without deteriorating the device characteristics such as the oxide film breakdown voltage characteristics. In addition,
It was also confirmed by experiments that if the polysilicon film is formed at a temperature not exceeding 600 ° C., the oxide film breakdown voltage characteristics are significantly deteriorated. Therefore, the polysilicon film must be formed at 600 ° C. or higher.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings. FIG. 1 shows a poly-buffered LO based on a method for manufacturing a semiconductor device according to an embodiment.
It is sectional drawing which showed each process typically when forming the capacitor which has a COS element isolation structure.

Step (a): A Pad oxide film 2 is grown on the silicon substrate 1 to a thickness of about 20 nm, and 624 ° C. and L are formed thereon.
The polysilicon film 3 is grown to a thickness of about 50 nm by the PCVD method. Further, a Si ₃ N ₄ film 4 as a silicon nitride film is grown by LPCVD in the range of 100 nm to 180 nm.

Step (b): After applying a resist on the Si ₃ N ₄ film 4, patterning is performed to form a resist pattern 5.
To form. Step (c): The Si ₃ N ₄ film 4 in the opening is etched using the register pattern 5 as a mask. Step (d): The resist pattern 5 is removed. Step (e): Field oxidation is performed at a temperature of about 1050 ° C. to form a field oxide film 6.

Step (f): Si ₃ remaining in the active region
The N ₄ film 4, the polysilicon film 3 and the Pad oxide film 2 are sequentially removed. Step (g): After forming a new capacitor oxide film 9 on the silicon substrate 1, a low resistance polysilicon film 1 to be an electrode
0 is deposited and the low resistance polysilicon film 10 is patterned to form a capacitor having a polybuffered LOCOS element isolation structure.

FIG. 2 is a graph showing the Si ₃ N ₄ film thickness dependency of the oxide film breakdown voltage non-defective rate of the capacitor formed according to the above process. In FIG. 2, the horizontal axis represents the film thickness (nm) of the Si ₃ N ₄ film 4, and the vertical axis represents the non-defective rate (%).
In addition, △ mark shows the case where the field oxidation was performed at 1000 ° C., ○ mark shows the case where the field oxidation was performed at 1050 ° C., and □ mark shows the case where the field oxidation was performed at 1070 ° C. Is shown.

The Si ₃ N ₄ film 4 has a film thickness of 100 to 180 n.
m, 1000 ° C., 1050 ° C. and 1070
Approximately 10 even if field oxidation is performed at any temperature of ° C.
The yield rate is 0%. The thickness of the Si ₃ N ₄ film 4 is 2
In the case of 00 nm, the yield rate is about 50% when the field oxidation temperature is 1050 ° C., the yield rate is about 30% when the field oxidation temperature is 1070 ° C., and the film thickness of the Si ₃ N ₄ film 4 is 100 to 1
The non-defective rate is significantly lower than that in the case of 80 nm.
Even when the film thickness of the Si ₃ N ₄ film 4 is 200 nm, the yield rate is almost 100% when the field oxidation temperature is 1000 ° C. However, in this case, voids are generated in the polysilicon film 3 and the reliability of the capacitor oxide film 9 to be formed later is deteriorated.

As described above, the polysilicon film 3 is formed at a temperature of 600 ° C. or higher at 624 ° C., and the film thickness of the Si ₃ H ₄ film 4 which is a silicon nitride film is 100 nm to 18 nm.
When the thickness is set to 0 nm, it is possible to form a capacitor having an element isolation structure in which the breakdown voltage does not deteriorate in the capacitor oxide film 9 even when the field oxidation is performed at a high temperature of 1050 ° C. or higher in the step of FIG.

[0016]

As described above in detail, in the method of manufacturing a semiconductor device according to the present invention, the polysilicon film is kept at 600 ° C.
The silicon nitride film having a thickness of 100 nm to 1 is formed as described above.
Since the thickness is set to 80 nm, the element isolation structure is formed without causing deterioration of device characteristics such as deterioration of oxide film withstand voltage characteristics even if field oxidation is performed at a high temperature of 1050 ° C. or higher so that a void is not generated in the polysilicon film. be able to.

[Brief description of drawings]

FIG. 1 is a cross-sectional view schematically showing each step in the case of manufacturing a capacitor having a poly-buffered LOCOS element isolation structure based on a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a graph showing the relationship between the yield ratio of oxide film non-defective products and the Si ₃ N ₄ film thickness.

FIG. 3 is a cross-sectional view schematically showing a method of forming an element isolation structure based on a conventional method of manufacturing a semiconductor device.

FIG. 4 is a top view schematically showing a state in which a void has occurred in a polysilicon film.

[Explanation of symbols]

1 Silicon substrate 2 Pad oxide film 3 Polysilicon film 4 Si ₃ N ₄ film (silicon nitride film) 6 Field oxide film 8 Edge part (between active region and element isolation region)

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H01L 21/318 B 21/76

Claims (1)

[Claims] 1. A semiconductor device including a step of sequentially forming a Pad oxide film, a polysilicon film and a silicon nitride film on a silicon substrate and performing field oxidation using the silicon nitride film as a mask to form an element isolation structure. The manufacturing method includes the steps of forming a polysilicon film at 600 ° C. or higher, forming a silicon nitride film having a film thickness of 100 to 180 nm, and performing field oxidation at 1050 ° C. or higher. A method for manufacturing a semiconductor device, comprising: