JPH0888569A - Bit error measurer - Google Patents

Abstract

PURPOSE: To provide a measuring means which adops a method, which accurately measures the bit error of a signal requiring Viterbi decoding over a wide range in real time, and doesn't require 4 considerably large number of sample values even in the case of a low bit error rate. CONSTITUTION: This measurer consists of an A/D conversion means 1, a Viterbi decoding means 2, and a bit error measuring means 3. The input signal sampled by the A/D conversion means 1 is decoded in real time by the Viterbi decoding means 2 and is compared with a bit string free from error by the bit error measuring means 3, and error is discriminated and counted. Since it is unnecessary to store input data, measurement is performed in real time, and the storage capacity is not restricted. The clock used for processings of the A/D conversion means, the Viterbi decoding means, and the bit error discriminating means is generated by a synchronizing signal generation means 4 or is supplied from the outside.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bit error measuring device used in the fields of digital recording and digital communication.

[0002]

2. Description of the Related Art A read signal of a digital recording device that has been partial response equalized, a convolutionally coded received signal of a digital communication device, and the like are often subjected to Viterbi decoding in order to keep the bit error rate low. Hereinafter, the partial response is referred to as PR. An example of the signal is shown in FIG. 5 and will be described in detail. The signal E in the figure is a bit string of the original signal.
Note that the small vertical lines shown in the signal waveforms are not signals, but marks that indicate the clock intervals of bits. When the signal E is PR-equalized and read by the digital recording device, it becomes a signal as shown in A of FIG. A in the figure shows a signal when there is no bit error, but when measuring the bit error of the signal, there are the following problems. When the signal A is sampled, it becomes a sampled data string as shown by the row of round dots in FIG. The dotted line in the figure is an auxiliary line for showing the relationship with the signal A. In the sampled data, F and G are neither 0 nor 1. However, since the normal bit error measuring device is premised on that the input signal is a binary signal, the samples F and G are forcibly set to either 0 or 1 for measurement. Therefore, the bit error cannot be correctly measured for a bit string including a signal other than binary such as the sampled data string C.

Therefore, in order to correctly measure the bit error of the signal that requires Viterbi decoding, the conventional measuring instrument has the configuration shown in FIG. In this method, the input signal A is A / D
After sampling by the conversion means 1, the sampled signal C is stored in the storage means 9 of the sampled value, the stored data is read out, Viterbi decoding is performed by the calculation means 10, and then the bit error is calculated by the calculation means. It is calculated. The method of FIGS. 7 and 8 is used for sampling. In FIG. 7, one sample is taken for each bit in synchronization with the bits of the input signal A to obtain a sampled signal Ca. In FIG. 8, sampling is performed at a frequency sufficiently higher than the bit frequency without considering synchronization, and a sampled signal Cb is obtained.

Next, another example of the prior art will be shown. In FIG. 9, the sampled signal is decoded by the Viterbi decoding means 2. The decoded signal D is re-encoded by the encoding means 11 and compared with the input signal C by the bit error detection means 7 so that the bit error can be estimated easily. However, this method does not measure bit error in a strict sense because it does not compare with a bit string containing no error.

Further, in FIG. 10, the bit error detection is performed by the simple decoding means 12 by performing inverse convolution operation on the input signal C to simply decode the bit string and the bit string D decoded by the Viterbi decoding means 2. The bit error is simply estimated by comparison by means 7. However, since this is also not compared with a bit string that does not include an error, the bit error in a strict sense is not measured.

[0006]

DISCLOSURE OF THE INVENTION Like the method of FIG.
In the conventional method of once storing the sampled signal C in the storage means 9 and then performing Viterbi decoding by calculation, a huge number of sample values are required when the bit error rate is low, so that the storage capacity of the storage means 9 is limited. Due to this, there was a restriction that accurate measurement could not be performed. Moreover, since real-time measurement cannot be performed, the measurement takes time and the efficiency of research and development is deteriorated. The present invention is intended to solve the above-mentioned problems and to provide a means for accurately measuring the bit error of a signal requiring Viterbi decoding in a short time even in a wide range of bit error rates.

[0007]

As shown in FIG. 1, an A / D conversion means 1 for sampling an input signal A and a Viterbi decoding means 2 for Viterbi decoding the sampled signal C in real time.
And the bit error measuring means 3 as a component.

[0008]

The input signal A requiring Viterbi decoding is sampled by the A / D conversion means 1 and then decoded by the Viterbi decoding means 2 in real time. The bit error measuring unit 3 compares the bit string D decoded by the Viterbi decoding unit 2 with the bit string containing no error, determines an error, and counts the number of errors.

[0009]

1 is a block diagram showing an embodiment of the present invention. FIG. 2 shows each signal of FIG. The elements and signals having the same functions as those in the prior art are designated by the same reference numerals. The baseband signal of the read signal from the digital recording medium or the received signal of the digital communication is controlled to a proper input range for Viterbi decoding by the means for controlling the gain and the DC component, and then to the A / D conversion means 1. Input signal A. The input signal A is sampled by the A / D conversion means 1 and becomes a signal C. The synchronization signal B for A / D conversion and the subsequent processing may be provided by extracting the synchronization signal from the input signal by the synchronization signal generating means 4 or using a synchronization signal externally input.

The signal C sampled by the A / D conversion means 1 is input to the Viterbi decoding means 2 and subjected to predetermined decoding. The decoded bit string D is sent to the bit error measuring means 3. The configuration of the bit error measuring means 3 is shown in FIGS. 3 and 4. In FIG. 3, a bit string containing no error is stored in the storage means 5. The bit string stored in the storage means does not include an error and the decoded bit string D is compared by the bit error detection means 7 to detect the presence or absence of an error. If there is an error, the information is sent to the counting means 8. Further, in FIG. 4, the bit error detection means 7 compares the bit string not containing an error generated by the means 6 for generating a bit string not containing an error with the decoded bit string D to detect the presence or absence of an error. If there is an error, the information is sent to the counting means 8.

When an error is detected in the decoded signal, the counting means 8 counts and stores the number of errors.
Also, the bit error rate can be obtained by counting the total number of bits compared by the counting means provided separately. Although the embodiments of the present invention have been described above, the exemplary forms, arrangements, and the like are not limited, and modifications of the configuration are allowed as necessary without losing the gist of the present invention.

[0012]

EFFECT OF THE INVENTION In measuring a bit error of a signal which requires Viterbi decoding, such as a read signal from a digital recording medium or a convolutionally encoded digital communication signal,
A Viterbi decoding unit 2 is provided in front of the bit error measuring unit 3 to measure a bit error of a Viterbi-decoded bit string D in a short time, thereby measuring a bit error of a signal requiring Viterbi decoding in real time. You can

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing each signal in the configuration of FIG.

FIG. 3 is a diagram showing an example of a configuration of bit error measuring means.

FIG. 4 is a diagram showing an example of a configuration of a bit error measuring means.

FIG. 5 is a diagram showing an example of a PR equalized signal.

FIG. 6 is a diagram showing an example of a conventional technique.

FIG. 7 is a diagram showing signals of respective portions in FIG. 6 when sampling and a bit string cycle are synchronized.

FIG. 8 is a diagram showing signals of respective parts in FIG. 6 when the sampling frequency is higher than the frequency of an input bit string.

FIG. 9 is a diagram showing a conventional simple bit error measuring means.

FIG. 10 is a diagram showing a simple bit error measuring means of a conventional technique.

[Explanation of symbols]

 1: A / D conversion means 2: Viterbi decoding means 3: Bit error measuring means 4: Synchronous signal generating means 5: Means for storing a bit string containing no error 6: Means for generating a bit string containing no error 7: Bit error Detecting means 8: Counting means 9: Sampling value storage means 10: Calculation means 11: Encoding means 12: Simple decoding means A: Input signal requiring Viterbi decoding B: Synchronization signal C: Sampled signal Ca: Sampled signal Cb: Sampled signal D: Viterbi-decoded bit string E: Original bit string F: Non-binary signal sample G: Non-binary signal sample

Claims (1)

[Claims] 1. A / D conversion means for sampling an input signal,
An input requiring Viterbi decoding by having Viterbi decoding in real time on the signal sampled by the A / D conversion unit and measuring bit error of the signal decoded by the Viterbi decoding unit. A bit error measuring instrument characterized by measuring a bit error of a signal in real time.