JPH088779B2 - Pulse width modulation method for three-phase voltage source inverter - Google Patents

Description

TECHNICAL FIELD The present invention relates to a method for improving the output voltage waveform of a three-phase voltage type pulse width modulation inverter.

[Conventional technology and problems]

FIG. 6 is a block diagram showing the circuit configuration of a three-phase voltage type pulse width modulation inverter.

1 to 6 are, for example, bipolar transistors forming a switching element, 7 to 12 are diodes for regeneration, 13 is a DC power supply for supplying electric power, 14 is a smoothing capacitor, 15 is a load driven by an inverter output, 16 is a pulse width Modulation (PWM) control circuit.

In the PWM inverter, in order to control the output voltage, a plurality of drive pulses are applied to the switching element within a half cycle of the output voltage to control the pulse width of the output voltage.

In order to reduce the adverse effect of the harmonic components of the output voltage on the load, various waveform improvements such as unequal pulse width control have been made.

In recent years, due to the increased switching speed of switching elements, the 5th, 7th, 1
There are many proposals for reducing low-order harmonics such as 1st, 13th, and so on.

However, since the switching frequency is finite, the problem of high frequency related to that frequency, that is, the carrier frequency remains.

FIG. 7 is a voltage waveform diagram showing a method of generating a sinusoidal PWM waveform.

(A), (b), (c) is explanatory drawing of PWM corresponding to each phase u, v, w of the load 15.

The eu voltage command signal 71, ev voltage command signal 72, ew voltage command signal 73 of each phase is compared with the triangular wave carrier signal 70 to determine the pulse width of the output voltage pulse.
Voltages eu, ev, ew having a pulse width proportional to the amplitudes of the voltage command signals 71, 72, 73 are generated at v, w.

In the half cycle of the phase voltage command signal, the central 60 ° is not modulated and the switching element is kept ON.
The reason why only 60 ° is modulated is that the DC input voltage is effectively used for the output voltage, that is, the output voltage peak value can be up to the DC power supply voltage Edc, and the entire range (60 ° at both ends and 60 at the center).゜) Output voltage peak value in case of modulation Is.

The way to apply the phase voltage command signal to the switching element is to set 60 ° on both sides of the half cycle of the phase voltage command signal so that the line voltage value of the output, that is, the difference between the phases of the phase voltage command signal becomes a sine wave. Modulate.

That is, as shown in FIG. 11, the central portion 60 of the half-wave waveform is
Even if the three phase voltage command signals of eu, ev, and ew that are not modulated (flat) in the interval of 60 degrees and are modulated in the intervals of 60 degrees on both sides, the line voltage that is the difference between the phases is Corresponding eu-v, ev-w and ew-u are sine waves, respectively.
Looking at the line output voltage eu-v, the maximum value is obtained when θ = 60 degrees, and this value becomes the amplitude. Let this be a. Since this value corresponds to a shown in the eu voltage command signal, the amplitude can be controlled from 0 to Edc by changing this. Therefore, the modulation factor can be 100% when a = Edc.

12 (a) and 12 (b) show the relationship with the carrier signal in the section of θ of 0 to 60 degrees in the eu voltage command signal. In the figure, P indicates the virtual origin of the sine wave.

Expressing the eu voltage command signal and the ev voltage command signal in this section by a mathematical expression, eu = (Edc / 2) {2αsin (θ + 30 °) -1} (1) ev =-(Edc / 2) (2) Therefore, eu-v = eu-ev = Edcαsin (θ + 30 °) (3) From equation (3), it can be seen that a sinusoidal line voltage can be obtained. As a mode of control, in order to obtain a line voltage having a sine wave as shown in equation (3) and a maximum amplitude value being Edc,
Equation (1) is derived under the condition of equation (2), and modulation is performed based on this.

Therefore, in the pulse width modulation method of the inverter of such a system, the modulation degree α is the ratio of the amplitude a of the line voltage (amplitude on one side) to the amplitude b on both sides of the carrier signal, and the modulation degree α = a Defined as / b.

The output voltage waveform when this modulation method is performed is shown in FIG. That is, (a) is the output voltage eu, (b) is the output voltage ev, and (c) is the output phase (eu-ev) line voltage, respectively.

At this time, the modulation factor α = 0.5.PU, that is, the waveform voltage amplitude obtained by removing the carrier component of the output voltage by the ideal low-pass filter is 1/2 of the DC power supply voltage Edc.
Then, the number of carrier frequencies in the half cycle of the phase voltage command signal is 15, that is, carrier frequency fcarrier = output voltage frequency fout × 30.

By the way, normally, fcarrier is 2-3 KHz and fout is 1-6.
It is 0 to 300 Hz.

As can be seen from FIG. 9, the carrier frequency fcarrier
The high frequency around 30 times the fundamental wave of the output voltage in the figure is large, which causes ripple current, vibration and noise.

In particular, if the ripple current is large, the peak current value, which is an important factor in selecting a switching element, becomes large, which is a problem.

A detailed diagram of the PWM method in this conventional example is shown in FIG.

FIG. 10 (a) is an enlarged view of, for example, the area between 701 and 702 in FIG. 7, and FIG. 7 (a) and (c) are overlapped.

The carrier signal 70 is compared with the eu command signal or the ev command signal. In the + area, the signal is output at the higher one, and in the-area, the signal is output at the lower one.

As a result, the output voltage eu in FIG. 10 (b), the output signal ev in FIG. 10 (c), and the uv phase line voltage (eu-ev) in FIG. 10 (d) are obtained.

[Object of the Invention]

An object of the present invention is to provide a pulse width modulation method for a three-phase voltage source inverter that overcomes the drawbacks of the conventional method and reduces the harmonics around the carrier frequency from the output voltage waveform.

[Outline of Invention]

In order to achieve the above object, a pulse width modulation method for a three-phase voltage type inverter according to the present invention is based on the center of each phase voltage half cycle.
Modulation is not performed in the 60 ° phase section, and a sine wave output voltage is obtained by applying a phase voltage command signal that causes the output line voltage to be a sine wave in other sections, and the DC bus voltage is maximized. In the inverter that can be used as long as possible, when modulating the sine wave command signal of each phase by the carrier signal, the fundamental frequency of the sine wave command signal of each phase
The harmonic wave square wave signal is superimposed in synchronization with each phase sine wave command signal, and the amplitude of the triple harmonic wave signal is the modulation degree of each phase sine wave command signal by the carrier signal being α. When the ratio of the amplitude of the square wave signal of this triple harmonic and the amplitude of the carrier signal is k, the functional relationship between α and k is substantially linear and inversely proportional, and the square of this triple harmonic is The polarity of the wave signal and the respective sine wave signals are opposite to each other in the phase section in which the modulation is not performed, and the pulse signals given to the switching elements of the respective arms by comparing the superimposed and synthesized sine wave command signals of the respective phases with the carrier signal. Is obtained.

As a result, the command signal is obtained by superimposing the square signal of the triple harmonic on the conventional sinusoidal command signal, and the amplitude of the triple harmonic square signal is optimally controlled with respect to the modulation degree α. Also,
The output waveform was modulated only at 60 degrees on both sides out of 180 degrees.
Each pulse of the line output voltage is divided into two by performing modulation to 0 degree and correcting the signal in the remaining 120 degree section, which makes the main component harmonics twice the carrier frequency, causing ripples. The current can be reduced and the heat generation of the load motor can be reduced.

〔Example〕

FIG. 1 shows each voltage waveform diagram in one embodiment of the present invention.

This FIG. 1 is represented corresponding to FIG. 10 of the conventional system.

That is, in this embodiment, in the u phase, the eu command signal carrier signal 70 and the non-modulated section which has not been conventionally modulated are also modulated.

As a result, the output voltage is changed, and the pulse width of the other phase, that is, the v phase in this case, is corrected considerably.

In the detailed diagram of FIG. 1, (a) is a basic conceptual diagram of the PWM method of the present invention, (b) is the u-phase output power eu modulated, and (c) is the v-phase output voltage ev (d). Indicates the uv-phase line voltage (eu-ev), respectively.

FIG. 2 is a continuous output waveform diagram in which the PWM can be understood. (A) is the u-phase output voltage, eu, (b) is the v-phase output voltage ev, and (c) is the u-v phase line voltage eu. -Ev.

The sine wave command signal of the present invention is as follows when compared with the command signal of FIG.

In FIG. 3, there is a conventional u-phase command signal 71 in (a) and a square wave 74 of a triple harmonic thereof is generated in (b),
The u-phase command signal 75 of the present invention in which (a) and (b) are superposed as shown in (c) is generated, and modulation by the carrier signal is performed even at the center 60 ° of the half cycle.

By the way, the voltage command signals eu and e in the present invention corresponding to the above-mentioned conventional formulas (1), (2) and (3) are used.
Expressing v and eu-v, eu = (Edc / 2) {2αsin (θ + 30 °) -1 + k} (4) ev = (Edc / 2) (-1 + k) (5) Therefore, eu-v = eu−ev = Edc · α · sin (θ + 30 °) (6) As a result, the components of the square wave 74 of the third harmonic superimposed on each phase do not appear in the line voltage and do not appear in the line voltage. It turns out that there is no influence of.

It is sufficient to generate the command signal of (c) corresponding to the superposition of (b) on (a), and it is not necessary to perform two steps.

As described above, when the modulation degree by the carrier signal 70 is α, if the ratio of the amplitude of the triple harmonic to be superimposed to the conventional amplitude is represented by k, the high frequency around the carrier frequency is minimized at the modulation degree α. The optimum value curve of the harmonic amplitude is shown in FIG.

As a result, the harmonic order occurring in the output voltage when k = 0.25 in this embodiment is represented as shown in FIG.

As can be seen from Figs. 1 and 2, if the pulse number of the output voltage is doubled and the pulse width is appropriately selected in the central 60 ° section of the command signal half cycle, the high frequency of the original carrier frequency component is minimized. Can be

〔The invention's effect〕

Thus, according to the present invention, the modulation is newly performed in the central 60 ° section of the half cycle of the command signal, and the triple harmonic amplitude k corresponding to the modulation degree is appropriately selected. It is possible to reduce waves, for example, the 29th and 31st harmonics, and to double the frequencies of the harmonic main components to the 59th and 61st harmonics.

The optimum value of this triple harmonic square wave amplitude k can be freely changed by the modulation degree α (FIG. 4).

Therefore, the present invention can exert a special effect of minimizing the harmonic component around the carrier frequency in the entire range of the modulation degree α.

From these facts, the present invention has the following effects and is greatly useful in the industrial field.

(A) Since the output current ripple is reduced, heat generation, vibration, and noise of the load motor are reduced.

(B) Since the peak output current is reduced, the maximum output that can be obtained by the same device is increased.

(C) Since the ripple flowing in the smoothing capacitor of the DC power supply is reduced, the capacitor can be downsized.

[Brief description of drawings]

1 (a), (b), (c), and (d) are waveform diagrams (basic conceptual diagram) of a command signal, a carrier signal, and an output voltage in one embodiment of the present invention, FIG. 2 (a), (B) and (c) are continuous output waveform charts so that the PWM can be seen, and FIGS. 3 (a), (b) and (c) are explanatory diagrams of the command signal generation process in this embodiment, and FIG. Is an optimum curve diagram of the degree of modulation and triple harmonic amplitude of the present invention, FIG. 5 is a voltage distribution diagram of harmonic orders in this embodiment, and FIG. 6 is a block diagram showing a circuit configuration of a three-phase voltage source inverter. , FIG. 7 (a), (b),
(C) is a waveform diagram of each phase showing the conventional PWM method, FIGS. 8 (a), (b), and (c) are the modulated output voltage waveform diagrams, and FIG. 9 is a voltage of its harmonic order. Distribution charts and FIGS. 10 (a), (b), (c), and (d) are detailed explanation waveform diagrams showing a conventional modulation method. FIG. 11 is a signal waveform diagram for explaining a voltage command signal and a line voltage in the conventional modulation method. FIGS. 12A and 12B are signal waveform diagrams for explaining the modulation degree α. 1-6 ... switching element, 7-12 ... diode,
13 ... DC power supply, 14 ... smoothing diode, 15 ... load (motor), 16 ... PWM control circuit, 70 ... carrier signal, 71, 72, 73 ... u phase, v phase, w phase command signal , Eu ……
u-phase output voltage, ev ... v-phase output voltage, eu-ev ... u
Phase-v phase line voltage.

Claims (1)

[Claims] 1. A sine wave is provided by applying no phase modulation signal in such a manner that the line voltage of the output becomes a sine wave in other phases without modulation in the phase interval of 60 ° in the center of each phase voltage half cycle. In the inverter that can obtain the wave output voltage and maximize the use of the DC bus voltage, when modulating each phase sine wave command signal by the carrier signal, triple the fundamental frequency of each phase sine wave command signal. The harmonic square wave signal is superimposed in synchronization with each phase sine wave command signal, and the amplitude of the triple harmonic square wave signal is α, which is the degree of modulation of each phase sine wave command signal by the carrier signal. When the ratio of the amplitude of the square wave signal of the third harmonic and the amplitude of the carrier signal is k, the functional relationship between α and k is substantially linear and inversely proportional, and the square wave of the third harmonic is The polarity of the signal and the sine wave signal of each phase is A three-phase voltage type inverter characterized by reciprocating in a phase section in which no adjustment is performed and comparing the superimposed and combined sinusoidal wave command signals with a carrier signal to obtain a pulse signal to be given to the switching element of each arm. Pulse width modulation method.