JPH0879445A - Image sensor - Google Patents

Abstract

PURPOSE: To provide an image sensor with which the dispersion of offset is reduced and satisfactory picture quality can be provided. CONSTITUTION: The common electrodes of additional capacitor 12 and cumulative capacitor 15 form ground lines 41 and 47. Ground lines 42 and 46 formed by Al are provided in parallel with these ground lines 41 and 47 and electrically connected with the ground line 41 at respective spots and the potential drops of ground lines are prevented. Besides, a reset gate line 43 of a thin film transistor(TFT) 13 for batch reset and a batch gate line 45 of a TFT 14 for batch transfer are formed by the Al of low resistance and the dispersion of a field through level is suppressed. A Ti layer is provided between the signal line of Ta and the reset gate line 43 and batch gate line 45 of Al at the part where the reset gate line 43 and the batch gate line 45 cross the signal line, this Ti layer is electrically connected to the ground lines 42 and 46, and coupling is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor used in an image scanner, a facsimile and the like, and more particularly to an image sensor for reading an accurate image.

[0002]

2. Description of the Related Art As a conventional image sensor, in particular, a contact type image sensor projects image information of a document or the like on a one-to-one basis and converts it into an electric signal. In the case of this contact type image sensor, a plurality of light receiving elements are provided, and an image projected on the contact type image sensor is divided into a large number of pixels for input. The electric charge generated in each light receiving element is temporarily accumulated in the capacitance between the wirings in a specific block unit by using a switching element made of a thin film transistor (TFT), and is time-series as an electric signal at a speed of about several hundred KHz to several hundred MHz. Read sequentially. Such a TFT drive type image sensor is
Since the reading can be performed by a single driving IC by the operation of the FT, the number of driving ICs driving the image sensor can be reduced.

As a TFT drive type image sensor, for example, a batch transfer type image sensor has been developed.
FIG. 4 is a circuit diagram showing an example of the image sensor. In the figure, 11 is a light receiving element, 12 is an additional capacitor, 13 is a batch reset thin film transistor, 14 is a batch transfer thin film transistor, 15 is a storage capacitor, 16 is a block transfer thin film transistor, 17 is a wiring capacitor, 18 is a gate driver circuit, Reference numeral 19 is a drive control circuit.

Each light receiving element 11 is connected to an additional capacitor 12, a drain electrode of a collective reset thin film transistor 13 to which a gate electrode is commonly connected, and a drain electrode of a collective transfer thin film transistor 14 to which a gate electrode is commonly connected. Has been done. The collective reset thin film transistor 13 collectively resets the electric charges remaining in the additional capacitor 12. The batch transfer thin film transistor 14 transfers the charge generated in the light receiving element 11 by the gate signal to all the pixels in a batch to the storage capacitor 15. Gate electrodes of the batch reset thin film transistor 13 and the batch transfer thin film transistor 14 are connected to a gate driver circuit 18. The source electrode of the collective reset thin film transistor 13 is connected to the reset potential. The source electrode of each batch transfer thin film transistor 14 is connected to the drain electrode of the block transfer thin film transistor 16, and the storage capacitor 15 is connected to the connection portion. The block transfer thin film transistor 16 transfers the charge stored in the storage capacitor 15 for each block. The source electrode of the block transfer thin film transistor 16 in each block is connected to the common signal line and to the drive control circuit 19. The gate electrode of the block transfer thin film transistor 16 is connected to the gate driver circuit 18 via a gate matrix line. The gate matrix line connects the gates of the block transfer thin film transistors 16 in which the relative positions of the blocks are the same.

The charges generated in each light receiving element 11 are accumulated in the additional capacitor 12. When the batch transfer thin film transistor 14 is driven, the charges accumulated in the additional capacitor 12 are transferred to each storage capacitor 15 via the batch transfer thin film transistor 14. After the transfer is completed, the collective reset thin film transistor 13 is driven to discharge the untransferred electric charges remaining in the additional capacitance 12 to the reset potential line, and all the light receiving elements 11 are reset.

After that, the gate driver circuit 18 sequentially outputs a timing pulse to each gate line. For example, when the gate pulse .phi.GM1 is sent from the gate driver circuit 18, all the first block transfer thin film transistors 16 of each block become conductive, and the corresponding storage capacitors 15 to the drive control circuit 19 via the common signal line. The charge is transferred. In the drive control circuit 19, the analog switch is switched to sequentially select and conduct the common signal line, and the change in the potential due to the transferred charges is amplified by the internal amplifier and output. The block transfer thin film transistors 16 are sequentially driven according to each gate pulse sequentially output from the gate driver circuit 18, and charges in each block are transferred and output.

After all, from the output line of the drive control circuit 19,
Unlike the order in which the images are sequentially transferred in the main scanning direction, the image signals appear scattered. To correct this order, a buffer memory or the like is added after the output line to obtain an image signal of one line in the main scanning direction of the medium to be read. When reading a two-dimensional image, the medium to be read and the image sensor are moved relative to each other, and the above operation is repeated to obtain an image signal of the entire medium to be read.

An example of the batch transfer type image sensor driven by the TFT as described above is, for example, Japanese Patent Application No. 5-532.
An image sensor similar to No. 10 is disclosed.

FIG. 5 is an equivalent circuit diagram per pixel in an image sensor having a structure in which charges are collectively transferred. In the figure, those parts that are the same as those corresponding parts in FIG. 4 are designated by the same reference numerals, and a description thereof will be omitted. Reference numeral 21 is a photodiode, 22 is a parasitic capacitance, 23 is a charge detection amplifier, 24 is a reset transistor, and 25 to 30 are overlap capacitances.

Photodiode 21 as a light receiving element
Has a parasitic capacitance 22. The parasitic capacitance 22 is represented as being connected in parallel with the photodiode 21. The batch transfer thin film transistor 14, the block transfer thin film transistor 16, and the charge detection amplifier 23 of the drive control circuit 19 are connected in series to the anode of the photodiode 21. The additional capacitance 12 is connected between the anode of the photodiode 21 and the ground line. Further, a collective reset thin film transistor 13 is connected between the anode of the photodiode 21 and the reset potential line. A storage capacitor 15 is provided between the connection point between the batch transfer thin film transistor 14 and the block transfer thin film transistor 16 and the ground line, and a storage capacitor 15 is provided between the connection point between the block transfer thin film transistor 16 and the drive control circuit 19 and the ground line. Capacitors 17 are formed respectively. Further, inside the drive control circuit 19, a reset transistor 24 for resetting the wiring capacitance 17 is provided between the charge detection amplifier 23 and the ground. The overlap capacities 25 to 30 are
Batch reset thin film transistor 13, batch transfer thin film transistor 14, block transfer thin film transistor 1
6 shows the overlap capacitance between the gate and the source and between the gate and the drain of No. 6 in FIG.

Charges generated when light is incident on the photodiode 21 are the parasitic capacitance 22, the additional capacitance 12, the overlap capacitance 25 between the drain and gate of the collective reset thin film transistor 13, and the drain and drain of the collective transfer thin film transistor. It is stored in the overlap capacitance 27 between the gates. When the gate pulse ΦGT is applied to the gate of the batch transfer thin film transistor 14, the batch transfer thin film transistor 14 becomes conductive, and the charges accumulated in the parasitic capacitance 22, the additional capacitance 12, and the overlap capacitances 25 and 27 are accumulated. It is transferred to the capacity 15 and accumulated.

Next, after the batch transfer thin film transistor 14 is turned off, a gate pulse ΦGR is applied to the gate of the batch reset thin film transistor 13 to bring the batch reset thin film transistor 13 into a conductive state, and the parasitic capacitance 22. , The additional capacitance 12, and the untransferred charges remaining in the overlap capacitances 25 and 27 are reset.

When the gate pulse ΦGM is applied to the gate of the block transfer thin film transistor 16 after the batch transfer thin film transistor 14 is turned off,
The block transfer thin film transistor 16 becomes conductive, and the charges accumulated in the storage capacitor 15 are transferred to the wiring capacitor 17 and accumulated therein. Then, by accumulating charges in the wiring capacitance 17, the drive control circuit 19
After the input potential of the charge detection amplifier 23 changes, and the block transfer thin film transistor 16 becomes non-conductive,
This voltage value is amplified by the charge detection amplifier 23 and output to the output line. After that, the gate pulse ΦRC is applied to the gate of the reset transistor 24, the reset transistor 24 becomes conductive, and the wiring capacitance 17 is reset. Then, the potential after the reset is detected as the reference voltage.

In the image sensor having such a configuration, the offset output is Vo = Cp / (Cp + Cl) × (Vf1-Vf2-Vf
3 + Vf4 + Vr-Vic). Here, Vf1 is the thin film transistor 14
Field-through voltage due to ΦGT of the drain electrode of
Vf2 is ΦGR of the drain electrode of the thin film transistor 13.
Is a field through voltage due to ΦGT of the source electrode of the thin film transistor 14, Vf4 is a field through voltage due to the reset transistor 24 in the drive control circuit 19. This field through voltage is simply expressed as Vft = Cc / (Cc + C) × ΔVg. Cc is the coupling capacitance between the gate electrode and the source / drain electrode, C is the load capacitance of the source / drain electrode, and ΔVg is the swing voltage of the gate.

However, as a characteristic of the thin film transistor, Cc has different sizes when the gate is on and when it is off. This is because a channel is formed on the gate electrode. The charges forming this channel are redistributed according to the potentials of the source and drain electrodes when the gate is off. At this time, if the impedance of the source and drain electrodes is high, the amount of movement of charges due to field through is large when the number of operations is large, such as when performing operations for all pixels at once. Therefore, the individual charge transfer amounts are added depending on the pixel position, and the source and drain potentials are momentarily varied with the resistance value. The charge that formed the channel is redistributed due to the potential difference between the source and drain, so if the potential of the source and drain varies, the amount of charge that is distributed to the source and drain also varies, resulting in field through. Varies in size.

Further, when the mobility of the channel layer of the thin film transistor is low, the waveform of the gate signal is blunted when the impedance of the gate line is high, and the on-state maintaining time varies depending on the pixel position. Therefore, the swing width of the effective gate that contributes to field through varies, and the size of field through also varies,
As a result, the offset output varies.
Further, if the signal line and the gate line have a coupling, it becomes difficult to predict the output.

FIG. 6 is a plan view showing an example of an image sensor having a conventional structure for transferring charges collectively. Reference numerals in the figure are the same as those in FIG. In FIG. 6, the insulating film and the like are omitted. A thick line is a metal layer made of Al, a thin line is a metal layer made of Ti, and a broken line is a metal layer made of Ta.
The dotted line indicates the ITO layer.

In order to reduce the area of each capacitance portion, the additional capacitance 12 and the storage capacitance 15 have a large capacitance value per unit area Ti / n ⁺ -a-Si / t-SiN / ia-Si.
/ B-SiN / Ta. Due to the process yield, the common electrode becomes Ta and the individual electrode becomes Ti. The gate line of the thin film transistor has a gate electrode of Ta.
Therefore, in order to simplify the layout pattern, T
a was used. Since the resistance of Ta is higher than that of Al or the like, for example, the above-described variation in offset output occurs.

Further, since the gate line and the signal line are arranged to directly intersect with each other, coupling between the gate line and the signal line occurs, and there is a problem that a change in the gate signal affects the signal line.

The ground line, which is a common electrode of the additional capacitor 12 and the storage capacitor 15, is also made of Ta, and is adjacent to the reset gate line of the collective reset thin film transistor 13 and the collective gate line of the collective transfer thin film transistor 14, respectively. Will be placed. Therefore, even in the ground wire, T
There is also a problem that there is a voltage drop due to the resistance of a, variation occurs in the additional capacitance 12 and the storage capacitance 15, and the sensitivity characteristic is affected.

[0021]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an image sensor having a small offset variation and capable of obtaining a good image quality. is there.

[0022]

According to the present invention, a plurality of light receiving elements provided on an insulating substrate, a plurality of additional capacitors for respectively accumulating charges generated in each of the light receiving elements, and a plurality of additional capacitors are stored in the respective additional capacitors. In the image sensor including a plurality of thin film transistors that respectively transfer the stored charges, and a signal line that connects each of the light receiving elements, the additional capacitance, and the thin film transistor, the additional capacitance is formed of at least a first metal layer. A first electrode which is a common electrode of the additional capacitance
Of the ground line, an insulating film, and the signal line formed of a second metal layer, and the thin film transistor formed of a third metal layer in parallel with the first ground line. Said gate line is arranged, and said third grounding line is further connected between said first grounding line and said gate line.
And a second ground line formed of the metal layer of FIG.

Preferably, an intersection of the signal line and the gate line is the signal line formed of the first metal layer, the gate line formed of the third metal layer, and the third line. It is preferable that the shield layer is formed of two metal layers and the shield layer is connected to the second ground line. Furthermore, the third metal layer has a lower resistance than the first metal layer.

Further, in the case of the storage capacitor and the thin film transistor for transfer, the same structure as described above can be applied.

[0025]

According to the present invention, since the gate line of the thin film transistor is formed of the third metal layer having a resistance lower than that of the first metal layer, the impedance of the gate line can be reduced and the offset output of the thin film transistor can be reduced. Variation can be suppressed. Further, a second ground line made of a low-resistance third metal layer was provided between the first ground line and the gate line of the thin film transistor, and the second ground line was connected to the first ground line. As a result, the voltage drop of the ground line of the additional capacitance can be prevented, and the ground potential of the additional capacitance is stabilized, so that the potential distribution of the common potential line in the field through can be suppressed to be small. As a result, it is possible to provide an image sensor with a small variation in dark output.

Furthermore, at the intersection of the signal line formed of the first metal layer and the gate line of the thin film transistor formed of the third metal layer, a second metal layer is formed between the signal line and the gate line. By forming this second metal layer and connecting this second metal layer to the second ground line, the second metal layer between the signal line and the gate line acts as a shield layer, and the gate line and the ground line are capped. The ring can be prevented. As a result, a change in the potential of the gate line does not affect the signal line, and a good read signal can be obtained.

[0027]

1 is a partial plan view of an embodiment of the image sensor of the present invention, and FIGS. 2 and 3 are partial sectional views of the same. In the figure, the same parts as in FIG. 41, 42, 46, 47 are ground lines, 43 is a reset gate line, 44 is a reset potential line, 45 is a collective gate line, 51 is a glass substrate, and 52 is T.
a layer, 53 is a b-SiN layer, 54 is an ia-Si layer, 5
5 is a t-SiN layer, 56 is an n ⁺ -a-Si layer, and 57 is a T-SiN layer.
i layer, 58 is a photoelectric conversion layer, 59 is an ITO layer, 60 is a polyimide layer, 61 is an Al layer, and 62 is a passivation layer. The circuit of the image sensor and the equivalent circuit per pixel in this embodiment are the same as the conventional circuits shown in FIGS. 4 and 5, and the operation is also the same.

The conductor used in the image sensor of this embodiment is mainly used for the gate electrode of the thin film transistor and the Ta layer 52 used for wiring, mainly for the lower common electrode of the photodiode and the source / drain electrode of the thin film transistor. Ti layer 57, ITO layer 59 used for upper individual electrode of photodiode, Al layer 6 used for wiring
There is one. Of these, the one having the smallest resistance is the Al layer 61 capable of increasing the film thickness. Therefore, the Al layer 61 is used to form a ground line, a gate line, and the like to lower the impedance, prevent a voltage drop, and stabilize the bias output.

In the layout of the image sensor in this embodiment, the additional capacitor 12, the batch reset thin film transistor 13, the batch transfer thin film transistor 14, the storage capacitor 15, and the block transfer thin film transistor 16 are arranged in this order from the light receiving element 11. There is.

The light receiving element 11 includes the ITO layer 59 and ia-.
The photoelectric conversion layer 58 made of Si and the Ti layer 57 are composed of a Schottky junction photodiode. Where I
The TO layer 59 serves as an individual electrode and the Ti layer 57 serves as a common electrode.
Since the common electrode is composed of the Ti layer 57 having a relatively high resistance, in order to prevent potential drop due to its impedance,
The wiring of the Al layer 61 which is a low resistance layer is arranged in parallel with the bias line which is the common electrode and is electrically connected to the bias line.

The additional capacitance 12 and the storage capacitance 15 are made of Ti.
Layer 57, n ⁺ -a-Si layer 56, t-SiN layer 55, i
It is composed of the -a-Si layer 54, the b-SiN layer 53, and the Ta layer 52. The Ti layer 57 serves as an individual electrode and the Ta layer 52 serves as a common electrode. This structure has a larger film thickness and dielectric constant of the insulating film than other structures such as Al / polyimide / b-SiN / Ta, or Al / polyimide / Ti, so that the capacitance value per unit area is large. There is an advantage that can be taken greatly.

Ta layer 52 which is a common electrode of the additional capacitor 12
Form a ground wire 41. A ground line 42 formed of an Al layer 61 is provided in parallel with the ground line 41, and is electrically connected to the ground line 41 at various places. This gives T
The voltage drop due to the impedance of the a layer 52 is
This is prevented by bypassing the wiring of the Al layer 61 having a lower resistance than the a layer 52.

Similarly, the common electrode T of the storage capacitor 15 is
The a layer 52 forms a ground wire 47.
A ground wire 46 formed of an Al layer 61 is provided in parallel with the wire 7, and is electrically connected to the ground wire 41 at various places. As a result, the voltage drop due to the impedance of the Ta layer 52 is prevented by bypassing the wiring of the Al layer 61 having a lower resistance than the Ta layer 52.

Thin film transistors such as the batch reset thin film transistor 13, the batch transfer thin film transistor 14, and the block transfer thin film transistor 16 have a Ta layer 52 as a gate electrode, a b-SiN layer 53 as a gate insulating film, and an active layer on a glass substrate 51. I-a-Si layer 5 to be a layer
4, an inverted stagger type structure including a stack of a t-SiN layer 55 that serves as a channel protection layer, an n ⁺ -a-Si layer 56 that forms an ohmic junction, and a Ti layer 57 that serves as drain and source electrodes.

The reset gate line 43 of the batch reset thin film transistor 13 is provided between the additional capacitor 12. Conventionally, the reset gate line 43 was formed by the Ta layer 52 which is the gate electrode, but in the present invention, it is formed by the Al layer 61 and is electrically connected to the gate electrode. By forming the reset gate line 43 with the Al layer 61 having a resistance lower than that of the Ta layer 52 as described above, the impedance of the gate electrode is lowered, and the time of the conductive state of the gate is made substantially constant irrespective of the pixel position. Offset output is made uniform by suppressing variations in through size.

Further, since the ground line 42 and the reset gate line 43 are formed by the Al layer 61, the signal line intersecting these lines is formed by the Ta layer 52. Here, at the intersection of the reset gate line 43 and the signal line, the Ta layer 52, which is a signal line, and the reset gate line 43.
The Ti layer 57 is provided between the Al layers 61 that are
The layer 57 is electrically connected to the ground wire 42. That is, the grounded Ti layer 57 functions as a shield layer for the signal line and the reset gate line 43. Therefore, it is possible to prevent coupling between the signal line and the reset gate line 43 and eliminate mutual influence.

The reset potential line 44 connected to the source electrode of the collective reset thin film transistor 13 is arranged between the collective reset thin film transistor 13 and the collective transfer thin film transistor 14. This reset potential line 44
Is formed of an Al layer 61.

The collective gate line 45 connected to the gate electrode of the collective transfer thin film transistor 14 is provided between the collective capacitor 15 and the storage capacitor 15. The collective gate line 45 is also formed of the Ta layer 52 which is a gate electrode in the past, but is formed of the Al layer 61 in the present invention and is electrically connected to the gate electrode. By thus forming the collective gate line 45 with the Al layer 61 having a resistance lower than that of the Ta layer 52, the impedance of the gate electrode is lowered,
The time during which the gate is in the conductive state is made substantially constant regardless of the pixel position, variations in the size of the field through are suppressed, and offset outputs are aligned.

Further, the ground line 46 and the collective gate line 45.
Is formed of the Al layer 61, the signal line intersecting these lines is formed of the Ta layer 52. here,
At the intersection of the collective gate line 45 and the signal line, the Ta layer 52 which is the signal line and the Al layer 6 which is the collective gate line 45.
1, a Ti layer 57 is provided, and the Ti layer 57 is electrically connected to the ground line 46. That is, the grounded Ti layer 57 functions as a shield layer for the signal line and the collective gate line 45. Therefore, the coupling between the signal line and the collective gate line 45 can be prevented, and mutual influences can be eliminated.

The block transfer thin film transistor 1
The gate electrode of 6 is connected to the gate matrix wiring formed of the Al layer 61, and is connected to the gate driver circuit 18. The source electrode is connected to the data line for each block and is connected to the drive control circuit 19. Although the signal line and the gate line also cross each other here, similarly to the above, for example, a ground line is provided between the data line and the gate matrix line, and Ti is provided between the signal line and the gate line. By providing the layer 57 and electrically connecting it to the ground line, it is possible to prevent coupling at these portions.

In the above embodiment, the Al layer 61 has the lowest resistance, so the ground lines 42 and 46, the reset gate line 43, and the collective gate line 45 are formed by the Al layer 61.
If the other layer has a lower resistance, that layer may be used. At this time, by providing a shield layer between the signal line and the ground line, which is newly provided, coupling between the signal line and the gate line can be prevented.

[0042]

As is apparent from the above description, according to the present invention, a low resistance wiring is provided, connected to the common electrode of the additional capacitance C _ADD and the storage capacitance Ct, and the signal line and the gate line are connected. Since the gate line of the thin film transistor is connected to the shield layer at the intersection of, and the resistance of the gate line of the thin film transistor is low, the potential distribution of the common potential line in the field through is suppressed to be small, the dark output variation is small, and the image quality is improved. There is an effect that an image sensor can be provided.

[Brief description of drawings]

FIG. 1 is a partial plan view of an image sensor according to an embodiment of the present invention.

FIG. 2 is a partial sectional view of an embodiment of the image sensor of the present invention.

FIG. 3 is a partial cross-sectional view of an embodiment of the image sensor of the present invention.

FIG. 4 is a circuit diagram showing an example of an image sensor.

FIG. 5 is an equivalent circuit diagram for one pixel in an image sensor configured to collectively transfer charges.

FIG. 6 is a plan view showing an example of an image sensor having a conventional structure for transferring charges collectively.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 11 ... Light receiving element, 12 ... Additional capacity, 13 ... Batch reset thin film transistor, 14 ... Batch transfer thin film transistor, 15 ... Storage capacitor, 16 ... Block transfer thin film transistor, 17 ... Wiring capacity, 18 ... Gate driver circuit,
19 ... Drive control circuit, 21 ... Photo diode, 22 ...
Parasitic capacitance, 23 ... Charge detection amplifier, 24 ... Reset transistor, 25-30 ... Overlap capacitance, 41,
42, 46, 47 ... Ground line, 43 ... Reset gate line,
44 ... Reset potential line, 45 ... Collective gate line, 51 ... Glass substrate, 52 ... Ta layer, 53 ... b-SiN layer, 54 ...
i-a-Si layer, 55 ... t-SiN layer, 56 ... n ⁺ -a
-Si layer, 57 ... Ti layer, 58 ... Photoelectric conversion layer, 59 ... I
TO layer, 60 ... Polyimide layer, 61 ... Al layer, 62 ... Passivation layer.

Claims (1)

[Claims] 1. A plurality of light-receiving elements provided on an insulating substrate, a plurality of additional capacitors for respectively accumulating charges generated in each of the light-receiving elements, and a plurality of plural capacitors for respectively transferring the charges accumulated in each of the additional capacitors. In the image sensor including the thin film transistor, the light receiving element, the additional capacitance and the signal line connecting the thin film transistor, the additional capacitance is at least a common electrode of the additional capacitance formed of the first metal layer. A first ground line, an insulating film, and a signal line formed of a second metal layer are stacked to form a third metal layer parallel to the first ground line. A gate line of the thin film transistor is arranged, and further, the first line is provided between the first ground line and the gate line.
A second metal layer formed of the third metal layer connected to the ground line of
An image sensor, which is provided with a grounding wire.