JPH0879114A - Detected signal output circuit - Google Patents

Detected signal output circuit

Info

Publication number
JPH0879114A
JPH0879114A JP20722894A JP20722894A JPH0879114A JP H0879114 A JPH0879114 A JP H0879114A JP 20722894 A JP20722894 A JP 20722894A JP 20722894 A JP20722894 A JP 20722894A JP H0879114 A JPH0879114 A JP H0879114A
Authority
JP
Japan
Prior art keywords
reference voltage
polarity
wide band
band amplifier
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20722894A
Other languages
Japanese (ja)
Inventor
Kazuo Tamura
一生 田村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP20722894A priority Critical patent/JPH0879114A/en
Publication of JPH0879114A publication Critical patent/JPH0879114A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE: To make the amplitude and polarity of detected signals the same by a variable resistor and to mach an external connection equipment and an internal signal processing circuit. CONSTITUTION: A reference voltage divider circuit 2 constituted of plural resistors R1-R3, switching circuits SW1-SW3 and a variable resistor VR1 are connected to the reference voltage generation terminal 13 of a wide band amplifier 1 and further, a 1/2 reference voltage generation circuit 3 for generating a voltage which is 1/2 of a reference voltage is connected. By connecting the middle point of the variable resistor to the grain control terminal 14 of the wide band amplifier 1 and controlling the switching circuit corresponding to a receiving satellite, the gain and polarity of the wide band amplifier 1 are controlled and the amplitude and polarity of the detection signals as made the same.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、衛星放送,衛星通信受
信機の検波出力回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a detection output circuit for satellite broadcasting and satellite communication receivers.

【0002】[0002]

【従来の技術】図3は従来の衛星放送,衛星通信受信機
(以下、受信機とする)における検波出力回路例を示す。
図3において、1はFM復調入力端子11,検波出力端子
12,基準電圧発生端子13および利得制御端子14を有する
広帯域増幅器、2は直列接続された抵抗R1、複数の可
変抵抗VR1,VR2および前記R1,VR2に並列接続さ
れたスイッチ回路SW1,SW2を有する基準電圧分圧回
路である。上記直列接続されたR1,VR1,VR2のう
ち、R1の一端は基準電圧発生端子13と接続され、VR2
の一端は接地され、VR1の可変摺動部は利得制御端子1
4と接続される。図3に例示する入力4〜7は衛星(1)〜
(4)を受信したときの入力信号1〜4であり、それぞれ
振幅と極性を異にし、出力信号8は広帯域増幅器1の基
準電圧分圧回路2で調整することによって、入力4〜7
の検波信号の振幅と極性が同一となっている状態を示し
ている。
2. Description of the Related Art FIG. 3 shows a conventional satellite broadcasting and satellite communication receiver.
An example of a detection output circuit (hereinafter referred to as a receiver) will be shown.
In FIG. 3, 1 is an FM demodulation input terminal 11 and a detection output terminal
12, a wide band amplifier having a reference voltage generating terminal 13 and a gain control terminal 14, 2 has a resistor R1 connected in series, a plurality of variable resistors VR1 and VR2, and switch circuits SW1 and SW2 connected in parallel to the R1 and VR2. It is a reference voltage dividing circuit. Of the R1, VR1 and VR2 connected in series, one end of R1 is connected to the reference voltage generating terminal 13 and VR2
Is grounded at one end, and the variable sliding part of VR1 is at the gain control terminal 1
Connected to 4. Inputs 4 to 7 illustrated in FIG. 3 are satellites (1) to
Input signals 1 to 4 when (4) is received, the amplitudes and polarities of which are different from each other, and the output signal 8 is adjusted by the reference voltage dividing circuit 2 of the wideband amplifier 1 to obtain the inputs 4 to 7
Shows the state where the amplitude and the polarity of the detection signal are the same.

【0003】上記のように、受信機の検波出力回路は、
図示せざる外部機器との接続のために検波出力端子12を
有しているが、受信する衛星1〜4によって異なるFM
変調度,FM復調後の信号極性に対応し、検波信号の振
幅,極性を同一にして出力信号8とする必要がある。ま
た、内部信号処理においては、振幅,極性が同一な検波
信号が後段回路へ入力されることで、低歪で信号処理を
行うことができる。
As described above, the detection output circuit of the receiver is
The detection output terminal 12 is provided for connection with an external device (not shown), but the FM differs depending on the satellites 1 to 4 to be received.
Corresponding to the modulation degree and the signal polarity after FM demodulation, it is necessary to make the amplitude and polarity of the detection signal the same to form the output signal 8. Further, in the internal signal processing, since the detection signals having the same amplitude and polarity are input to the subsequent circuit, the signal processing can be performed with low distortion.

【0004】上記のように構成された従来例について、
以下動作を説明するが、基準電圧分圧回路2の各スイッ
チ回路SW1,SW2のオン,オフ動作は例示する衛星
(1)〜(4)に応じて図示せざる制御部により行われる。
Regarding the conventional example constructed as described above,
The operation will be described below. The ON / OFF operation of each of the switch circuits SW1 and SW2 of the reference voltage dividing circuit 2 is an example of the satellite.
This is performed by a control unit (not shown) according to (1) to (4).

【0005】受信機が衛星(1)を受信し、入力4の入力
信号1が広帯域増幅器1へ入力された場合、基準電圧分
圧回路2内のスイッチ回路SW1とSW2がオンし、図2
において広帯域増幅器1の利得制御電圧VはV1とな
り、利得GはG1となる。
When the receiver receives the satellite (1) and the input signal 1 of the input 4 is input to the wide band amplifier 1, the switch circuits SW1 and SW2 in the reference voltage dividing circuit 2 are turned on, and
At, the gain control voltage V of the wide band amplifier 1 becomes V1 and the gain G becomes G1.

【0006】受信機が衛星(2)を受信し、入力5の入力
信号2が広帯域増幅器1へ入力された場合、基準電圧分
圧回路2内のスイッチ回路SW1がオフ、SW2がオン
し、図2において広帯域増幅器1の利得制御電圧VはV
2となり、利得GはG2となる。
When the receiver receives the satellite (2) and the input signal 2 of the input 5 is input to the wide band amplifier 1, the switch circuit SW1 in the reference voltage dividing circuit 2 is turned off and SW2 is turned on. 2, the gain control voltage V of the wide band amplifier 1 is V
2 and the gain G becomes G2.

【0007】受信機が衛星(3)を受信し、入力6の入力
信号3が広帯域増幅器1へ入力された場合、基準電圧分
圧回路2内のスイッチ回路SW1がオン、SW2がオフ
し、図2において広帯域増幅器1の利得制御電圧VはV
3となり、利得GはG3となる。
When the receiver receives the satellite (3) and the input signal 3 of the input 6 is input to the wide band amplifier 1, the switch circuit SW1 in the reference voltage dividing circuit 2 is turned on, and SW2 is turned off. 2, the gain control voltage V of the wide band amplifier 1 is V
3 and the gain G becomes G3.

【0008】受信機が衛星(4)を受信し、入力7の入力
信号4が広帯域増幅器1へ入力された場合、基準電圧分
圧回路2内のスイッチ回路SW1とSW2がオフし、図2
において広帯域増幅器1の利得制御電圧VはV4とな
り、利得GはG4となる。
When the receiver receives the satellite (4) and the input signal 4 of the input 7 is input to the wide band amplifier 1, the switch circuits SW1 and SW2 in the reference voltage dividing circuit 2 are turned off,
, The gain control voltage V of the wide band amplifier 1 becomes V4 and the gain G becomes G4.

【0009】図3に例示する検波出力回路の広帯域増幅
器1の利得と極性の切り換えは、1個の抵抗R1と複数
の可変抵抗VR1,VR2およびスイッチ回路SW1,S
W2とにより構成される基準電圧分圧回路2のみで行っ
ており、広帯域増幅器1自体の利得のバラツキを吸収す
るために、図示せざる制御部によりスイッチ回路SW
1,SW2をオン,オフし、かつFM復調後の信号極性ご
とに2つの可変抵抗VR1,VR2の調整が必要であった。
Switching of the gain and the polarity of the wide band amplifier 1 of the detection output circuit illustrated in FIG. 3 is performed by one resistor R1, a plurality of variable resistors VR1 and VR2, and switch circuits SW1 and S1.
This is performed only by the reference voltage dividing circuit 2 constituted by W2, and in order to absorb the variation in the gain of the wide band amplifier 1 itself, a switch circuit SW is provided by a control unit (not shown).
It was necessary to turn on and off 1 and SW2 and adjust two variable resistors VR1 and VR2 for each signal polarity after FM demodulation.

【0010】[0010]

【発明が解決しようとする課題】上記のように、従来の
受信機の検波出力回路では調整箇所が多く、受信機の生
産工程において、複雑な作業が発生してしまうという問
題点があった。
As described above, in the conventional detection output circuit of the receiver, there are many adjustment points, and there is a problem that complicated work occurs in the production process of the receiver.

【0011】本発明は、上記従来の問題点を解決するも
のであり、FM復調後の任意の信号極性で広帯域増幅器
の利得を1つの可変抵抗で調整するだけで、他方の信号
極性では調整が不必要な検波出力回路を有する受信機の
生産工程における作業を簡素化し、安価な受信機を提供
することを目的とする。
The present invention solves the above-mentioned problems of the prior art by adjusting the gain of a wide band amplifier with one variable resistor at an arbitrary signal polarity after FM demodulation, and with the other signal polarity. An object of the present invention is to provide an inexpensive receiver by simplifying the work in the production process of the receiver having an unnecessary detection output circuit.

【0012】[0012]

【課題を解決するための手段】本発明は、上記目的を達
成するため、衛星放送,衛星通信受信機において、受信
衛星によって異なるFM変調度,FM復調後の信号極性
に対応し、増幅度と極性を変えることで検波信号の振幅
と極性を同一とするための広帯域増幅器と、前記広帯域
増幅器の基準電圧の1/2の電圧を発生する1/2基準電
圧発生回路と、前記広帯域増幅器の利得と極性を制御す
る複数の抵抗,スイッチ回路と1つの可変抵抗より構成
される基準電圧分圧回路とからなることを特徴とする。
In order to achieve the above-mentioned object, the present invention corresponds to an FM modulation degree and a signal polarity after FM demodulation which are different depending on a receiving satellite in a satellite broadcasting or satellite communication receiver, and has an amplification degree. A wideband amplifier for changing the polarity so that the amplitude and polarity of the detection signal are the same, a 1/2 reference voltage generating circuit for generating a voltage of 1/2 of the reference voltage of the wideband amplifier, and a gain of the wideband amplifier. And a reference voltage dividing circuit composed of a plurality of resistors for controlling the polarity, a switch circuit and one variable resistor.

【0013】[0013]

【作用】本発明によれば、1つの可変抵抗を調整するだ
けで、受信衛星によって異なるFM変調度,FM復調後
の信号極性に対応し、広帯域増幅器の増幅度と極性を変
えることで検波信号の振幅と極性を同一とする検波出力
回路が実現でき、安価な受信機を提供できる。
According to the present invention, the detected signal can be adjusted by adjusting only one variable resistor to correspond to the FM modulation degree and the signal polarity after FM demodulation which differ depending on the receiving satellite, and by changing the amplification degree and the polarity of the wide band amplifier. It is possible to realize a detection output circuit in which the amplitude and the polarity are the same, and it is possible to provide an inexpensive receiver.

【0014】[0014]

【実施例】図1は本発明の一実施例における衛星放送,
衛星通信受信機の検波出力回路のブロック図である。図
1において前記図3と構成の異なる部分について説明す
る。基準電圧分圧回路2は、直列接続された複数の抵抗
R1,R2,R3と、前記抵抗R2と並列接続された1つの
可変抵抗VR1と、前記抵抗R1,R3に並列接続された
スイッチ回路SW1,SW3と、前記抵抗R1,R2の接続
点に一端が接続され他端が接地されたスイッチ回路SW
2とで構成される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows satellite broadcasting in an embodiment of the present invention.
It is a block diagram of a detection output circuit of a satellite communication receiver. In FIG. 1, portions different in configuration from those in FIG. 3 will be described. The reference voltage dividing circuit 2 includes a plurality of resistors R1, R2, R3 connected in series, one variable resistor VR1 connected in parallel with the resistor R2, and a switch circuit SW1 connected in parallel with the resistors R1, R3. , SW3, and a switch circuit SW having one end connected to the connection point of the resistors R1, R2 and the other end grounded
It consists of two.

【0015】そして、前記抵抗R1の一端は広帯域増幅
器1の基準電圧発生端子13と接続され、広帯域増幅器1
の動作の基準電圧が出力される。また前記1つの可変抵
抗VR1の可変摺動部は、広帯域増幅器1の利得制御端
子14と接続され、基準電圧分圧回路2で分圧した電圧が
入力されるようになっている。
One end of the resistor R1 is connected to the reference voltage generating terminal 13 of the wide band amplifier 1, and the wide band amplifier 1 is connected.
The reference voltage for the operation of is output. Further, the variable sliding portion of the one variable resistor VR1 is connected to the gain control terminal 14 of the wide band amplifier 1, and the voltage divided by the reference voltage dividing circuit 2 is inputted.

【0016】3は1/2基準電圧発生回路であり、これ
は前記基準電圧分圧回路2の1/2の電圧を発生するた
め、第1の端子3aは基準電圧分圧回路2の抵抗R1と接
続され、第2の端子3bは抵抗R3の一端と接続され、第
3の端子3cは接地される。
Reference numeral 3 denotes a 1/2 reference voltage generating circuit, which generates a voltage of 1/2 of the reference voltage dividing circuit 2, so that the first terminal 3a has a resistance R1 of the reference voltage dividing circuit 2. The second terminal 3b is connected to one end of the resistor R3, and the third terminal 3c is grounded.

【0017】ここで、前記広帯域増幅器1の利得特性を
図2に示す。図2に示すように利得G(縦軸)は利得制御
電圧V(横軸)により変化するが、基準電圧の1/2を境
として入出力極性が反転する。したがって、入力信号1
〜4に対し出力信号8の極性を反転する場合、利得制御
電圧Vは基準電圧の1/2以下とする必要があり、また
出力信号8の極性を反転しない場合、基準電圧の1/2
以上とする必要がある。このため、本実施例では新たに
上述した1/2基準電圧発生回路3を設け、基準電圧分
圧回路2と接続してある。
The gain characteristic of the wide band amplifier 1 is shown in FIG. As shown in FIG. 2, the gain G (vertical axis) changes according to the gain control voltage V (horizontal axis), but the input / output polarities are inverted at 1/2 of the reference voltage. Therefore, input signal 1
When the polarity of the output signal 8 is inverted with respect to 4 to 4, the gain control voltage V needs to be equal to or less than 1/2 of the reference voltage, and when the polarity of the output signal 8 is not inverted, the gain control voltage V is 1/2 of the reference voltage.
It is necessary to be above. Therefore, in the present embodiment, the above-mentioned 1/2 reference voltage generating circuit 3 is newly provided and connected to the reference voltage dividing circuit 2.

【0018】上記のように構成された本実施例の動作に
ついて以下説明するが、基準電圧分圧回路2の各スイッ
チ回路SW1,SW2,SW3のオン,オフ動作は、例示
する衛星1〜4からの入力信号1〜4に応じて、図示せ
ざる制御部により行われる。
The operation of the present embodiment configured as described above will be described below. The on / off operation of each switch circuit SW1, SW2, SW3 of the reference voltage dividing circuit 2 is performed from the satellites 1 to 4 illustrated. This is performed by a control unit (not shown) according to the input signals 1 to 4 of.

【0019】図1において、衛星放送,衛星通信受信機
(以下、受信機とする)が衛星1を受信し、入力4の入力
信号1が広帯域増幅器1へ入力された場合、基準電圧分
圧回路2内のスイッチ回路SW1がオフ、スイッチ回路
SW2がオン、スイッチ回路SW3がオフとなり、図2に
おいて広帯域増幅器1の利得制御電圧VはV1となり、
利得GはG1となる。受信機が衛星2を受信し、入力5
の入力信号2が広帯域増幅器1へ入力された場合、スイ
ッチ回路SW1がオフ、スイッチ回路SW2がオン、スイ
ッチ回路SW3がオンとなり、図2において広帯域増幅
器1の利得制御電圧VはV2となり、利得GはG2とな
る。受信機が衛星3を受信し、入力6の入力信号3が広
帯域増幅器1へ入力された場合、スイッチ回路SW1が
オン、スイッチ回路SW2がオフ、スイッチ回路SW3が
オンとなり、図2において広帯域増幅器1の利得制御電
圧VはV3となり、利得GはG3となる。受信機が衛星
4を受信し、入力7の入力信号4が広帯域増幅器1へ入
力された場合、スイッチ回路SW1がオフ、スイッチ回
路SW2がオフ、スイッチ回路SW3がオンとなり、図2
において広帯域増幅器1の利得制御電圧VはV4とな
り、利得GはG4となる。
In FIG. 1, satellite broadcasting and satellite communication receivers
When the satellite 1 is received by (hereinafter, referred to as a receiver) and the input signal 1 of the input 4 is input to the wide band amplifier 1, the switch circuit SW1 in the reference voltage dividing circuit 2 is turned off and the switch circuit SW2 is turned on. , The switch circuit SW3 is turned off, and the gain control voltage V of the wide band amplifier 1 becomes V1 in FIG.
The gain G is G1. Receiver receives satellite 2 and input 5
2 is input to the wide band amplifier 1, the switch circuit SW1 is turned off, the switch circuit SW2 is turned on, the switch circuit SW3 is turned on, and the gain control voltage V of the wide band amplifier 1 becomes V2 in FIG. Becomes G2. When the receiver receives the satellite 3 and the input signal 3 of the input 6 is input to the wideband amplifier 1, the switch circuit SW1 is turned on, the switch circuit SW2 is turned off, and the switch circuit SW3 is turned on. Gain control voltage V becomes V3, and gain G becomes G3. When the receiver receives the satellite 4 and the input signal 4 of the input 7 is input to the wide band amplifier 1, the switch circuit SW1 is turned off, the switch circuit SW2 is turned off, and the switch circuit SW3 is turned on.
At, the gain control voltage V of the wide band amplifier 1 becomes V4 and the gain G becomes G4.

【0020】このように、受信衛星によって異なるFM
変調度,FM復調後の信号極性に対応し、基準電圧分圧
回路2内の抵抗R1,R2,R3と可変抵抗VR1の抵抗値
を最適化し、スイッチ回路SW1,SW2,SW3の動作
と組み合わせることで広帯域増幅器1の利得と極性を制
御でき、同一の振幅,極性の検波信号が出力される。
In this way, FM that differs depending on the receiving satellite
Corresponding to the modulation degree and the signal polarity after FM demodulation, the resistance values of the resistors R1, R2, R3 and the variable resistor VR1 in the reference voltage dividing circuit 2 are optimized and combined with the operation of the switch circuits SW1, SW2, SW3. The gain and the polarity of the wide band amplifier 1 can be controlled by, and the detection signal of the same amplitude and polarity is output.

【0021】広帯域増幅器1自体の利得のバラツキは、
可変抵抗VR1を調整することで吸収できるが、図1の
入力4〜7の各入力信号1〜4に対し出力信号8の振幅
は若干の偏差を生ずる。しかしながら、実用上は問題の
ない値である。
The variation in gain of the broadband amplifier 1 itself is
Although it can be absorbed by adjusting the variable resistor VR1, the amplitude of the output signal 8 is slightly different from the input signals 1 to 4 of the inputs 4 to 7 in FIG. However, it is a value that poses no problem in practice.

【0022】なお、可変抵抗VR1の抵抗値のバラツキ
は通常±25%以上あり、可変抵抗VR1も含めて電圧の
分圧をする場合、可変抵抗VR1の抵抗値の変化は基準
電圧分圧回路2の特性に大きな影響を及ぼす。この基準
電圧分圧回路では、可変抵抗VR1と並行に抵抗R2を接
続し、可変抵抗VR1の抵抗値に対し抵抗R2の抵抗値を
小さくすることで可変抵抗VR1の抵抗値の変化による
影響を抑えている。抵抗R1,R2,R3に高精度抵抗を
用いることで精密な分圧特性を持つ分圧回路を実現して
いる。更に複数のFM変調度の異なる衛星を受信する場
合、分圧回路内の抵抗とスイッチ回路の組み合わせを増
やせば容易に実現できる。
Incidentally, the variation in the resistance value of the variable resistor VR1 is usually ± 25% or more, and when the voltage is divided by the variable resistor VR1 as well, the change in the resistance value of the variable resistor VR1 is caused by the reference voltage dividing circuit 2. Greatly affect the characteristics of. In this reference voltage dividing circuit, the resistor R2 is connected in parallel with the variable resistor VR1 and the resistance value of the resistor R2 is made smaller than the resistance value of the variable resistor VR1 to suppress the influence of the change in the resistance value of the variable resistor VR1. ing. By using high-precision resistors for resistors R1, R2, and R3, a voltage divider circuit with precise voltage dividing characteristics is realized. Further, when receiving a plurality of satellites having different FM modulation degrees, this can be easily realized by increasing the number of combinations of resistors and switch circuits in the voltage dividing circuit.

【0023】[0023]

【発明の効果】以上説明したように、本発明によれば、
受信衛星によって異なるFM変調度,FM復調後の信号
極性に対応し、広帯域増幅器と前記広帯域増幅器の基準
電圧の1/2の電圧を発生する1/2基準電圧発生回路
と、前記広帯域増幅器の利得と極性を制御する複数の抵
抗、スイッチ回路と1つの可変抵抗より構成する基準電
圧分圧回路とからなる検波出力回路を用いて、広帯域増
幅器の増幅度と極性を変えることで検波信号の振幅と極
性を同一とすることができ、受信機の生産工程において
作業を簡素化し、安価な衛星放送,衛星通信受信機を提
供できる。
As described above, according to the present invention,
A wide band amplifier, a 1/2 reference voltage generating circuit for generating a voltage of 1/2 of the reference voltage of the wide band amplifier, and a gain of the wide band amplifier, which correspond to the FM modulation degree and the signal polarity after the FM demodulation that differ depending on the receiving satellite. And the amplitude of the detection signal by changing the amplification degree and the polarity of the wide band amplifier by using a detection output circuit consisting of a plurality of resistors for controlling the polarity, a switch circuit and a reference voltage dividing circuit composed of one variable resistor. Since the polarities can be the same, the work can be simplified in the production process of the receiver, and an inexpensive satellite broadcasting or satellite communication receiver can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における検波出力回路のブロ
ック図である。
FIG. 1 is a block diagram of a detection output circuit according to an embodiment of the present invention.

【図2】図1の広帯域増幅器の利得特性図である。FIG. 2 is a gain characteristic diagram of the wideband amplifier of FIG.

【図3】従来の検波出力回路のブロック図である。FIG. 3 is a block diagram of a conventional detection output circuit.

【符号の説明】[Explanation of symbols]

1…広帯域増幅器、 2…基準電圧分圧回路、 3…1
/2基準電圧発生回路。
1 ... Wideband amplifier, 2 ... Reference voltage dividing circuit, 3 ... 1
/ 2 Reference voltage generation circuit.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 衛星放送,衛星通信受信機において、受
信衛星によって異なるFM変調度,FM復調後の信号極
性に対応し、増幅度と極性を変えることで検波信号の振
幅と極性を同一とするための広帯域増幅器と、前記広帯
域増幅器の基準電圧の1/2の電圧を発生する1/2基準
電圧発生回路と、前記広帯域増幅器の利得と極性を制御
する複数の抵抗,スイッチ回路と1つの可変抵抗より構
成される基準電圧分圧回路とからなることを特徴とする
検波出力回路。
1. In a satellite broadcasting and satellite communication receiver, the amplitude and polarity of a detection signal are made the same by corresponding to the FM modulation degree and the signal polarity after FM demodulation that differ depending on the receiving satellite, and by changing the amplification degree and the polarity. A wide band amplifier, a 1/2 reference voltage generation circuit that generates a voltage that is 1/2 of the reference voltage of the wide band amplifier, a plurality of resistors and switch circuits that control the gain and polarity of the wide band amplifier, and one variable A detection output circuit comprising a reference voltage dividing circuit composed of a resistor.
JP20722894A 1994-08-31 1994-08-31 Detected signal output circuit Pending JPH0879114A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20722894A JPH0879114A (en) 1994-08-31 1994-08-31 Detected signal output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20722894A JPH0879114A (en) 1994-08-31 1994-08-31 Detected signal output circuit

Publications (1)

Publication Number Publication Date
JPH0879114A true JPH0879114A (en) 1996-03-22

Family

ID=16536367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20722894A Pending JPH0879114A (en) 1994-08-31 1994-08-31 Detected signal output circuit

Country Status (1)

Country Link
JP (1) JPH0879114A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6417503B1 (en) 1998-04-24 2002-07-09 Fuji Electric Co., Ltd. Optical sensor circuit with output changing means

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6417503B1 (en) 1998-04-24 2002-07-09 Fuji Electric Co., Ltd. Optical sensor circuit with output changing means

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