JPH0877129A - Chaos neuron circuit - Google Patents

Abstract

PURPOSE: To provide the chaos neuron circuit which reduces trailing of the data history and easily realizes the chaos state or a higher order and stabilizes a reference potential by bias correction. CONSTITUTION: In this chaos neuron circuit, the signal of reference oscillation from a reference oscillation generation circuit 7 is made into a signal having a fluctuating amplitude by an amplifier 6b provided with a delay feedback circuit and is inputted to one input or an adder-subtractor 3, and the output of the adder-subtractor 3 is inputted to the input of an amplifier 6C, and the output or the amplifier 6C is inputted to the input of a delay circuit 8, and the signal delayed by the delay circuit 8 is inputted to a bias correction circuit 10, and the signal subjected to bias correction by the bias correction circuit 10 is inputted to an amplifier 6a, and the output of the amplifier a is inputted to a multiplier 4 where it is multiplied by a constant (k), and an external input is added to the output of the multiplier 4, and the result is inputted to the other input of the adder-subtractor 3, and the output of the adder-subtractor 3 is outputted through a comparator 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chaotic neuron circuit in a chaotic neural network, and more particularly to a chaotic neuron circuit capable of stabilizing a reference potential.

[0002]

2. Description of the Related Art Conventionally, a chaos phenomenon has been applied to information processing, and techniques useful for adaptive control, pattern recognition, knowledge information processing and the like have been actively developed. Particularly, as a chaotic neuron circuit that easily generates a chaotic phenomenon observed in an electrophysiological experiment using a biological neuron, JP-A-1
The "chaos circuit network" is described in Japanese Patent Publication No. 147657.

The chaotic neuron circuit disclosed in JP-A-1-147657 will be described with reference to FIG. FIG. 10 is a configuration block diagram of a conventional chaotic neuron circuit in which the chaotic circuit network of FIG. 2 of Japanese Patent Laid-Open No. 1-147657 is rewritten for easy explanation. As shown in FIG. 10, the conventional chaotic neuron circuit has a first switch (SW).
1, a second switch (SW) 2, an adder / subtractor 3, a multiplier 4, a comparator 5, and amplifiers 6a, 6b, 6c.
It consists of and.

As for the connection relationship of the conventional chaotic neuron circuit, the output of the amplifier 6c is input to SW1, the output of SW1 is input to the amplifier 6a, and the output of the amplifier 6a is branched and input to the multiplier 4 and the amplifier 6b. , An external input is added to the output of the multiplier 4 and is input to the adder / subtractor 3, and the output of the amplifier 6b is branched and one of them is input to the adder / subtractor 3,
The other is input to the comparator 5, the output of the adder / subtractor 3 is input to SW2, and the output of SW2 is input to the amplifier 6c. Capacitors are provided at the input portions of the amplifiers 6a and 6c, and the output of the comparator 5 is the output of the chaotic neuron circuit.

Explaining the operation of the above-mentioned conventional chaotic neuron circuit, the feedback signal output from the amplifier 6a is multiplied by the constant K in the multiplier 4, an external input is added to the output from the multiplier 4, and the external input is applied. Is added to the output signal from the amplifier 6b to be output to the amplifier 6c, and the output from the amplifier 6c is fed back to the amplifier 6a. The output from is branched and the comparator 5
The output from the comparator 5 is the output of the conventional chaotic neuron circuit.

In order to generate a chaotic phenomenon in the above-mentioned conventional chaotic neuron circuit, the chaotic state is realized by changing the setting of the order parameters of the timings φ1 and φ2 at which the SW1 and SW2 are turned on / off. . As a clock generation circuit for a switch that realizes this timing operation, for example, one as shown in FIG. 11 can be considered ("Chaos in Neural System" by Kazuyuki Aihara).
Published by Tokyo Denki University Press, p182).

[0007] In addition, "Chaos Application Strategy" Kazuyuki Aihara and Takaharu Tokunaga, supervised by Ohmsha, p83-p86, describes a chaotic neuron circuit (chaos chip) that generates a chaotic phenomenon. It is necessary to have one non-linear circuit and one delay circuit as a necessary condition of, and it is possible to have a linear coefficient circuit and an adder as an extension to higher dimensions. " The chaos chip has terminals (pins) for changing parameters from the outside.

[0008]

However, in the conventional chaotic neuron circuit, the chaotic state is realized by changing the setting of the order parameter given from the outside. Therefore, if the parameter setting is not appropriate, other There was a problem that the proper chaotic state could not be generated due to the history of previous data due to the interaction of circuits.

Therefore, there remains a problem that it is not easy to realize a high-dimensional (higher-order) chaotic circuit by applying the conventional chaotic neuron circuit.

Therefore, it is provided with an adder / subtractor for taking the difference between two inputs, an amplifier having a delay feedback circuit, a reference vibration generation circuit for generating a reference vibration signal, and a delay circuit for generating a signal delay. , The reference vibration signal output from the reference vibration generating circuit is connected to the input of the amplifier, the output from the amplifier is connected to one input of the adder / subtractor, and the output from the adder / subtractor is A chaotic neuron that is connected so as to be fed back through a delay circuit and input to the other input of the adder / subtractor, an external input is further added to the other input of the adder / subtractor, and the output of the adder / subtractor is the output of the chaotic neuron circuit. The circuit is being considered.

In the operation of the chaotic neuron circuit, the reference vibration signal is generated from the reference vibration generating circuit,
This reference oscillation signal is input to one input of the adder / subtractor via an amplifier having a delay feedback circuit, the feedback signal output from the adder / subtractor is delayed by the delay circuit, and the signal to which an external input is added is It is input to the other input of the adder / subtractor, and the output from this adder / subtractor is used as the output of the chaotic neuron circuit. The amplitude of the reference oscillation signal generated from the reference oscillation generation circuit is fluctuated by the amplifier having the delay feedback circuit. Signal of this state, and the difference between the signal of this shaking state and the signal of which the external input is added to the feedback signal fed back through the delay circuit is taken by the adder / subtractor, and the high-order chaotic signal is output. As compared with the chaotic neuron circuit shown in FIG. 10, it is not necessary to set the order parameter for chaos generation.
High-order chaotic states can be properly generated without being dragged by the history of previous data.

However, in the case of the above-mentioned chaotic neuron circuit, if the delay information fed back from the delay circuit is directly input to the other input stage of the adder / subtractor, a bias voltage is generated because of the linear addition, and the reference There was a problem that the potential was changed.

The present invention has been made in view of the above situation, and the delay potential fed back from the delay circuit or the information from another neuron is directly input to the input stage to generate the reference potential of the reference voltage. It is an object of the present invention to provide a chaotic neuron circuit capable of correcting fluctuations and always holding an appropriate reference potential.

[0014]

According to a first aspect of the present invention for solving the above-mentioned problems of the conventional example, a chaotic neuron circuit is provided with an adder / subtractor for taking a difference between two inputs and a delay feedback circuit. The reference vibration output circuit includes an amplifier, a reference vibration generation circuit that generates a reference vibration signal, a delay circuit that generates a signal delay, and a bias correction circuit that corrects a bias voltage. Signal is input to the input of the amplifier, the output from the amplifier is connected to one input of the adder / subtractor, and the output from the adder / subtractor is input to the delay circuit. Are connected so that the output from the delay circuit is input to the bias correction circuit, and the output from the bias correction circuit is the other of the adder / subtractor. Is connected to the input to the force, further external input is applied to the other input of said adder and subtracter, and characterized in that the output of the circuit the output of the adder-subtractor.

According to a second aspect of the present invention for solving the problems of the conventional example, in the chaotic neuron circuit according to the first aspect, the reference vibration signal from the reference vibration generating circuit is amplified in synchronization with the external input. It is characterized in that a frequency adjusting circuit for outputting to is provided.

According to a third aspect of the present invention for solving the above-mentioned problems of the conventional example, in a chaotic neuron circuit, 2
An adder / subtractor that takes the difference between two inputs, an amplifier equipped with a delay feedback circuit, a reference vibration generation circuit that generates a reference vibration signal, a delay circuit that generates a signal delay, and a bias correction circuit that corrects the bias voltage. A reference vibration signal output from the reference vibration generating circuit is connected to be input to an input of the amplifier, and an output from the amplifier is connected to one input of the adder / subtractor. The output from the adder / subtractor is connected to be input to the delay circuit, and the output from the delay circuit is connected to be input to the bias correction circuit,
The output from the bias correction circuit is connected so as to be input to the other input of the adder / subtractor, and an external input is further added between the delay circuit and the bias correction circuit to output the output of the adder / subtractor to the circuit. It is characterized by being output.

According to a fourth aspect of the present invention for solving the problems of the conventional example, in the chaotic neuron circuit according to the third aspect, the reference vibration signal from the reference vibration generating circuit is amplified in synchronization with the external input. It is characterized in that a frequency adjusting circuit for outputting to is provided.

[0018]

According to the first aspect of the present invention, the reference vibration signal is generated from the reference vibration generating circuit, and the reference vibration signal is input to one input of the adder / subtractor via the amplifier having the delay feedback circuit. , The feedback signal output from the adder / subtractor is delayed by the delay circuit, the delayed feedback signal is bias-corrected by the bias correction circuit, and the signal obtained by adding the external input to the bias-corrected feedback signal is the adder-subtractor. Since the output of this adder / subtractor is input to the other input of the chaotic neuron circuit and is used as the output of the chaotic neuron circuit, the amplitude of the reference oscillation signal generated from the reference oscillation generating circuit is increased by the amplifier having the delay feedback circuit. It is assumed that the signal is in a swinging state, and the swinging state signal and the feedback signal fed back through the delay circuit are externally input. Since the difference from the added signal is taken by an adder / subtractor and a high-order chaotic state signal is output, a high-order chaotic neuron circuit can be easily realized and the bias correction of the delayed feedback signal is performed. This makes it possible to stabilize the reference potential.

According to the invention described in claim 2, since the chaotic neuron circuit according to claim 1 is provided with the frequency adjusting circuit for supplying the signal of the reference oscillation synchronized with the external input to the amplifier, the bias correction of the feedback signal is performed. In addition to the stabilization of the reference potential by, external inputs can be incorporated into the pure chaotic state.

According to the third aspect of the present invention, the reference vibration signal is generated from the reference vibration generating circuit, and the reference vibration signal is input to one input of the adder / subtractor via the amplifier having the delay feedback circuit. , The feedback signal output from the adder / subtractor is delayed by the delay circuit, the external feedback added signal to the delayed feedback signal is bias-corrected by the bias correction circuit, and the bias-corrected signal is added to the adder-subtractor signal. Since the chaotic neuron circuit, which is input to the other input and the output from this adder / subtractor is used as the output of the chaotic neuron circuit, the amplitude of the reference oscillation signal generated from the reference oscillation generating circuit is fluctuated by the amplifier having the delay feedback circuit. Signal of this swinging state and the feedback signal by the feedback through the delay circuit to the external input The difference from the added signal is taken by the adder / subtractor, and the signal of the higher-order chaotic state is output. Therefore, the higher-order chaotic neuron circuit can be easily realized, and the delayed feedback signal is externally input. The reference potential can be further stabilized by bias correction of the signal added with.

According to the invention described in claim 4, since the chaotic neuron circuit according to claim 3 is provided with the frequency adjusting circuit for supplying the signal of the reference oscillation synchronized with the external input to the amplifier, the feedback signal has the external input. In addition to stabilizing the reference potential by bias correction of the applied signal, an external input can be incorporated into the pure chaotic state.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a configuration block diagram of a chaotic neuron circuit according to an embodiment of the present invention. It should be noted that portions having the same configuration as in FIG.

The chaotic neuron circuit of this embodiment is a chaotic neuron circuit that generates higher-order chaos, and a bias correction circuit is provided after the delay circuit provided in the feedback portion of the chaotic neuron circuit to stabilize the reference voltage. It is intended to be.

The chaotic neuron circuit of this embodiment is shown in FIG.
As shown in FIG. 3, the adder / subtractor 3, the multiplier 4, the comparator 5, the amplifiers 6a, 6b and 6c, the reference vibration generating circuit 7, the delay circuit 8 and the bias correcting circuit 10 are included. . Here, an amplifier 6b having a reference vibration generating circuit 7 and a delay feedback circuit and a delay circuit 8 are provided to realize a higher-order chaotic phenomenon. The adder / subtractor 3, the multiplier 4, the comparator 5,
Since the basic operation of the amplifier 6 is as widely and generally known, a detailed description thereof will be omitted here.

The connection relationship of the chaotic neuron circuit of this embodiment is that the output of the amplifier 6c is input to the delay circuit 8, the output of the delay circuit 8 is input to the bias correction circuit 10, and the output of the bias correction circuit 10 is input to the amplifier 6a. , The output of the amplifier 6a is input to the multiplier 4, the external input is added to the output of the multiplier 4 and is input to one terminal of the adder / subtractor 3, and the output of the reference vibration generation circuit 7 is input to the amplifier 6b. Is input to the other terminal of the adder / subtractor 3, the output of the adder / subtractor 3 is branched, and one is output to the amplifier 6c.
Is input to the comparator 5, and the other is input to the comparator 5, and the output of the chaotic neuron circuit of this embodiment is obtained from the comparator 5.

The input portion of the amplifier 6b is grounded via the resistor r, and the input portion of the amplifier 6c is grounded via the capacitor C. A resistor R is used as a delay feedback circuit for the amplifiers 6b and 6c.

Here, the reference vibration generating circuit 7 of the present embodiment.
Is a reference vibration generating circuit using a crystal oscillator, for example. Further, the reference vibration generating circuit 7 may be a reference vibration generating circuit that generates a periodic clock using an electric relay circuit.

Further, in the chaotic neuron circuit of this embodiment, in order to generate higher order chaos, the variable resistor VR is fed back to the feedback circuit from the amplifier 6c to the amplifier 6a.
And a delay circuit 8 including a variable capacitor VC.

The delay circuit 8 has a configuration in which a variable resistor VR and a variable capacitor VC are connected in parallel.
And the value of the variable capacitor VC are adjusted to change the delay time and generate a periodic signal (periodic attractor) or a quasi-periodic signal (quasi-periodic attractor) or a chaotic signal (aperiodic attractor). It is what makes me.

Further, even if the delay circuit 8 is constituted by connecting the variable resistor VR and the variable capacitor VC in series, the delay time can be changed and an attractor similar to the above can be generated.

Next, the bias correction circuit 10 which is a characteristic part of this embodiment will be described with reference to FIG. Figure 2
It is a circuit diagram of a bias correction circuit 10 of the present embodiment. As shown in FIG. 2, the bias correction circuit 10 is basically composed of an operational amplifier 11, and the output from the delay circuit 8 is input to both the positive (+) and negative (-) input terminals of the operational amplifier 11, The output from the operational amplifier 11 is the amplifier 6
It is input to a. The output from the operational amplifier 11 is fed back to the (-) input terminal via the resistor R0. The (+) input terminal side of the operational amplifier 11 is grounded via a resistor R1.

The function of the bias correction circuit 10 of this embodiment is to correct the DC component of the input current.
When the input to the operational amplifier 11 rises, the output of the operational amplifier 11 is lowered, and when the input to the operational amplifier 11 is lowered, the output of the operational amplifier 11 is raised so that the output from the operational amplifier 11 is kept constant.

That is, since the information fed back through the delay circuit 8 contains the bias component as it is, it is amplified by the amplifier 6a and the constant k is added by the adder 4 so that the external input is added. Then, the reference potential in the chaotic neuron circuit fluctuates, but since the bias component is corrected by the bias correction circuit 10 of the present embodiment and a constant level output is given to the amplifier 6a, the reference potential is stabilized. It can be converted.

Next, the operation of the chaotic neuron circuit of this embodiment will be described. As shown in FIG. 1, the amplifier 6c
Is input to the delay circuit 8, the output is delayed by the delay circuit 8 and input to the bias correction circuit 10, the bias correction circuit 10 performs bias correction, and the output is input to the amplifier 6a. Output from the multiplier 4
Is multiplied by a constant k (electrically constant level signal), an external input is added to the output from the multiplier 4, the output from the reference vibration generating circuit 7 is input to the amplifier 6b, and the output from the amplifier 6b is input. The difference between the output and the signal obtained by adding an external input to the output from the multiplier 4 is taken by the adder / subtractor 3 and input to the amplifier 6c. Here, the output from the adder / subtractor 3 is branched and input to the comparator 5, and the output from this comparator 5 becomes the output of the chaotic neuron circuit of this embodiment.

The constant k indicates a refractory time decay constant, and the value is determined in the range of 0≤k <1 ("Chaos [Basic and Application of Chaos Theory]" Kazuyuki Aihara. Edited by Science Publishing, p300-p301).

Since the resistor R is provided as the delay feedback circuit in the amplifier 6b, the amplitude of the signal input from the reference vibration generating circuit 7 to the amplifier 6b is affected by the delay time depending on the value of the resistor R. It may be shaking. This swaying state is caused by the chaos phenomenon, and this state can be realized by adjusting the gain (actually, the resistance ratio by the resistor R) of the input stage or the output stage of the amplifier 6b.

The feedback signal amplified by the amplifier 6a is multiplied by the constant k in the multiplier 4 using the signal in the swaying state output from the amplifier 6b, and the difference from the signal further externally input is added. It is taken by the adder / subtractor 3 and a signal in a chaotic state is generated from the comparator 5.

The delay feedback circuit of the amplifier 6b in FIG. 1 is realized by using a resistor R, but a CCD (Charge Coupled D) that sequentially shifts and outputs the accumulated charges is output.
It is also possible to use a capacitor C, a variable resistor VR, a variable capacitor VC, or a resistor R.
An element in which the capacitor C and the capacitor C are connected in parallel may be used, or an element in which the variable resistor VR and the variable capacitor VC are connected in parallel may be used. The variable capacitor VC can also be realized by changing the parallel capacitance of the capacitors using a relay, for example.

In the embodiment shown in FIG. 1, the delay circuit 8 and the amplifier 6 are provided.
Although the bias correction circuit 10 is provided between the bias correction circuit 10 and a, the bias correction circuit 10 is provided between the amplifier 6a and the multiplier 4 as shown in the block diagram of FIG. May be performed.

Next, a chaotic neuron circuit capable of changing the allowable range of high-order chaos generated by the chaotic neuron circuit with respect to an input signal and performing bias correction will be described with reference to FIG. FIG. 4 is a configuration block diagram of a chaotic neuron circuit capable of changing the allowable range of high-order chaos and performing bias correction. The chaotic neuron circuit shown in FIG. 4 is provided with a frequency adjusting circuit 9 for synchronizing the external input with the reference frequency, based on the chaotic neuron circuit shown in FIG.

The frequency adjusting circuit 9 is specifically composed of a frequency divider 9a for dividing the frequency of the input signal and a multiplier 9b of an AND gate, and the signal divided by the frequency divider 9a and the reference vibration. The product of the reference frequency output from the generation circuit 7 (A
ND) is taken by the multiplier 9b and output to the amplifier 6b. That is, by synchronizing the external input signal with the reference frequency, the external input signal can be taken into a pure chaotic state.

In the chaotic neuron circuit of FIG. 4, as in the case of FIG. 3, the bias correction circuit 1 is provided between the amplifier 6a and the multiplier 4 as shown in the block diagram of FIG.
The bias correction may be performed by providing 0.

According to the chaotic neuron circuits of FIGS. 1 and 3, the reference vibration signal generated from the reference vibration generating circuit 7 is used as a signal whose amplitude is fluctuated by the amplifier 6b having the delay feedback circuit, and this fluctuation is generated. The difference between the signal in the state in which the external input is added to the delayed feedback signal from the delay circuit 8 provided in the feedback section from the amplifier 6c to the amplifier 6a is added by the adder / subtractor 3,
Since the bias voltage in the chaotic neuron circuit is corrected by outputting the chaotic signal from the comparator 5 and further providing the bias correction circuit 10, as compared with the conventional chaotic circuit shown in FIG. Since it is not necessary to set the order parameters of the timings φ1 and φ2 for turning on / off the switches SW1 and SW2 for generating chaos, it is possible to generate a good chaos state without being dragged by the history of previous data. There is an effect that the chaotic neuron circuit can be easily realized, and further, an effect that the reference voltage is stabilized by the bias voltage correction and an appropriate chaotic state can be generated.

Further, by stabilizing the reference potential, the output information can be standardized even in the analog circuit, attractors can be compared with the same order parameter, and the chaotic state of the system can be easily observed. That is, changes in the Poincare map due to the higher-order phase output information can be compared by the same attractor.

Further, according to the chaotic neuron circuits of FIGS. 4 and 5, in addition to stabilizing the reference potential, the frequency adjusting circuit 9 can obtain the signal of the reference oscillation synchronized with the external input signal. Therefore, there is an effect that the external input signal can be taken into a pure chaotic state by synchronizing the external input signal with the reference frequency.

Next, a chaotic neuron circuit of another embodiment for performing bias correction will be described with reference to FIG. FIG. 6 is a configuration block diagram of a chaotic neuron circuit according to another embodiment. In the chaotic neuron circuit of another embodiment, as shown in FIG. 6, an external input (yi: output from another neuron element) is not added between the multiplier 6a and the adder / subtractor 3, but a delay circuit 8 An external input (yi) is added between the amplifier 6a and the amplifier 6a, and a bias correction circuit 10 'is provided between the portion to which the external input is applied and the amplifier 6a.

Next, the bias correction circuit 10 'will be described in detail with reference to FIGS. FIG. 7 is a circuit diagram showing a specific example of the bias correction circuit 10 'of another embodiment, and FIG. 8 is a bias correction circuit 1 of another embodiment.
It is a circuit diagram which shows the other specific example of 0 '. As shown in FIG. 7, the bias correction circuit 10 'includes a differential amplifier 12 and a power supply V. A signal (information) obtained by adding the feedback output xt from the delay circuit 8 to the output yi from another neuron element is input to the (-) terminal of the differential amplifier 12, and the (+) terminal receives the signal from the power supply V. A voltage is applied, and the output of the differential amplifier 12 is negatively fed back and input to the (-) terminal. The output of the differential amplifier 12 is input to the amplifier 6a.

The operation of the bias correction circuit 10 'is such that the information (xt + yi) in which the external input is added to the feedback signal is
While being input to the (−) terminal of the differential amplifier 12, it is also output to the output side of the differential amplifier 12.
Output is obtained by inverting the difference between the above information and the voltage of the power supply V, so that the final output of the differential amplifier 12 is obtained by subtracting the difference from the information (xt + yi).

That is, when the information (xt + yi) becomes larger than the voltage (reference voltage) of the power source V due to the generation of the bias voltage, the output of the differential amplifier 12 outputs a negative difference, and the negative difference is negative. Information output via feedback (x
When t + yi) is added, the bias component will be removed.

Next, the bias correction circuit 10 'shown in FIG. 8 will be described. As shown in FIG. 8, the bias correction circuit 1
0'is composed of a differential amplifier 13 and an inverting amplifier 14. At the (−) terminal of the differential amplifier 13, information (x
t + yi) is input, and the (+) terminal is grounded via a resistor Rx. The output from the differential amplifier 13 is input to the (−) terminal of the inverting amplifier 14 and the (+) terminal is grounded. Then, the output of the inverting amplifier 14 is input to the amplifier 6a.

In the operation of the bias correction circuit 10 ', information (xt + yi) is input to the (-) terminal of the differential amplifier 13, and a voltage ((+) terminal corresponding to the value of the information is supplied to the (+) terminal by the resistor Rx. This is the voltage corresponding to the bias component.)
Is applied, the difference is output as a negative value, and the output is further input to the (−) terminal of the inverting amplifier 14 and is inverted and output from the inverting amplifier 14.

That is, the differential amplifier 13 obtains negative information from which the bias voltage component is subtracted, and the inverting amplifier 14 inverts its output to obtain positive information (output without the bias component).

Further, as in the case of FIG. 6, the chaotic neuron circuit of another embodiment can be configured as shown in FIG. FIG. 9 is based on the chaotic neuron circuit of FIG. 4, and similarly to FIG. 6, adds an external input (yi) between the delay circuit 8 and the amplifier 6a, and further adds a bias correction circuit 10 'to the input stage of the amplifier 6a. This is a chaotic neuron circuit provided.

According to the chaotic neuron circuits of the embodiments shown in FIGS. 6 and 9, an external input is added between the delay circuit 8 and the amplifier 6a, and the bias correction circuit 1 is added to the input stage of the amplifier 6a.
Since 0'is provided for bias correction,
External input (yi) to the feedback output (xt) from the delay circuit 8
Since the bias can be corrected for the added information,
There is an effect that the reference potential is further stabilized and an appropriate chaotic state can be generated.

Further, according to the chaotic neuron circuit of FIG. 9, in addition to performing the bias correction for the information in which the external input (yi) is added to the feedback output (xt), the frequency adjusting circuit 9 converts the external input signal into the external input signal. Since the synchronized reference vibration signal can be obtained, the external input signal can be taken into a pure chaotic state by synchronizing the external input signal with the reference frequency.

[0056]

According to the first aspect of the present invention, the reference vibration signal is generated from the reference vibration generating circuit, and the reference vibration signal is input to one input of the adder / subtractor via the amplifier having the delay feedback circuit. The feedback signal that is input and output from the adder-subtractor is delayed by the delay circuit, the delayed feedback signal is bias-corrected by the bias correction circuit, and the bias-corrected feedback signal to which an external input is added is the above-mentioned signal. Since the output of the adder / subtractor is input to the other input of the adder / subtractor and used as the output of the chaotic neuron circuit, the reference oscillation signal generated by the reference oscillation generating circuit is output by the amplifier having the delay feedback circuit. A signal with a fluctuating amplitude is used as a signal in this fluctuating state and a feedback signal by feedback through a delay circuit. The difference from the signal to which the partial input is added is taken by the adder / subtractor, and the signal in the higher-order chaotic state is output. Therefore, a higher-order chaotic neuron circuit can be easily realized, and the delayed feedback signal The bias correction has the effect of stabilizing the reference potential.

According to the invention described in claim 2, since the chaotic neuron circuit according to claim 1 is provided with the frequency adjusting circuit for supplying the signal of the reference oscillation synchronized with the external input to the amplifier, the bias correction of the feedback signal is performed. In addition to the stabilization of the reference potential by, there is an effect that an external input can be taken into a pure chaotic state.

According to the third aspect of the present invention, the reference vibration signal is generated from the reference vibration generating circuit, and the reference vibration signal is input to one input of the adder / subtractor via the amplifier having the delay feedback circuit. , The feedback signal output from the adder / subtractor is delayed by the delay circuit, the external feedback added signal to the delayed feedback signal is bias-corrected by the bias correction circuit, and the bias-corrected signal is added to the adder-subtractor signal. Since the chaotic neuron circuit, which is input to the other input and the output from this adder / subtractor is used as the output of the chaotic neuron circuit, the amplitude of the reference oscillation signal generated from the reference oscillation generating circuit is fluctuated by the amplifier having the delay feedback circuit. Signal of this swinging state and the feedback signal by the feedback through the delay circuit to the external input The difference between the added signal and the added signal is taken by the adder / subtractor, and the higher-order chaotic state signal is output. Therefore, a higher-order chaotic neuron circuit can be easily realized, and the delayed feedback signal is externally input. There is an effect that the reference potential can be further stabilized by the bias correction of the signal added with.

According to the invention described in claim 4, since the chaotic neuron circuit according to claim 3 is provided with the frequency adjusting circuit for supplying the signal of the reference oscillation synchronized with the external input to the amplifier, the feedback signal has the external input. In addition to the stabilization of the reference potential by bias correction of the signal added with, there is an effect that an external input can be taken into a pure chaotic state.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a chaotic neuron circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a specific example of a bias correction circuit of this embodiment.

FIG. 3 is a configuration block diagram of a chaotic neuron circuit according to a modified example of this embodiment.

FIG. 4 is a configuration block diagram of a chaotic neuron circuit capable of changing a permissible range of high-order chaos and performing bias correction.

5 is a configuration block diagram of a chaotic neuron circuit according to a modified example of FIG.

FIG. 6 is a configuration block diagram of a chaotic neuron circuit according to another embodiment.

FIG. 7 is a circuit diagram showing a specific example of a bias correction circuit 10 ′ according to another embodiment.

FIG. 8 is a circuit diagram showing another specific example of the bias correction circuit 10 ′ according to another embodiment.

9 is a configuration block diagram of a chaotic neuron circuit of another embodiment based on the chaotic neuron circuit of FIG.

FIG. 10 is a configuration block diagram of a conventional chaotic neuron circuit.

FIG. 11 is a configuration block diagram of a conventional clock generation circuit for a switch.

[Explanation of symbols]

1 ... Switch (SW), 2 ... Switch (SW), 3
... Adder / subtractor, 4 ... Multiplier, 5 ... Comparator, 6
... Amplifier, 7 ... Reference vibration generating circuit, 8 ... Delay circuit,
9 ... Frequency adjusting circuit, 10, 10 '... Bias correcting circuit, 11 ... Operational amplifier, 12, 13 ... Differential amplifier, 14 ... Inversion amplifier

Claims (4)

[Claims] 1. An adder-subtractor that takes the difference between two inputs, an amplifier that includes a delay feedback circuit, a reference vibration generation circuit that generates a reference vibration signal, a delay circuit that generates a signal delay, and a bias voltage. And a bias correction circuit that corrects the reference vibration signal, the reference vibration signal output from the reference vibration generation circuit is connected to the input of the amplifier, and the output from the amplifier is input to one input of the adder / subtractor. From the bias correction circuit, the output from the adder / subtractor is connected to be input to the delay circuit, and the output from the delay circuit is connected to be input to the bias correction circuit. Of the adder / subtractor is connected to the other input of the adder / subtractor, and an external input is added to the other input of the adder / subtractor to rotate the output of the adder / subtractor. A chaotic neuron circuit characterized by being the output of a path. 2. A chaotic neuron circuit according to claim 1, further comprising a frequency adjusting circuit for outputting a reference vibration signal from the reference vibration generating circuit to an amplifier in synchronization with an external input. 3. An adder / subtractor that takes the difference between two inputs, an amplifier that includes a delay feedback circuit, a reference vibration generation circuit that generates a reference vibration signal, a delay circuit that generates a signal delay, and a bias voltage. And a bias correction circuit that corrects the reference vibration signal, the reference vibration signal output from the reference vibration generation circuit is connected to the input of the amplifier, and the output from the amplifier is input to one input of the adder / subtractor. From the bias correction circuit, the output from the adder / subtractor is connected to be input to the delay circuit, and the output from the delay circuit is connected to be input to the bias correction circuit. Is connected to the other input of the adder / subtractor, and an external input is further added between the delay circuit and the bias correction circuit, A chaotic neuron circuit characterized in that the output of the subtractor is used as the output of the circuit. 4. The chaotic neuron circuit according to claim 3, further comprising a frequency adjusting circuit for outputting a reference vibration signal from the reference vibration generating circuit to an amplifier in synchronization with an external input.