JPH0869537A - Graphic processor - Google Patents

Abstract

PURPOSE: To greatly increase the processing speed by introducing the concept that clipping mask information and drawing mask information are generated independently of each other. CONSTITUTION: With a select signal, left-end bit position information and right- end bit position information on a clipping mask are determined and outputted to address lines 36 and 37 to access a mask pattern ROM 4. The data are latched as clipping mask data in a clipping mask register 7. With the select signal, pieces of left-end and right-end bit position information on a drawing mask are determined and outputted to address lines 33 and 34 to access the mask pattern ROM 4. Then the clipping mask information and drawing mask information are generated for each transferred word, and an AND circuit 5 performs bit-by-bit AND operation. Then processing is performed based on the final mask data applied from the AND circuit 5 and the result is outputted to a bus 40.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a function for drawing straight lines and circles,
The present invention relates to a graphic processing apparatus having a data transfer function for filling a triangle or a rectangle and transferring memory data in a rectangular area to another rectangular area, and more particularly to a graphic processing apparatus having a so-called clipping function for limiting an area for drawing a graphic. .

[0002]

2. Description of the Related Art Generally, clipping is defined as two bits (X, X) defined by XY coordinates defined on a memory.
₁ , Y ₁ ), (X ₂ , Y ₂ ) (where X ₁ ≤X ₂ , Y ₁
≦ Y ₂ ) is a function that allows drawing a graphic only in (or outside) a rectangular area (clipping rectangle) having a diagonal end point.

The following two conventional clipping methods are available.

The first is a method called pre-clipping, which mathematically solves the relationship between a figure to be drawn and a clipping rectangle to draw a figure included in the clipping rectangle. For example, the straight line AB that intersects the clipping rectangle
When this is drawn, this line and the clipping / rectangle intersections A ′ and B ′ are obtained, and the line A ′ actually drawn is drawn.
In this method, only B 'is obtained.

Second, the XY coordinates in the memory corresponding to one dot of the figure to be drawn are calculated for each dot, and these are sequentially compared with the coordinates of the diagonal end points of the clipping rectangle to perform drawing. This is a method of invalidating the drawing when the dot to be drawn is included in the non-drawing area.

[0006]

The above-mentioned conventional clipping method has the following drawbacks.

First, the former pre-clipping requires a complicated operation including multiplication and division in pre-processing for obtaining the intersection of a clipping rectangle with a figure such as a straight line or a circle. Since non-drawable areas do not need to be drawn, actual drawing can be performed at high speed, but the disadvantage of requiring a very long time for preprocessing and hardware that can perform multiplication and division at high speed are required Therefore, there is a disadvantage that the graphics device becomes very expensive.

On the other hand, the latter method is suitable for a line figure such as a straight line or a circle in which drawing coordinate points are calculated in dot units, but is inconvenient for processing a plane figure such as a rectangular area. In particular, so-called BITBLT (BIT BLOCK T) for transferring data in one rectangular area to another rectangular area
For example, when multiple dots are simultaneously processed in word units, such as transfer, it cannot be used for high-speed processing. Therefore, the graphic processing apparatus employing this method has a drawback that the processing speed is extremely slow because BITBLT must be performed in units of one dot. For example, when a certain rectangular area on the memory is moved to a rectangular area overlapping with the clipping rectangle and only the overlapping part is drawn, the rectangular area must be moved bit by bit.

[0009]

According to the present invention, the clipping mask information and the drawing mask information are independently generated in order to realize the high-speed clipping processing in the processing of each dot and each word. The present invention provides a graphic processing apparatus that eliminates the conventional drawbacks and significantly reduces the processing speed.

The generation of clipping mask data is as follows.
It is realized by the following sequence. First, the clipping rectangle is defined by two diagonal endpoints. Actual drawing needs to be performed irrespective of the drawing permitted area and the drawing non-permitted area, but the XY of the first dot of each word to be drawn.
The word address indicating the coordinates and the word addresses of both words indicating the XY coordinates of the end points (right end and left end) of the clipping area are compared slowly, and the result of the comparison determines which bit of the word to be drawn is to be processed. -Generate mask information. The data to be actually written into the memory is generated based on the clipping mask information and the separately generated drawing mask information.

The graphic processing apparatus according to the present invention uses each memory on the memory.
XY coordinates are defined in the
A graphic processing device that performs drawing, and the characteristics of a word to be drawn.
A coordinate operation that sequentially calculates the coordinates (X, Y) of a fixed position bit.
Calculation means and (X ₁, Y₁), (X₂,
Y₂) (However, X₁≤X₂, Y₁≦ Y₂) To the diagonal endpoint
Define a rectangular area as₁, Y₁And X₂,
Y₂To be drawn by comparing
Is inside or outside the rectangular area, or the boundary of the rectangular area
Comparing means for determining whether a field is included, and the comparing means
Which bit of the word to draw
To generate the first mask information for determining whether to perform the process
Draw by the mask generation means of 1 and the shape of the drawing
Determine which bit of the image is to be processed
Second mask generating means for generating second mask information
And has the first and second mask information.
It is generated using a pattern ROM.

[0012]

【Example】

Embodiment 1 Next, a first embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing main blocks of the graphic processing apparatus according to the first embodiment, FIG. 3 is a diagram showing a clipping rectangle and a data transfer area, and FIG. 4 is a diagram showing conditions for generating a clipping mask. FIG. 5 is a diagram showing conditions for generating a drawing mask.

First, the clipping in the data transfer processing will be described with reference to FIG. FIG. 3 shows an example of the clipping rectangle and the data transfer area on the XY coordinate plane defined on the memory. As the clipping rectangle, a rectangle having points (X _min , Y _min ) and (X _max , Y _max ) as diagonal endpoints is defined. The data transfer area is a rectangle having points (X _s , Y _s ) and (X _e , Y _e ) as diagonal end points, and overlaps a part of the clipping rectangle with a hatched portion. Left edge of clipping rectangle is LE from word boundary
It is shifted by FT and the right end is shifted by RIGHT. The left end of the data transfer area is also deviated from the word boundary by DS and the right end is deviated from DE. In this example, the data in another rectangular area having the same shape as the data transfer area is block-transferred to the illustrated data transfer area, and the transferred data is written only in the shaded area overlapping the clipping rectangle. In this embodiment, the number of bits in one word is 16 bits, and data transfer is performed in word units.

Next, a hardware circuit for realizing the above clipping will be described with reference to FIG. In FIG. 1, 1 is a drawing mask operation circuit, 2 is a clipping comparison circuit, 3 is an XY coordinate operation circuit, 4 is a mask pattern ROM, 5 is an AND circuit, and 6 is a memory circuit.
Data arithmetic circuit, 7 is clipping mask register, 8 and 9 are multiplexers, 10 to 13 are 4
A bit parameter register, 14 is a selection control circuit,
30 to 34 are control signal lines, and 35 to 40 are data buses. Each of these functions will become apparent from the following description of operation.

First, the generation of a clipping mask will be described. The clipping mask is created by performing the following four processes.

1) The XY coordinate calculation circuit 3 calculates the XY coordinates of the first bit (word address) of the next word to be drawn (the word of the area to be transferred). The X coordinate is calculated by adding 16 to the immediately preceding X value. The Y coordinate does not change in the horizontal direction,
+1 is added to the vertical direction. The XY coordinate calculation circuit may be an addition / subtraction circuit.

2) In the clipping comparison circuit 2, the preset coordinate values (X _min , Y _min ), (X _max , Y _max ) of the clipping rectangle and the XY coordinate operation circuit 3 are transferred to the data bus 35. The following four types of calculations are performed using the output X and Y coordinate values.

A signal indicating the magnitude of each of YY _min , YY _max , XX _min , and XX _max is output to a signal line 31 according to the calculation result. Since data is transferred in word units, it is better to perform comparison in word units. Therefore, for X _min and X _max , the lower 4 bits are “00”.
00 ", (X _min , Y _min ), (X _min ,
Y _max), is defined _{(X max, Y max),} (X ma x, Y min) respectively virtually point A, B, C, D (Figure 3).

3) The selection control circuit 14 generates a selection signal for the multiplexers 8 and 9 based on the signal on the signal line 31, and outputs the selection signal to the signal lines 33 and 34, respectively.

4) The left end bit position information and the right end bit position information of the clipping mask are determined by the selection signal, and these are output to the address lines 36 and 37 to access the mask pattern ROM 4. The method of determining the bit position information will be described later. The data read from the ROM 4 is latched in the clipping mask register 7 via the data bus 38 as clipping mask data. The latch signal is supplied from the clipping comparison circuit 2 via the signal line 32 in the next cycle after the operation result of 2) is output.

The clipping mask information is information indicating a drawing permitted area and a drawing impossible area defined by the clipping rectangle. Therefore, clipping
The X _min , X _max , Y _min , and Y _{max of the} rectangle are compared with the coordinate value indicating the start address of each word in the data transfer destination area to determine whether each word in the transfer destination area is inside or outside the clipping rectangle. Checking is performed in word units, rendering permission information (“1” in this embodiment) is given only to the dots existing in the rendering permission area defined by the clipping rectangle, and rendering is performed on the dots existing in the rendering impossible area. Prohibition information (“0” in this embodiment) is given.
For example, in FIG. 3, the inside of the clipping rectangle is defined as the drawing-permitted area, and the outside is defined as the non-drawable area. Therefore, "1" is given as the mask information for the coordinate value in the clipping rectangle, and other than that. "0" is given to the coordinate value of.

Further, since the processing is performed in word units, X _min and X of the clipping rectangle
There are cases where the _max coordinate value does not match the head coordinate value of a word. The correction is necessary for this. In order to perform such a correction, the leftmost bit position information (X _min ) of the clipping rectangle is the start coordinate value (X ' _min ) of the word including it (X coordinate value determined by the straight line AB in FIG. 3) (lower 4 Numerical binary code (LEFT) that indicates how many bits are shifted from "0")
Are preset in the parameter register 11. Regarding the right end bit position information (X _max ) of the clipping rectangle, a binary code (RIGHT) of a numerical value indicating the deviation with respect to the head coordinate value (X ′ _max ) of the word including this is set in the parameter register 13 in advance. ing.

The comparison between the start coordinate value of each word in the transfer destination area created by the XY coordinate operation circuit 3 and the boundary coordinates of the clipping rectangle is performed based on the conditions shown in FIG. The comparison circuit 2 is shown in FIG. 6, and the X and Y coordinates output from the XY coordinate calculation circuit 3 which creates the head coordinates of each word in the transfer destination area are stored in the register 60. X to define clipping rectangle
_{The min} and X _max coordinates are stored in the register 61 in advance, and the Y _min and Y _max coordinates are stored in the register 62 in advance. Here, since the 1-bit coordinate is designated by 16 bits, each of the comparison circuits 64 has two 16-bit input terminals (A, B). The leading coordinates of each word in the transfer destination area are input from the register 60 to the A input terminal. On the other hand, the content of the register selected by the multiplexer 63 is input to the B input terminal. The comparison is performed first, starting from the Y coordinate without deviation. As for the Y coordinate, the Y coordinate output from the register 60 and the Y coordinate (Y
_min , _Ymax ). For the X coordinate, X
Leading X of each word created by the Y coordinate calculation circuit 3
Since the four bits of the coordinates are always "0000" (because the bit position in the word is specified by the lower four bits),
Only the upper 12 bits excluding the lower 4 bits are output from the register 61, and "0" is added to all the lower 4 bits and input to the multiplexer 63. By doing so, the comparison circuit 64 is substantially higher than the X-coordinate.
Only a 2-bit comparison needs to be done.

Now, the Y coordinate output from the register 60 is
Y output from register 62_min Coordinates and Y_maxseat
Y <Y as shown in FIG._minOr Y> Y
_maxIs cleared, all bits of the word in the transfer destination area are cleared.
Since it's outside the topping rectangle, compare X coordinates
Clipping mask information (16 bits)
All of them are non-drawable information (all “0”).

Furthermore, in the case of Y ≧ Y _min and Y ≦ Y _max , since the Y coordinate exists in the clipping rectangle, the comparison of the X coordinate is performed after the Y coordinate. The result is as follows.

(1) When X> X ′ _min and X <X ′ _max : Since all bits of the word in the transfer destination area exist in the clipping rectangle, all clipping mask information is drawn permission information (all “ 1 ").

(2) When X = X ′ _min and X <X ′ _max : Since the word in the transfer destination area includes the left end of the clipping rectangle, the word is specified by LEFT from the beginning of the word using the correction value (LEFT). The bit to be rendered becomes rendering disable information ("0"), and thereafter becomes rendering permission information ("1").

(3) When X> X ′ _min and X = X ′ _max : Since the word in the transfer destination area includes the right end of the clipping rectangle, the correction value (RIGHT) is used to perform the RIGHT from the beginning of the word. The prescribed bit is rendering permission information (“1”), and the subsequent bits are rendering disable information (“0”).

(4) When X = X ′ _min and X = X ′ _max : Since the word in the transfer destination area includes both the left end and the right end of the clipping rectangle, LE from the beginning of the word
The bit specified by FT is rendering impossible information (“0”), the bit defined by RIGHT-LEFT from the head of the word is rendering permission information (“1”), and subsequent bits are rendering impossible information (“0”). Become.

(5) X <X ′ _min or X> X ′ _max
: All bits of the word in the transfer destination area are clipped.
Since it is outside the rectangle, it is all rendering impossible information ("0").

The clipping mask information can be created as described above. However, if this is created by a random logic circuit, the hardware circuit becomes very complicated. Therefore, in this embodiment, the clipping mask information is created using a table memory. Making it easier. A mask ROM 4 (FIG. 1) is used as a table memory.

Returning to FIG. 1, the mask pattern ROM
The output (4 bits) of the multiplexer 8 is input to 4 as an upper address through the address line 36, and the output (4 bits) of the multiplexer 9 is input as a lower address through the address line 37. In this embodiment, one address consists of 8 bits, and 256 patterns (including the clipping mask information described above and the drawing mask information described later) are stored in advance. One pattern consists of 16 bits. As shown in FIG. 4, the clipping mask information is all “0” for words outside the clipping rectangle and all “1” for all words inside the clipping rectangle, so all “0” and all In this embodiment, the upper 4 bits of the address are "111" so that "1" can be accessed by a common address.
1 ”= (15), lower 4 bits are“ 0000 ”= (0)
, All “0” as clipping mask information
However, the address of the upper 4 bits is “0000” = (0),
The address is allocated so that all "1" s are read as the clipping mask information when the address of the lower 4 bits is "1111" = (15). When the word in the transfer destination area includes only the left end of the clipping rectangle (X = X ′ _min ), the upper 4 bits of the address are LEF
T, and the lower 4 bits are “1111” = (15). When only the right end is included (X = X ′ _max ), the lower 4 bits of the address are RIGHT, and the upper 4 bits are “0000” (= 0). When both the left end and the right end are included, the upper and lower addresses are set to LEFT and RI, respectively.
GHT. LEF for drawing permission information and non-permission information
Since it is determined beforehand by the number of T and RIGHT, it may be stored in the ROM 4 as a table. As a result, desired clipping mask information can be obtained for an arbitrary clipping rectangle.

Next, creation of drawing mask information will be described. The drawing mask information is used to identify whether or not each word of the data transfer destination is in the rectangular area of the data transfer destination having the coordinates (X _e , Y _e ) and (X _s , Y _s ) as the vertices of the diagonal line. This is mask information. Generation of the drawing mask information is performed by the following three processes.

1) Since the number of words in the data transfer area in the X direction is known in the drawing mask calculation circuit 1, by counting the number of transfers each time word transfer from the area proceeds in the X direction. , And detects whether the transferred word is the first word, the last word, or any other word, and outputs a detection signal to the signal line 30.

2) The selection control circuit 14 generates a selection signal for the multiplexers 8 and 9 based on the detection signal and outputs it to the signal lines 33 and 34.

3) The left end bit position information and the right end bit position information of the drawing mask are determined by the selection signal, and these are output to the address lines 33 and 34 to access the mask pattern ROM 4. The drawing mask data is read from the ROM 4 and output to the data bus 38.

In the present embodiment, the drawing mask information has (X _s , Y _e ), (X _s , Y _s ), (X _e , Y _s ) and (X _e , Y _e ) in FIG. 3 as vertices. Is calculated for the rectangular area. Since the data is transferred in word units, the drawing mask information is created in word units like the clipping mask information. Therefore, the lower 4 bits of the X coordinates X _s and X _e that define the data transfer destination area are set to “0000”,
The virtual rectangular area defined by EFGH in FIG. 3 is compared with the head coordinates of each word in the data transfer destination area. In the drawing mask information, only the first word and the last word in the horizontal direction may span the right end and the left end of the data transfer destination area, and all other words are included in the data transfer destination area. 1 only needs to detect whether the transfer destination word is the first word, the last word, or an intermediate word in each horizontal direction. As a result of the detection, in the case of the first word, the parameter register 10 in which the correction value DS is stored in advance is selected, and in the case of the last word, the parameter register 12 in which the correction value DE is stored in advance is selected. For the first word, as shown in FIG. 5, the upper 4 bits of the address are DS, and the lower 4 bits are all "1" (= 15). For the last word, the upper 4 bits of the address are all "0" (= 0) and the lower 4 bits are DE. Also, in the case of an intermediate word, all are "1", so the same address as all "1" of the clipping mask information (the upper 4 bits are all "0"
The lower 4 bits are all "1"). As a result,
The pattern read from the mask pattern ROM 4 is used as drawing mask information via an AND circuit 5 via a signal line 38.
Sent to

As described above, clipping mask information and drawing mask information are generated word by word for each word to be transferred, and the AND operation of the corresponding bits is performed in the AND circuit 5. The bit whose output becomes "1" as a result of the AND operation is the bit in the shaded area in FIG. 3, and only the bit of the transfer source data corresponding to that bit is replaced with the transfer destination data by the memory / data operation circuit. To be done. That is, in the memory / data operation circuit 6, the transfer source data and the transfer destination data input via the data bus 40 are obtained based on the final mask data applied from the AND circuit 5 via the signal line 39. And output to the data bus 40. In the present embodiment, the transfer source data is replaced with the transfer destination data at the bit position of “1” in the 16 bits of the mask data. As a result, it is possible to rewrite only the data in the hatched portions in FIG.

As described above, clipping when drawing in word units can be realized at high speed and easily.

Embodiment 2 Next, a second embodiment of the present invention will be described with reference to the drawings.

In the above description, the drawing permitted area points to the inside of the clipping rectangle, but the second embodiment specifies the outside of the clipping rectangle as the drawing permitted area.

FIG. 2 is a diagram showing the main blocks of the graphic processing apparatus of the second embodiment. 2 is almost the same as FIG. 1 except that the clipping mask register has two inputs, and the mask data of the data bus 38 is input as it is or inverted by the inversion circuit 52. A multiplexer 50 for selecting whether or not to input the signal and its selection signal 51 are added.

The operation is almost the same as in the first embodiment.
If the output of the inversion circuit 52 is used as clipping mask information by switching the drawing permission area with the selection signal 51 for mode designation, the outside of the clipping rectangle of FIG. 3 becomes the drawing permission area.

[0045]

As is apparent from the above description, high-speed writing in word units can be realized by generating mask data for clipping independently of the original drawing mask. In addition, it is easy to specify the non-drawable area and the drawing permitted area, and the inside / outside of the clipping rectangle can be set as the drawing permitted area.

In the embodiment, the data transfer function has been described as the drawing function. However, the gist of the present invention is not limited to the type of drawing. Also, for drawing in units of dots such as straight lines and circles, as shown in FIG.
Obviously, if a selecting circuit that does not correct the lower 4 bits of the clipping coordinate value is provided, the clipping can be realized by the same operation as that of the word drawing. Further, clipping mask information and drawing mask information may be generated in separate ROMs.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a second embodiment of the present invention.

FIG. 3 is a diagram showing a clipping rectangle and a data transfer area.

FIG. 4 is a diagram showing a mask information generation condition.

FIG. 5 is a diagram showing conditions for generating drawing mask information.

FIG. 6 is a block diagram of a clipping comparison circuit 2.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Drawing mask arithmetic circuit 2 Clipping comparison circuit 3 XY coordinate arithmetic circuit 4 Mask pattern ROM 5 AND circuit 6 Memory data arithmetic circuit 7 Clipping mask register 8, 9 Multiplexer 10 to 13 4-bit parameter register 14 Selection control Circuit 30-34 Control signal line 35-40 Data bus 50 Multiplexer 51 Selection signal

Claims (1)

[Claims] 1. A graphic processing apparatus for defining XY coordinates for each bit on a memory and performing drawing in units of words on the memory, wherein a coordinate calculation means for sequentially generating a word address of each word included in a portion to be drawn. And a first point indicated by (X ₁ , Y ₁ ) and a second point indicated by (X ₂ , Y ₂ ) on the XY coordinates (where X ₁ ≦ X ₂ , Y ₁ ≦ Y ₂ ) Is defined as a diagonal end point, and the word address of the word having the first point and the word address of the word having the second point are the words of the word to be drawn generated by the coordinate calculation means. Comparing means for determining whether the word to be drawn is inside or outside the rectangular area or including a boundary of the rectangular area by comparing with an address; and comparing the word to be drawn with the result of the comparison. Wah First mask generating means for generating first mask information for designating which bit in the word is to be processed, and the image to be drawn according to the position of the word to be drawn in the drawing target portion A second mask generating means for generating second mask information for specifying which bit in the word is to be processed; and both the first and second mask information in the word to be drawn. Means for performing a drawing process on bits designated by (1), wherein the first and second mask information are generated using a mask pattern ROM.