JPH0865696A - Color conversion processor, color inversion processor and video signal processor - Google Patents

Abstract

PURPOSE: To provide a color conversion processor, color inversion processor and video signal processor with which high-accuracy color conversion is provided in real time or at the speed based on it with small circuit scale and color conversion accuracy due to linear interpolation can be improved. CONSTITUTION: This device is provided with a first storage means 21 for inputting a first chrominance signal and outputting first chrominance signals at plural points positioned adjacently to an input signal, second storage means 1 for inputting the outputs of the first storage means 21 and second and third chrominance signals and outputting fourth, fifth and sixth chrominance signals at plural points positioned at unit grids adjacent to points inside a second three- dimensional color space showing the input signals, interpolation coefficient generating means 2 for generating an interpolation coefficient to calculate an interpolated signal from the fourth, fifth and sixth chrominance signals at the plural points, and interpolation processing means 11, 12, 18 and 19 for interpolating the fourth, fifth and sixth chrominance signals corresponding to the fourth, fifth and sixth chrominance signals at the plural points and the interpolation coefficient.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color conversion processing device, a color inverse conversion processing device, and a video signal processing device.

[0002]

2. Description of the Related Art FIG. 30 is a block circuit diagram showing a conventional color conversion processing apparatus and color inverse conversion processing apparatus. In the figure, 127 and 128 are three-dimensional lookup tables (hereinafter referred to as LUTs).

The operation will be described. NTSC (National Television System Commit)
tee) method, PAL (Phase Alternation by Line) method, SECA
Although there is an M (Sequential a Memoire) system, for example, a method of converting an RGB color space signal in the NTSC system into a CIE 1976 L ^* a ^* b ^* uniform perceptual color space signal will be described below. CIE1
The 976 L ^* a ^* b ^* uniform perceptual color space is defined by the International Commission on Illumination (Commis
sion Internationalede l ■ Eclairage (CIE) is 19
It is a color space recommended in 1976 that has a perceptually nearly uniform rate. First, as shown in the following equations (1), (2), and (3), the NTSC RGB signal is converted into XYZ. X = 0.6069R + 0.1739G + 0.209B …… (1) Y = 0.2991R + 0.5870G + 0.1139B …… (2) Z = 0.0000R + 0.0660G + 1.1169B …… (3)

The reference white color in the NTSC system is a C light source (chromaticity coordinate x = 0.3101, y = 0.3163: correlated color temperature of about 6770K), and the tristimulus value X ₀ Y ₀ Z ₀ of the C light source is Y ₀ as 100. Then,
Expressions (4), (5), and (6) are obtained. X ₀ = 98.072 …… (4) Y ₀ ＝ 100.000 …… (5) Z ₀ ＝ 118.225 …… (6)

L ^* a ^* b ^* with XYZ as a reference white light source as C light source
Convert to. ^{L * = 116 (Y / Y} 0) 1/3 -16: Y / Y 0> 0.008856 ...... (7) L * = 903.29 (Y / Y 0): Y / Y 0 <= 0.008856 ...... (8) ^{a * = 500 (X'-Y} ') ...... (9) b * = 200 (Y'-Z') ...... (10) X '= (X / X 0) 1/3: X / X 0> 0.008856 …… (11) X '= 7.787 (X / X ₀ ) +16/116: X / X ₀ <= 0.008856 …… (12) Y' = (Y / Y ₀ ) ^1/3 : Y / Y ₀ > 0.008856 …… (13) Y '＝ 7.787 (Y / Y ₀ ) +16/116 ： Y / Y ₀ <= 0.008856 …… (14) Z' ＝ (Z / Z ₀ ) ^1/3 ： Z / Z ₀ > 0.008856 …… (15) Z '＝ 7.787 (Z / Z ₀ ) +16/116 ： Z / Z ₀ <= 0.008856 …… (16)

From the conversion formulas (1) to (16),
The RGB color space signal in the NTSC system is converted to CIE 1976 L ^* a
^* b ^* Performs non-linear conversion into a signal in the uniform perceptual color space. Then CIE
The method of inversely converting the 1976 L ^* a ^* b ^* uniform perceptual color space into an RGB color space signal is shown below. First, as shown in the following equations (17) to (20), L ^{* using the} reference white light as the C light source ^.
Convert a ^* b ^* to XYZ. X = X ₀ {(L ^* +16) / 116 + a ^* / 500} ³ …… (17) Y = Y ₀ {(L ^* +16) / 116} ³ : L ^* > = 8.0 …… (18 ) Y = Y ₀ × L ^* /903.29: L ^* <8.0 …… (19) Z = Z ₀ {(L ^* +16) / 116-b ^* / 200} ³ …… (20)

XYZ is converted into an NTSC type RGB signal. R = 1.9106X-0.5335Y-0.2893Z (21) G = -0.9848X + 1.9983Y-0.0266Z (22) B = 0.0582X-0.1181Y + 0.8969Z (23)

L ^* , a ^* , b ^* for all R, G, B are calculated from the conversion formulas (1) to (16), and the converted values are stored in the three-dimensional LUT 127. Further, L ^* from the inverse conversion equation (17) from equation (23), a ^*, all R for b ^*,
G and B are calculated, and the converted value is stored in the three-dimensional LUT 128. FIG. 31 shows a conceptual diagram of the three-dimensional LUT 127. Three
According to the dimension LUT 127, the output signals L ^* (Ri, Gi, Bi), a ^* (Ri, Gi, Bi), b ^* (Ri, G) located at the grid points of the input signals Ri, Gi, Bi
i, Bi) is obtained. FIG. 32 shows a conceptual diagram of the three-dimensional LUT 128. By the three-dimensional LUT 128, the input signal Li ^* , ai
^*, The output signal is located at a lattice point of the ^{bi * R (Li *, ai} *, bi *), G
(Li ^* , ai ^* , bi ^* ) and B (Li ^* , ai ^* , bi ^* ) are obtained.

Three-dimensional L used for these forward and reverse transformations
The greater the number of UT grid points, the higher the conversion accuracy. The method of directly obtaining the output signals for all the input signals by the LUT is called the direct mapping method. By using the direct mapping method, it is possible to perform high-speed and high-precision conversion regardless of any complicated conversion method.

However, for example, if the input signals R, G, B and the output signals L ^* , a ^* , b ^* are each 8 bits, the capacity of the three-dimensional LUT 127 used for this normal conversion becomes 384 Mbits,
It is not practical because it requires a large-scale storage means.
In general, a method is used in which several nearby values are obtained by a direct mapping method using an upper signal of an input signal and an output signal is interpolated from several neighboring values using a lower signal of the input signal.

Another conventional technique will be described. FIG.
"ITEJ Technical Report Vol.16, No.31, pp.25-30"
FIG. 9 is a block circuit diagram showing another conventional color conversion processing device shown in FIG. In the figure, 129 is a three-dimensional LUT, 13
0 is an interpolation coefficient generation circuit, 131 to 138 are multipliers, 1
Reference numeral 39 is an adder circuit.

The upper signals Rn, Gn, Bn of the input signals Ri, Gi, Bi are set to 3
Input to the dimension LUT 129. Further, the lower order signals r, g, b of Ri, Gi, Bi are input to the interpolation coefficient generation circuit 130. The outputs d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ of the three-dimensional LUT 129 are respectively multiplied by multipliers 131, 132, 133, 134, 135, 13
6, 137 and 138. Interpolation coefficient generation circuit 13
0 outputs w ₀ , w ₁ , w ₂ , w ₃ , w ₄ , w ₅ , w ₆ , w ₇ are respectively multiplied by a multiplier 13
1,132,133,134,135,136,13
7, 138. Multipliers 131, 132, 13
The outputs of 3,134,135,136,137,138 are input to the adder circuit 139. The upper 8 bits d of the output of the adder circuit 139 are obtained. d is d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇
And w ₀ , w ₁ , w ₂ , w ₃ , w ₄ , w ₅ , w ₆ , w ₇
The lower 15 bits are truncated to normalize the interpolation coefficient to 1.

The operation will be described. Input signal Ri, Gi, Bi
Are m-bit signals, and upper n bits of the input signals Ri, Gi, Bi are Rn, Gn, Bn, respectively. However, m> n. Three
Unit cubic lattice (Rn, Gn, Bn), (Rn + Dn, Gn, Bn), (Rn + Dn, Gn, Bn + D) of eight points near the input signals Ri, Gi, Bi from the dimension LUT129
n), (Rn, Gn, Bn + Dn), (Rn, Gn + Dn, Bn), (Rn + Dn, Gn + Dn, Bn), (R
n + Dn, Gn + Dn, Bn + Dn), located at (Rn, Gn + Dn, Bn + Dn) d ₀ , d ₁ ,
Get d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ . However, Dn is a three-dimensional LUT
The length of one side of the unit cubic lattice of 129 is 2 ^mn .

Next, the interpolation method will be described. As shown in FIG. 34, the output signals located in the unit cubic lattice of eight points in the vicinity of the input signals Ri, Gi, Bi are d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d. _Set to ₇ . The lower m-n bits of the input signals Ri, Gi, Bi are respectively r,
Let g, b and the length of one side of the unit cubic lattice be Dn. Input signal R
The volume of a rectangular parallelepiped divided into eight in three directions of R-axis direction, G-axis direction, and B-axis direction around i, Gi, Bi is respectively w ₀ , w ₁ , w ₂ ,
and _{w 3, w 4, w 5} , w 6, w 7. The output signal d for the input signals Ri, Gi, Bi is interpolated as shown in Expression (24). d = d ₀ w ₀ + d ₁ w ₁ + d ₂ w ₂ + d ₃ w ₃ + d ₄ w ₄ + d ₅ w ₅ + d ₆ w ₆ + d ₇ w ₇ (24) This interpolation method Then, each of L ^* , a ^* , and b ^* is interpolated.

The same applies to the inverse transformation. FIG. 35 is a block circuit diagram showing an inverse color conversion processing device. In the figure, 141 is a three-dimensional LUT, 142 is an interpolation coefficient generation circuit, 143 to 150 are multipliers, and 151 is an addition circuit.

Upper signal Ln ^* , an ^* , b of input signals Li ^* , ai ^* , bi ^*
Input n ^* into the three-dimensional LUT 141. Also, Li ^* , ai ^* , bi
^* Lower signal l ^*, a ^*, enter the b ^* to the interpolation coefficient generation circuit 142. Output of the three-dimensional LUT 141 p ₀ , p ₁ , p ₂ , p ₃ , p ₄ , p ₅ , p
₆ and p ₇ are respectively multiplied by multipliers 143, 144, 145, 146, 1
47, 148, 149, 150. The outputs v ₀ , v ₁ , v ₂ , v ₃ , v ₄ , v ₅ , v ₆ , v ₇ of the interpolation coefficient generation circuit 142 are respectively multiplied by multipliers 143, 144, 145, 146, 147, 14
Input to 8,149,150. Multipliers 143, 14
4,145,146,147,148,149,150
Is output to the adder circuit 151. The upper 8 bits p of the output of the adder circuit 151 are obtained. p is _{p 0, p 1, p 2} , p 3, p 4, p
₅ , p ₆ , p ₇ are multiplied by v ₀ , v ₁ , v ₂ , v ₃ , v ₄ , v ₅ , v ₆ , v ₇ and added together, and the lower order 15 to normalize the interpolation coefficient to 1 The bits are truncated.

The operation will be described. Input signal Li ^* , a
It is assumed that i ^* , bi ^* are m-bit signals, and the upper n bits of the input signals Li ^* , ai ^* , bi ^* are Ln ^* , an ^* , bn ^* . However, m
> N. Input signal Li ^* , ai ^* , from the three-dimensional LUT 141
A unit cubic lattice (Ln ^* , an ^* , bn ^* ), (Ln ^* , an ^* +) with 8 points near bi ^*
Dn, bn ^* ), (Ln ^* , an ^* + Dn, bn ^* + Dn), (Ln ^* , an ^* , bn ^* + Dn), (Ln ^* +
Dn, an ^* , bn ^* ), (Ln ^* + Dn, an ^* + Dn, bn ^* ), (Ln ^* + Dn, an ^* + Dn, bn ^*
+ Dn), (Ln ^* + Dn, an ^* , bn ^* + Dn) located at p ₀ , p ₁ , p ₂ , p ₃ , p ₄ , p
_{Get 5} , p ₆ and p ₇ . However, Dn is 2 ^mn as the length of one side of the unit cubic lattice of the three-dimensional LUT 141.

Next, the interpolation method will be described. As shown in FIG. 36, the output signals located in the unit cubic lattice of eight points in the vicinity of the input signals Li ^* , ai ^* , bi ^* are p ₀ , p ₁ , p ₂ , p ₃ , p ₄ , p ₅ , p ₆ and p ₇ . The lower mn bits of the input signals Li ^* , ai ^* , and bi ^* are l ^* , a ^* , and b ^* , and the length of one side of the unit cubic lattice is Dn. Input signal Li ^* , ai ^* , bi ^* as the center, L ^* axis direction, a ^* axis direction,
The volume of a rectangular parallelepiped divided into 8 in 3 directions of b ^* axis is
_{Let 0} , v ₁ , v ₂ , v ₃ , v ₄ , v ₅ , v ₆ , v ₇ . Input signal Li ^* , ai ^* , bi ^*
The output signal p for P is interpolated as in equation (25). p = p ₀ v ₀ + p ₁ v ₁ + p ₂ v ₂ + p ₃ v ₃ + p ₄ v ₄ + p ₅ v ₅ + p ₆ v ₆ + p ₇ v ₇ (25)

[0019]

Since the conventional color conversion processing device and color inverse conversion processing device are configured as described above, it is possible to perform color conversion in real time or at a speed equivalent thereto. There was a problem.

First, if output signals for all input signals are obtained by the direct mapping method, highly accurate conversion is possible, but a large capacity LUT is required.

Second, in order to reduce the capacity of the LUT,
Using the upper signal of the input signal, several neighboring values are obtained by the direct mapping method, and by using the lower signal of the input signal,
In the method of interpolating the output signal from several neighboring values, the conversion accuracy is high in 8-point interpolation using 8-point unit cubic lattice, but many multipliers are required and the circuit scale becomes large.
Further, if the circuit scale is reduced by reducing the number of data used for interpolation such as 6-point interpolation, 5-point interpolation, and 4-point interpolation, the number of multipliers decreases but the conversion accuracy also decreases.

Further, in the conventional video signal processing apparatus, for example, in an image represented by an RGB signal, aperture correction is performed on each of R, G and B, or the RGB signal is subjected to a matrix operation to obtain a luminance signal Y and an RY color difference signal. Aperture correction is performed by converting to a BY color difference signal and controlling the gains of the brightness signal Y, the RY color difference signal, and the BY color difference signal in the high frequency portion of the brightness signal Y. However, the RGB color space is a color space of mixed colors and is not a uniform space for human visual characteristics, and has the following problems.

First, in the former method, aperture correction is performed so that the gains of R, G, and B signals are changed at a constant ratio in the high-frequency portion of the image represented by RGB signals. The color balance is lost and the color reproducibility is deteriorated.

Second, in the latter method, the luminance signals Y and R are
By performing aperture correction on the −Y color difference signal and the BY color difference signal, it is possible to enhance the brightness and saturation separately, but since the space is not a uniform perceptual color space, color reproducibility deteriorates.

The present invention has been made in order to solve the above problems, and is a color conversion processing apparatus capable of performing color conversion with higher accuracy than in the past and with a smaller circuit scale at a real time or at a speed corresponding thereto. And a color inverse conversion processing device.

Further, from the RGB color space, CIE 1976 L ^* a ^* b
^{* By} converting to a uniform perceptual color space that is uniform for human visual characteristics such as a uniform perceptual color space, and performing aperture correction on each of L ^* , a ^* , and b ^* , the balance of hue, lightness, and saturation is maintained. An object of the present invention is to obtain a video signal processing device that does not deteriorate color reproducibility.

[0027]

A color conversion processing apparatus according to claim 1 of the present invention uses a first three-dimensional color space represented by first, second and third color signals as a fourth and a fifth color space. , A color conversion processing device for converting into a second three-dimensional color space represented by a sixth color signal, the first color signal being input, and a plurality of first color signals located in the vicinity of the input signal To the unit cell near the point in the second three-dimensional color space indicating the input signal, the first storage means outputting the first storage means and the output of the first storage means and the second and third color signals are input. 4th, 5th and 6th of the multiple points located
Second storage means for outputting the color signal of, and interpolation coefficient generation means for generating an interpolation coefficient for calculating an interpolation signal from the fourth, fifth, and sixth color signals of the plurality of points; An interpolation processing unit for interpolating the fourth, fifth, and sixth color signals by the fourth, fifth, and sixth color signals and the interpolation coefficient is provided.

According to a second aspect of the present invention, there is provided a color conversion processing device in which a first three-dimensional color space represented by first, second and third color signals is converted into fourth, fifth and sixth color spaces. In a color conversion processing device for converting into a second three-dimensional color space represented by a color signal, the first color signal is input as an m-bit (m is a natural number) bit digital signal, and k is located near the input signal.
(K is a natural number) The first color signal stored at the (k + 1) th and (k + 1) th and the storage means for outputting the storage number k, and the second and third color signals and the storage number which are digital signals of m bits. k of the four points of the eight points located on the unit cubic lattice near the point in the second three-dimensional color space indicating the input signal,
Second storage means for outputting fifth and sixth color signals;
Interpolation coefficient generating means for generating an interpolation coefficient for multiplying the fourth, fifth, and sixth color signals of the point, and the m-bit second and third
Of the fourth color signal, which is located in the unit plane lattice of four points in the case where the first color signal is stored in the kth position, Means for outputting a first interpolated signal obtained by multiplication and addition, and similarly, four points in the case where the first color signal is stored in the (k + 1) th position, including m-bit second and third color signals Means for outputting a second interpolated signal obtained by multiplying the fourth, fifth, and sixth color signals located in the unit plane lattice of the above by each of the above-mentioned interpolating coefficients and adding them, and k + 1 is stored in the first interpolated signal. Multiply by subtracting the m-bit first color signal from the first color signal,
Fourth, fifth, and sixth color signals are calculated by multiplying the second interpolation signal by the m-bit first color signal minus the k-th stored first color signal and adding the result. It is provided with an interpolation processing means.

Further, in the color conversion processing apparatus according to claim 3 of the present invention, the lightness of the specific color represented by the fourth, fifth and sixth color signals after color conversion is increased by a certain amount. The first color signal is stored in the first storage means.

Further, in the color conversion processing apparatus according to claim 4 of the present invention, the lightness of the achromatic color represented by the fourth, fifth and sixth color signals after color conversion is increased by a certain amount. The first color signal is stored in the first storage means.

Further, in the color conversion processing device according to the fifth aspect of the present invention, when the first, second and third color signals are digital signals each having m bits, the lower m−n (n is a natural number m). >
n) When a unit plane having 2 ^mn bits on each side centering on the second and third color signals corresponding to bits is divided into four in the axial direction of the second color signal and the axial direction of the third color signal. The interpolation coefficient generating means for outputting the areas of the four planes as the interpolation coefficient is provided.

Further, in the color conversion processing device according to claim 6 of the present invention, when the first, second, and third color signals are green, red, and blue, the second storage means is used for upper n bits. The second and third color signals and the storage number k for n + p (p is a natural number) bits are input, and in the second three-dimensional color space indicating the m-bit first, second, and third color signals. The fourth, fifth, and sixth color signals of eight points located in the unit cubic lattice near the points are configured to be output.

According to a seventh aspect of the present invention, in the color conversion processing device, when the first, second and third color signals are the luminance signal, the first color difference signal and the second color difference signal, the second color difference signal is used. The storage means receives the second and third color signals for the upper n bits and the storage number k for the n + p bits, and outputs the m-bit first, second, and third color signals in the second three-dimensional form. It is configured to output the fourth, fifth, and sixth color signals of eight points located in the unit cubic lattice near the points in the color space.

In the color conversion processing device according to claim 8 of the present invention, the first, second and third color signals are CIE 1976 L ^* a ^* b ^*.
In the case of L ^* , a ^* , and b ^* in the uniform perceptual color space, the second storage means stores the second and third color signals of upper n bits and n + p.
The storage number k for bits is input, and the fourth of the eight points located on the unit cubic lattice near the point in the second three-dimensional color space indicating the m-bit first, second, and third color signals. , 5th and 6th color signals are output.

In the color conversion processing device according to claim 9 of the present invention, the first, second and third color signals are CIE 1976 L ^* u ^* v ^*.
In the case of L ^* , u ^* , v ^* in the uniform perceptual color space, the second storage means stores the second and third color signals for the upper n bits and n + p.
The storage number k for bits is input, and the fourth of the eight points located on the unit cubic lattice near the point in the second three-dimensional color space indicating the m-bit first, second, and third color signals. , 5th and 6th color signals are output.

According to a tenth aspect of the present invention, in the color conversion processing device, the second and third color signals for the lower m-n bits are input and four interpolation coefficients necessary for calculating the interpolation signal are input. The interpolation coefficient generating means for outputting is composed of four storage means.

According to the eleventh aspect of the present invention, in the color conversion processing device, the second and third color signals for the lower mn bits are input, and four interpolation coefficients necessary for calculating the interpolation signal are input. Of these, there is provided storage means for outputting one interpolation coefficient, and interpolation coefficient generation means for calculating the other three interpolation coefficients from the output signal of the storage means, a plurality of adders, and a plurality of bit shift circuits. .

According to a twelfth aspect of the present invention, there is provided the inverse color conversion processing device, wherein the first three-dimensional color space represented by the first, second and third color signals is the fourth, fifth and sixth colors. In a color inverse conversion processing device that inversely converts a color signal that has been non-linearly converted into a second three-dimensional color space represented by the color signal into first, second, and third color signals, the fourth color signal is input. , First storage means for outputting a plurality of fourth color signals located in the vicinity of the input signal, and outputs of the first storage means and the fifth and sixth color signals are input, Second storage means for outputting first, second, and third color signals of a plurality of points which are assumed to be or are located on a unit cell near a point in the first three-dimensional color space shown; Interpolation coefficient generating means for generating an interpolation coefficient for calculating an interpolation signal from the first, second and third color signals of the point; First, the second, the interpolation coefficients and the third color signals, first, second, those having an interpolation processing means for interpolating the third color signals.

According to a thirteenth aspect of the present invention, there is provided an inverse color conversion processing device, wherein the first three-dimensional color space represented by the first, second and third color signals is the fourth, fifth and sixth. In the color inverse conversion processing device for inversely converting the color signal non-linearly converted into the second three-dimensional color space represented by the color signal into the first, second and third color signals, the fourth color signal is converted into m bits. A first storage means for inputting as a digital signal of, the fourth color signal stored in the vicinity of the input signal (h is a natural number) and the h + 1th color signal and the storage number h, and m bits 5th and 6th color signals which are the digital signals of the above and the storage number h are input, and it is assumed that they are located on the unit cubic lattice in the vicinity of the point in the first three-dimensional color space indicating the input signals, or are located. The second storage means for outputting the first, second and third color signals of 8 points, and the 8 points An interpolation coefficient generating means for generating an interpolation coefficient for multiplying the first, second, and third color signals, and m-bit fifth and sixth color signals are included, and the fourth color signal is stored in the hth position. The same as the means for outputting the first interpolated signal obtained by multiplying the first, second, and third color signals located in the unit plane lattice of four points in the case of Includes m-bit fifth and sixth color signals, and
4 when the color signal of is stored in the h + 1th position
Means for outputting a second interpolation signal obtained by multiplying the first, second, and third color signals located on the unit plane grid of points by the interpolation coefficient and adding them together, and storing the first interpolation signal in the (h + 1) th position The fourth color signal obtained by subtracting the m-bit fourth color signal from the generated fourth color signal is multiplied, and the second interpolated signal is multiplied by the h-th stored fourth color signal from the m-bit fourth color signal. An interpolation processing unit for calculating the first, second, and third color signals by multiplying and adding the subtracted one is provided.

According to the fourteenth aspect of the present invention, in the inverse color conversion processing device, the brightness of the specific color represented by the first, second and third color signals after the inverse color conversion increases by a certain amount. Such a fourth color signal is stored in the first storage means.

Further, in the color reverse conversion processing apparatus according to claim 15 of the present invention, the brightness of the achromatic color represented by the first, second and third color signals after the color reverse conversion is increased by a certain amount. Such a fourth color signal is stored in the first storage means.

According to the sixteenth aspect of the present invention, in the color inverse conversion processing device, when the fourth, fifth, and sixth color signals are digital signals each having m bits, the fifth lower mn bits are the fifth. ,
Interpolation coefficient is the area of four planes when the unit plane having 2 ^mn bits on one side with the sixth color signal as the center is divided into four in the axial direction of the fifth color signal and the axial direction of the sixth color signal. It is provided with an interpolation coefficient generating means for outputting as.

According to a seventeenth aspect of the present invention, there is provided an inverse color conversion processing device, wherein the fifth and sixth color signals corresponding to the lower m−n bits are input and four interpolations necessary for calculation of an interpolation signal are performed. The interpolation coefficient generating means for outputting the coefficients is composed of four storage means.

According to the eighteenth aspect of the present invention, there is provided the inverse color conversion processing device according to the eighteenth aspect of the invention, in which the fifth and sixth color signals of the lower m−n bits are input and four interpolations necessary for calculation of the interpolation signal are performed. And a storage means for outputting one interpolation coefficient among the coefficients, and an interpolation coefficient generation means for calculating the other three interpolation coefficients from the output signal of the storage means, a plurality of adders, and a plurality of bit shift circuits. is there.

According to a nineteenth aspect of the present invention, there is provided an inverse color conversion processing device which stores the output first, second and third color signals for the input fourth, fifth and sixth color signals. The conversion value at the end of the storage means is smaller than the conversion value at the center of the second storage means.

The video signal processing apparatus according to claim 20 of the present invention is 3 represented by the first, second and third color signals.
Aperture correction is performed by converting the three-dimensional color space into a three-dimensional uniform perceptual color space of a color-developing system represented by a fourth color signal having lightness information, a fifth color signal having color information, and a sixth color signal. In a video signal processing device, a first storage means for receiving a first color signal as an input and outputting a plurality of first color signals located in the vicinity of the input signal, and an output of the first storage means and a second storage means. , A third color signal is input, and a second color signal indicating the input signal is input.
Second storage means for outputting the fourth, fifth, and sixth color signals of a plurality of points located in the unit lattice near the point in the three-dimensional color space, and the fourth, fifth, and fifth points of the plurality of points. An interpolation coefficient generating unit that generates an interpolation coefficient for calculating an interpolation signal from the six color signals, and fourth, fifth, and sixth color signals at the plurality of points and the interpolation coefficient. Interpolation processing means for interpolating the sixth color signal, first gain control means for controlling the gain of the high frequency component of the fourth color signal in an arbitrary pixel, and gains of the fifth and sixth color signals in the pixel. A second gain control means for controlling the second gain control means, and a second gain control means for inversely converting the gain-controlled fourth, fifth, and sixth color signals into first, second, and third color signals. The first and second storage means, the interpolation coefficient generation means, and the interpolation processing means are provided.

The video signal processing apparatus according to claim 21 of the present invention is the first gain control means for controlling the gain of the high frequency component of the fourth color signal in any pixel, and the fifth and fifth gain control means in the pixel. The second gain control means for controlling the gain of the color signal 6 is composed of a plurality of adders, a plurality of multipliers, and a plurality of 1-pixel delay circuits.

The video signal processing device according to claim 22 of the present invention is the first gain control means for controlling the gain of the high frequency component of the fourth color signal in any pixel, and the fifth and fifth gain control means in the pixel. The second gain control means for controlling the gain of the color signal 6 is constituted by a plurality of adders, a plurality of multipliers and a plurality of horizontal scanning period delay circuits.

[0049]

The first aspect of the color conversion processing device according to the first aspect of the present invention.
The storage means receives the first color signal as an input, outputs the first color signals at a plurality of points located in the vicinity of the input signal, and the second storage means outputs the first color signal and the second and A third color signal is input, and fourth, fifth, and sixth points of a plurality of points located on a unit cell near the point in the second three-dimensional color space indicating the input signal.
And the interpolation coefficient generating means generates an interpolation coefficient for calculating an interpolation signal from the fourth, fifth, and sixth color signals of the plurality of points, and the interpolation processing means causes the interpolation processing means to generate the plurality of points. Of the fourth, fifth, and sixth color signals and the interpolation coefficient
Since the fifth and sixth color signals are interpolated, highly accurate color conversion can be realized in real time or at a speed corresponding thereto, and the color conversion accuracy by linear interpolation can be improved.

Further, the first storage means of the color conversion processing device according to claim 2 of the present invention inputs the first color signal as an m (m is a natural number) bit digital signal, and outputs the signal in the vicinity of the input signal. The first color signal stored at the kth (k is a natural number) and the (k + 1) th stored position and the storage number k are output, and the second storage means outputs a second m-bit digital signal,
The fourth color, the fifth color, and the sixth color of 8 points which are input in the third color signal and the storage number k and which are located in the unit cubic lattice in the vicinity of the point in the second three-dimensional color space indicating the input signal The means for outputting a signal, the interpolation coefficient generating means for generating an interpolation coefficient for multiplying the fourth, fifth, and sixth color signals at the eight points, and the means for outputting the first interpolation signal are the m-bit first The second, fourth, and sixth color signals, which include the second and third color signals and are located in the unit plane lattice of four points when the first color signal is stored in the kth position, Similarly, the means for outputting the first interpolation signal obtained by multiplying and adding the interpolation coefficient and outputting the second interpolation signal are also m
Bit second and third color signals, where the first color signal is k
And outputs the second interpolated signal obtained by multiplying the fourth, fifth, and sixth color signals located in the unit plane lattice of four points in the case of the + 1st stored one, by multiplying each by the interpolation coefficient. ,
The interpolation processing means multiplies the first interpolation signal by subtracting the m-bit first color signal from the (k + 1) th stored first color signal to multiply the second interpolation signal by the m-bit first color. The fourth, fifth, and sixth color signals are calculated by multiplying and adding the signal obtained by subtracting the first color signal stored in the k-th signal from the signal, so that the real-time speed or a speed equivalent thereto is realized with a small circuit scale. It is possible to realize highly accurate color conversion and improve the color conversion accuracy by linear interpolation.

Further, the first storage means of the color conversion processing device according to the third aspect of the present invention is characterized in that the brightness of the specific color represented by the fourth, fifth and sixth color signals after color conversion is constant. Since the increased first color signal is stored, the color conversion error of the specific color can be reduced.

Further, the first storage means of the color conversion processing device according to claim 4 of the present invention has a certain amount of lightness of the achromatic color represented by the fourth, fifth and sixth color signals after color conversion. Since the increased first color signal is stored, it is possible to reduce the error in the lightness direction while maintaining the balance of hue, saturation, and lightness in the converted image.

Further, the interpolation coefficient generating means of the color conversion processing device according to the fifth aspect of the present invention is such that when the first, second and third color signals are m-bit digital signals, respectively, the lower m-n.
(N is a natural number and m> n) A unit plane with 2 ^mn bits on each side centering on the second and third color signals is defined by the axis of the second color signal and the axis of the third color signal. Since the area of four planes when divided into four in the direction is output as an interpolation coefficient, it is possible to perform highly accurate color conversion with a small-capacity storage means and interpolation processing means, and it is possible to reduce the circuit scale. Becomes

Further, the second storage means of the color conversion processing device according to the sixth aspect of the present invention is such that when the first, second and third color signals are green, red and blue, the upper n bits of the first color signal are stored. A point in the second three-dimensional color space indicating the m-bit first, second, and third color signals by inputting the second and third color signals and the storage number k for n + p (p is a natural number) bits. Since it is configured to output the 4th, 5th, and 6th color signals of 8 points located in the unit cubic lattice in the vicinity of, it is the most important element in terms of human visual characteristics among red, green, and blue. The conversion value for one green direction will be larger than the conversion value for another,
It is possible to improve the color conversion accuracy with respect to the capacity of the storage unit.

Further, in the second storage means of the color conversion processing device according to claim 7 of the present invention, the first, second and third color signals are luminance signals, first color difference signals and second color difference signals. In the case of, the second and third color signals for the upper n bits and the storage number k for n + p bits are input, and the second three-dimensional color indicating the m-bit first, second, and third color signals is input. Since it is configured to output 8th, 4th, 5th, and 6th color signals located in a unit cubic lattice near a point in space, only the lightness information that is important for human visual characteristics should be increased. Thus, it is possible to improve the color conversion accuracy with respect to the capacity of the storage means.

Further, in the second storage means of the color conversion processing device according to claim 8 of the present invention, the first, second and third color signals are CI.
E 1976 L ^* a ^* b ^{* In} the case of L ^* , a ^* , and b ^* in the perceptual color space, the second and third color signals for the upper n bits and the storage number k for n + p bits are input, and m Bit first, second,
Since the fourth, fifth, and sixth color signals of eight points located in the unit cubic lattice near the point in the second three-dimensional color space indicating the third color signal are output, In terms of visual characteristics,
Since only the important brightness information is increased, it is possible to improve the color conversion accuracy with respect to the capacity of the storage means.

Further, in the second storage means of the color conversion processing device according to claim 9 of the present invention, the first, second and third color signals are CI.
E 1976 L ^* u ^* v ^{* In} the case of L ^* , u ^* , and v ^* in the perceptual color space, the second and third color signals for the upper n bits and the storage number k for the n + p bits are input, and m Bit first, second,
Since the fourth, fifth, and sixth color signals of eight points located in the unit cubic lattice near the point in the second three-dimensional color space indicating the third color signal are output, In terms of visual characteristics,
Since only the important brightness information is increased, it is possible to improve the color conversion accuracy with respect to the capacity of the storage means.

Further, the interpolation coefficient generating means of the color conversion processing device according to the tenth aspect of the present invention inputs the second and third color signals for the lower mn bits and is necessary for calculating the interpolation signal. Since it is composed of four storage means for outputting four such interpolation coefficients, the number of multipliers can be reduced and the circuit scale can be reduced.

Further, the interpolation coefficient generating means of the color conversion processing device according to the eleventh aspect of the present invention inputs the second and third color signals for the lower mn bits and stores the interpolation signal by the storage means. One of the four interpolation coefficients necessary for the calculation is output, and the other three interpolation coefficients are calculated from the output signal of the storage means, the plurality of adders, and the plurality of bit shift circuits. It is possible to reduce the number and reduce the circuit scale.

Further, the first storage means of the color inverse conversion processing device according to claim 12 of the present invention receives the fourth color signal as an input,
The fourth color signal of a plurality of points located in the vicinity of the input signal is output, the second storage means inputs the output of the first storage means and the fifth and sixth color signals, and outputs the input signal. First three to show
The first, second, and third color signals of a plurality of points located on the assumption that they are located or located on a unit cell near the point in the dimensional color space are output, and the interpolation coefficient generating means outputs the first of the plurality of points. , An interpolation coefficient for calculating an interpolation signal from the second and third color signals is generated, and the interpolation processing means uses the first, second, and third color signals at the plurality of points and the interpolation coefficient to calculate the interpolation coefficient. 1, second,
Since the third color signal is interpolated, highly accurate color conversion can be realized in real time or at a speed similar thereto, and the color conversion accuracy by linear interpolation can be improved.

Further, the first storage means of the color inverse conversion processing device according to the thirteenth aspect of the present invention inputs the fourth color signal as an m-bit digital signal, and is located near the input signal h ( h is a natural number) and outputs the fourth color signal stored at the (h + 1) th and the storage number h, and the second storage means outputs the fifth and sixth color signals and the storage number which are m-bit digital signals. The first 3 indicating the input signal by inputting h
The eight, first, second, and third color signals that are or are assumed to be located in the unit cubic lattice near the point in the two-dimensional color space are output, and the interpolation coefficient generating means outputs the eight-point The means for generating the interpolation coefficient for multiplying the first, second, and third color signals and outputting the first interpolation signal includes the m-bit fifth and sixth color signals, and the fourth color signal is and outputs the first interpolated signal obtained by multiplying the first, second, and third color signals located in the unit plane lattice of four points, which are the h-th stored ones, by the interpolation coefficient and adding them. , The means for outputting the second interpolation signal also includes m-bit fifth and sixth color signals,
The first, second, and third color signals located in the unit plane grid of four points in the case where the fourth color signal is the one stored in the h + 1th position, and are multiplied by the interpolation coefficient and added. 2 interpolation signals are output, and the interpolation processing means adds h + to the first interpolation signal.
The fourth stored color signal is multiplied by a value obtained by subtracting the m-bit fourth color signal from the first stored fourth color signal, and the second interpolation signal is stored in the h-th stored fourth from the m-bit fourth color signal. Since the first, second, and third color signals are calculated by multiplying and adding the color signal obtained by subtracting, the high-precision color conversion is realized with a small circuit scale in real time or at a speed corresponding to it. It is possible to improve color conversion accuracy by linear interpolation.

Further, the first storage means of the color reverse conversion processing apparatus according to claim 14 of the present invention is the first, second, and third color-reversed conversion means.
Since the fourth color signal is stored so that the lightness of the specific color represented by the third color signal increases by a certain amount, it is possible to reduce the color conversion error of the specific color.

Further, the first storage means of the color reverse conversion processing apparatus according to claim 15 of the present invention includes the first, second, and third color-reverse-converted first storage means.
Since the fourth color signal is stored so that the lightness of the achromatic color represented by the third color signal increases by a certain amount, the lightness can be maintained in the converted image while maintaining the balance of hue, saturation, and lightness. It is possible to reduce the direction error.

Further, the interpolation coefficient generating means of the color inverse conversion processing device according to the sixteenth aspect of the present invention, when the fourth, fifth and sixth color signals are digital signals of m bits each, the lower m-th bit.
One side is 2 with the 5th and 6th color signals for n bits as the center
The unit plane of ^mn bits is set in the axial direction of the fifth color signal and the sixth direction.
Since the area of the four planes when the color signal is divided into four in the axial direction is output as an interpolation coefficient, it is possible to perform highly accurate color conversion with a small-capacity storage means and interpolation processing means, and to reduce the circuit scale. It is possible to make it smaller.

Further, the interpolation coefficient generating means of the color inverse conversion processing device according to claim 17 of the present invention inputs the fifth and sixth color signals of the lower mn bits and calculates the interpolation signal. Since it is composed of four storage means for outputting the required four interpolation coefficients, the number of multipliers can be reduced and the circuit scale can be reduced.

Further, the interpolation coefficient generating means of the color inverse conversion processing device according to the eighteenth aspect of the present invention inputs the fifth and sixth color signals for the lower m−n bits and stores the interpolation signal by the storing means. One of the four interpolation coefficients necessary for the calculation is output, and the other three interpolation coefficients are calculated from the output signal of the storage means, the plurality of adders, and the plurality of bit shift circuits. It is possible to reduce the number of and reduce the circuit scale.

Further, in the second storage means of the color inverse conversion processing device according to claim 19 of the present invention, since the conversion value at the end portion is smaller than the conversion value at the central portion, the color conversion accuracy with respect to the capacity of the storage means is improved. It is possible to improve.

The first storage means of the video signal processing device according to claim 20 of the present invention receives the first color signal as an input,
The first color signal of a plurality of points located in the vicinity of the input signal is output, the second storage means inputs the output of the first storage means and the second and third color signals, and outputs the input signal. The second 3 shown
The fourth, fifth, and sixth color signals of a plurality of points located on the unit cell near the point in the dimensional color space are output, and the interpolation coefficient generating means outputs the fourth, fifth, and sixth of the plurality of points. An interpolation coefficient for calculating an interpolation signal from the color signal, and the interpolation processing means uses the fourth, fifth, and sixth color signals at the plurality of points and the interpolation coefficient to determine the fourth, fifth, and 6 color signals are interpolated to
The gain control means controls the gain of the high frequency component of the fourth color signal in an arbitrary pixel, and the second gain control means controls the gain of the fifth and sixth color signals in the pixel. Gain control is performed by the first and second storage means, the interpolation coefficient generation means, and the interpolation processing means having the above configuration.
Since the sixth color signal is inversely converted into the first, second, and third color signals, the aperture correction that does not impair the balance of the first, second, and third color signals and does not deteriorate the color reproducibility is performed. It becomes possible.

Further, the first gain control means for controlling the gain of the high frequency component of the fourth color signal in any pixel of the video signal processing device according to claim 21 of the present invention, and the fifth and sixth gain control means in the pixel. Since the second gain control means for controlling the gain of the color signal is composed of a plurality of adders, a plurality of multipliers and a plurality of one-pixel delay circuits, it is possible to perform horizontal aperture correction.

Further, the gain control means for controlling the gain of the high frequency component of the fourth color signal in any pixel of the video signal processing device according to claim 22 of the present invention, and the fifth and sixth gain control means in the pixel. Since the second gain control means for controlling the gain of the color signal is composed of a plurality of adders, a plurality of multipliers, and a plurality of horizontal scanning period delay circuits, it is possible to perform vertical aperture correction.

[0071]

【Example】

Example 1. 1 is a block circuit diagram showing a color conversion processing device according to a first embodiment of the present invention. In the figure, 1 is a three-dimensional LUT, 2 is an interpolation coefficient generation circuit, 3 to 12 are multipliers, 13 and 14 are addition circuits, 15 to 18 are adders, 1
9 is a divider.

The input signal Gi is input to the LUT 21 and the LUT
The output k of 21 and the higher order signals Rn and Bn of the input signals Ri and Bi are input to the three-dimensional LUT 1. The outputs G _k and G _{k + 1} of the LUT 21 are input to the adder 15, Gi and G _{k + 1} are input to the adder 16, and Gi,
The G _k is input to the adder 17. In addition, the lower signals r and b of Ri and Bi
Is input to the interpolation coefficient generation circuit 2. The outputs d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ of the three-dimensional LUT ₁ are respectively multiplied by multipliers 3, 4, 5,
Input to 6,7,8,9,10. Interpolation coefficient generation circuit 2
The outputs S ₀ , S ₁ , S ₂ , and S ₃ of are input to the multipliers 3, 4, 5, 6 and 7, 8, 9, and 10, respectively. The outputs of the multipliers 3, 4, 5, 6 are input to the adder circuit 13, and the multipliers 7, 8, 9, 10 are input.
Is output to the adder circuit 14. The output of the adder 16 and the output ds of the adder circuit 13 are input to the multiplier 11, and the output of the adder 17 and the output ds 1 of the adder circuit 14 are input to the multiplier 12
To enter. The outputs of the two multipliers 11 and 12 are input to the adder 18. The output of the adder 15 and the output of the adder 18 are input to the divider 19 to obtain the upper 8 bits d of the output.

The operation will be described. Input signal Ri, Gi, Bi
Are each 8 bits. The input signal Gi is input to the LUT 21. FIG. 2 shows a conceptual diagram of the LUT 21. LUT21
For example, when the input signal Gi is 100, the storage number k is 5,
Output G _k as 79 and G _{k + 1} as 123. The same applies to other cases, but G _{k + 1} is output as 256 only when Gi is 181 or more.

Each of R, G, and B is an 8-bit signal,
Table 1 shows L ^* , a ^* , and b ^* (using the C light source as a reference white color) corresponding to these signals when the R, G, and B signals have the same white color. Fix a ^* and b ^* when R, G and B are 128 (50% white), and set L ^* only to 0.0, 12.5, 25.0, 37.5, 50.0, 6
Table 2 shows R, G, and B when changed to 2.5, 75.0, 87.5, and 100.0, respectively. Table 3 shows R, G, B in Table 2 normalized to 8 bits. However, when L ^* is 0, R, G, and B are set to 0.

[0075]

[Table 1]

[0076]

[Table 2]

[0077]

[Table 3]

In FIG. 1, the storage number k and the input signal R
The upper 3 bits Rn and Bn of i and Bi respectively are input to the three-dimensional LUT 1, and the unit cubic lattice (Rn, Rn, Bn of 8 points near the input signals Ri, Gi and Bi is input.
k, Bn), (Rn + Dn, k, Bn), (Rn + Dn, k, Bn + Dn), (Rn, k, Bn + Dn), (R
n, k + D _k , Bn), (Rn + Dn, k + D _k , Bn), (Rn + Dn, k + D _k , Bn + Dn), (Rn,
k + D _k , Bn + Dn) output signals d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ ,
get d ₇ . Dn is 2 ⁵ which is the length of one side in the R-axis and B-axis directions of the unit cubic lattice of the three-dimensional LUT 1. D _k is LUT21
Output G _{k + 1} and G _k , which is the length of one side of the unit cubic lattice in the G-axis direction. Also, the lower 5 of each of the input signals Ri, Bi
Bits r and b are input to the interpolation coefficient generating circuit 2 to obtain interpolation coefficients S ₀ , S ₁ , S ₂ and S ₃ as shown in FIG. FIG. 3 shows an upper surface (a unit plane consisting of d ₄ , d ₅ , d ₆ , d ₇ points) and a lower surface (a unit plane consisting of d ₀ , d ₁ , d ₂ , d ₃ points) of a unit cubic lattice of the three-dimensional LUT ₁ . ) And the position of the input signal Gi on the G axis. S ₀ , S ₁ , S ₂ , and S ₃ are unit planes each having ²⁵ bits on one side with respect to the R-axis direction and B, centered on the point located at the lower 5 bits r and b of the input signals Ri and Bi. 4 when divided into 4 in the axial direction
It is an interpolation coefficient corresponding to a plane. S ₀ ＝ (Dn-r) × (Dn-b) …… (26) S ₁ ＝ r × (Dn-b) …… (27) S ₂ ＝ r × b …… (28) S ₃ ＝ (Dn -r) × b …… (29)

FIG. 4 is a diagram showing the structure of the interpolation coefficient generating circuit 2. In the figure, 22 and 23 are bit inversion circuits, 2
4 to 27 are multipliers. Since Dn is the length of one side of the unit cubic lattice, when the upper 3 bits of the 8 bits of the input signal are input to the three-dimensional LUT 1, Dn = ²⁵ . Therefore, Dn-r is the inversion of all bits of r.
Similarly, Dn-b is the inversion of all bits of b. Using the above, the bit inversion circuits 22 and 23 and the multipliers 24, 25, 26, and 27 are used to obtain the equation (26),
The operations of (27), (28) and (29) can be realized.

The first interpolation signal ds is calculated using the multipliers 3, 4, 5, 6 and the adder circuit 13 shown in FIG. Also,
Using the multipliers 7, 8, 9, 10 and the adder circuit 14, the second
Interpolation signal ds ■ is calculated. The calculation formula is the formula (3
It is represented by 0) and (31). ds ＝ d ₀ S ₀ + d ₁ S ₁ + d ₂ S ₂ + d ₃ S ₃ …… (30) ds ■ ＝ d ₄ S ₀ + d ₅ S ₁ + d ₆ S ₂ + d ₇ S ₃ …… (31) In equations (30) and (31), the signals at the respective grid points are multiplied by the areas located symmetrically about the input signals Ri and Bi as the interpolation coefficients, so that two interpolations on the RB plane are performed. The signal is being calculated. Three-dimensional interpolation is realized by further interpolating the two interpolation signals ds, ds (2) on the G axis. When the length of one side of the unit cubic lattice in the G-axis direction is D _k , the output signal d is calculated as in equation (32). d = {ds ■ × g + ds × (D k -g)} / (Dn 2 × D k) ...... (32) However, g is the difference G _k and the input signal Gi, calculated by the adder 17 Then, D _k is calculated by the adder 15. (Dn ²
The division by × D _k ) is to normalize the interpolation coefficient to 1. Since the Dn ² is 2 ^10, actually 1
It can be calculated by decrementing by 0 bits. Expression (3
The calculation of 2) is performed by multiplying the multipliers 11 and 12 and the adders 15, 16 and 1
7, 18 and the divider 19. D _k -g and the first interpolation signal ds are input to the multiplier 11, and g and the second interpolation signal ds 2 are input to the multiplier 12. The output signals of the multipliers 11 and 12 are input to the adder 18, and the divider 19 divides the output of the adder 18 by D _k . The higher 8 bits d of the output of the divider 19 are obtained. d is d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ multiplied by each interpolation coefficient and added, and further, the lower 18 bits in order to normalize the interpolation coefficient to 1. It is a cut-off of minutes. Interpolation processing of L ^* , a ^* , and b ^* is performed by the same calculation method.

The reason why the color conversion accuracy is improved by configuring the LUT 21 as described above will be described. CI from RGB color space
E 1976 L ^* a ^* b ^* conversion to a uniform perceptual color space is a non-linear conversion, and a color conversion error increases with a combination of a small capacity three-dimensional LUT and linear interpolation. Therefore, linear interpolation is performed using a three-dimensional LUT so that the output values L ^* are evenly spaced. However, if the output values L ^* are arranged at equal intervals in all three axes of RGB, a divider is required three times in order to normalize the interpolation coefficient. The increase of the divider increases the circuit scale. Also, R, G, in the B signal, the most since the image quality influence is G signal, the linear interpolation using a three-dimensional LUT as only the output value G axis L ^* becomes equal intervals By doing so, the color conversion accuracy can be improved.

Example 2. FIG. 5 is a block circuit diagram showing a color conversion processing device according to a second embodiment of the present invention. In the figure, the same parts as those in FIG.

The operation will be described. Input signal Ri, Gi, Bi
Are each 8 bits. The input signal Gi is input to the LUT 21. The configuration of the LUT 21 is different from that of FIG. 1, and its conceptual diagram is shown in FIG. This embodiment uses the CIE 1976 color space from the RGB color space.
As a method of converting to the L ^* a ^* b ^* uniform perceptual color space, linear interpolation is performed using a three-dimensional LUT in which the output values L ^* are evenly spaced only in the G-axis direction. L
The LUT 21 is required to use the UT. LU
T21 is a storage number when the input signal Gi is 100, for example.
Output _k as 11 and G _k as 99 and G _{k + 1} as 123. The same is true for other cases, but G _{k + 1} only when Gi is 216 or more.
■ Output as 256.

Each of R, G, and B is an 8-bit signal,
When the R, G, and B signals are of the same white color, L ^* , a ^* , b ^* (the C light source is the reference white color) corresponding to these signals are as shown in Table 1. Fix a ^* and b ^* when R, G and B are 128, and set L ^* only to 0.00,6.25,12.50,18.75,25.00,31.25,3
7.50,43.75,50.00,56.25,62.50,68.75,75.00,81.25,87.
When changed to 50, 93.75, 100.00, R, G and B are as shown in Table 4. These are normalized to 8 bits as shown in Table 5. However, when L ^* is 0, R, G, and B are set to 0.

[0085]

[Table 4]

[0086]

[Table 5]

In FIG. 5, the storage number k and the input signal R
The upper 3 bits Rn and Bn of i and Bi respectively are input to the three-dimensional LUT 1, and the unit cubic lattice (Rn, Rn, Bn of 8 points near the input signals Ri, Gi and Bi is input.
k ■, Bn), (Rn + Dn, k ■, Bn), (Rn + Dn, k ■, Bn + Dn), (Rn, k ■, B
n + Dn), (Rn, k ■ + _Dk ■, Bn), (Rn + Dn, k ■ + _Dk ■, Bn), (Rn + Dn,
k ■ + D _k ■, Bn + Dn), (Rn, k ■ + D _k ■, Bn + Dn) output signals d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d _{Get 6} and d ₇ . Dn is a three-dimensional LU
The length of one side in the R-axis and B-axis directions of the unit cubic lattice of T1
²⁵ . D _{k 2} is the difference between the outputs G _{k + 1} and G _k of the LUT 21, and is the length of one side of the unit cubic lattice in the G axis direction.
Further, the lower 5 bits r, b of each of the input signals Ri, Bi are input to the interpolation coefficient generation circuit 2, and the interpolation coefficients S ₀ , S as shown in FIG.
_{Get 1} , S ₂ , S ₃ . As shown by the equations (30) and (31) of the first embodiment, d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ and S ₀ , S ₁ , S ₂ , S ₃
Then, the first interpolation signal ds and the second interpolation signal ds? These two interpolated signals ds, ds ■ are as shown in equation (33),
Further, by interpolating on the G axis, three-dimensional interpolation is realized. d = {ds ■ × g + ds × (D k ■ -g)} / (Dn 2 × D k ■) ...... (33) However, g is the difference in G _k ■ an input signal Gi, (Dn ² × D _k ■)
The reason for dividing by is to normalize the interpolation coefficient to 1. Further, Dn ² is to become a 2 ¹⁰ can be calculated by actually be lowered 10 bits of digits.

In the NTSC system, the red, green, and blue primary color signals obtained from an image input device such as a video camera are not directly transmitted, but the primary color signals are converted into a luminance signal and a color difference signal, and the color difference signal is converted into a luminance signal. The signal is multiplexed and transmitted. Since the bandwidth of the color difference signal has the property that the color cannot be discriminated in the area where the human eye is small, the bandwidth is narrower than that of the luminance signal and the amount of information to be transmitted is compressed. In this way, it is general to transmit the video information in the form of being separated into the lightness information and the narrow band color difference information and compress the information amount.

In the NTSC system, assuming that the red signal is R, the green signal is G, and the blue signal is B, the luminance signal Y is expressed by equation (34). Y = 0.30G + 0.59G + 0.11B (34) As is clear from the equation (34), the luminance signal Y contains the most green components, and is the most important component among the primary color signals.

In this embodiment, as shown in FIG.
The shape of the unit cubic lattice of the three-dimensional LUT1 is not a cube but a rectangular parallelepiped having an uneven length in the G-axis direction. As in this embodiment, among red, green, and blue, by increasing the conversion value in the green direction, which is the most important factor in human visual characteristics, the color conversion accuracy with respect to the capacity of the three-dimensional LUT is improved. Is possible.

Example 3. FIG. 9 is a block circuit diagram showing a color conversion processing device according to a third embodiment of the present invention. In the figure, the same parts as those in FIG.

The operation will be described. Input signal Yi, Ri-Y
Each of i and Bi-Yi is 8 bits. Input signal Yi is LUT2
Enter 1. The configuration of the LUT 21 is different from that of FIG. 1, and its conceptual diagram is shown in FIG. In this embodiment, the luminance signals Y and R
-As a method of converting from the three-dimensional color space represented by the Y color difference signal and the BY color difference signal to the CIE 1976 L ^* a ^* b ^* uniform perceptual color space, the output values L ^* are arranged at equal intervals only in the Y axis direction. Na 3
Linear interpolation is performed using a three-dimensional LUT, and the LUT 21 is required to use such a three-dimensional LUT. For example, when the input signal Yi is 100, the LUT 21 outputs the storage number k 1 as 11, Y _{k 2} as 99, and Y _{k + 1 2} as 123. The same applies to other cases, but Y _{k + 1 (2)} is output as 256 only when Yi is 216 or more.

In FIG. 9, the storage number k ■ and the input signal R
Three-dimensional LUT for Rn and Bn of upper 3 bits of i-Yi and Bi-Yi respectively
Input to 1 and input unit Yi, Ri-Yi, Bi-Yi neighborhood 8 point unit cubic lattice (Rn, k ■, Bn), (Rn + Dn, k ■, Bn), (Rn + Dn, k ■, Bn +
Dn), (Rn, k ■, Bn + Dn), (Rn, k ■ + D _k ■, Bn), (Rn + Dn, k ■ + D _k
■, Bn), (Rn + Dn, k ■ + D _k ■, Bn + Dn), (Rn, k ■ + D _k ■, Bn + Dn)
Obtaining an output signal _{d 0, d 1, d 2} , d 3, d 4, d 5, d 6, d 7 located.
Dn is the R-Y axis and B- of the unit cubic lattice of the three-dimensional LUT1
The length of one side in the Y-axis direction is ²⁵ . D _k 'is the difference between the outputs Y _{k + 1} ' and Y _k 'of the LUT 21, and is the length of one side of the unit cubic lattice in the Y-axis direction. The lower 5 bits r, b of each of the input signals Ri-Yi, Bi-Yi are input to the interpolation coefficient generation circuit 2,
Interpolation coefficients S ₀ , S ₁ , S ₂ , S ₃ as shown in FIG. 11 are obtained. As shown in the equations (30) and (31) of the first embodiment, d ₀ , d ₁ ,
_{d 2, d 3, d 4} , d 5, d 6, d 7 and _{S 0, S 1, S 2} , it is from S ₃ calculated ■ first interpolated signal ds and a second interpolation signal ds. These two interpolation signals ds,
Three-dimensional interpolation is realized by further interpolating ds ■ on the Y axis as shown in equation (35). d = {ds ■ × y + ds × ( _Dk ■ -y)} / (Dn ² × _Dk ■) (35) where y is the difference between _Yk ■ and the input signal Yi, and (Dn ² × D _k ■)
The reason for dividing by is to normalize the interpolation coefficient to 1. Further, Dn ² is to become a 2 ¹⁰ can be calculated by actually be lowered 10 bits of digits.

In the NTSC system, the red, green, and blue primary color signals obtained from an image input device such as a video camera are not directly transmitted, but the primary color signals are converted into a luminance signal and a color difference signal, and the color difference signal is converted into a luminance signal. The signal is multiplexed and transmitted. This is to allow a monochrome TV to receive a color TV signal. The bandwidth of the color difference signal is
Since the human eye has the property that it is not possible to discriminate colors in a small area, the bandwidth is narrower than that of the luminance signal and the amount of information to be transmitted is compressed. In this way, it is general to transmit the video information in the form of being separated into the lightness information and the color difference information and compress the information amount. The present invention
It is used when converting a three-dimensional color space represented by two kinds of color difference signals different from such a brightness signal into another three-dimensional color space.

In the present embodiment, as shown in FIG. 12, the unit cubic lattice of the three-dimensional LUT1 is not a cube but a rectangular parallelepiped whose lengths in the Y-axis direction are not uniform. As described above, among the luminance signal, the R-Y color difference signal, and the B-Y color difference signal, by increasing the conversion value in the lightness direction, which is an important factor in human visual characteristics, the color with respect to the capacity of the three-dimensional LUT is increased. It is possible to improve the conversion accuracy.

Example 4. The configuration of the color conversion processing device according to the fourth embodiment of the present invention is the same as that of FIG. 1, but the signal processing in the interpolation coefficient generation circuit 2 is different.

The operation will be described. Input signal Ri, Gi, Bi
Are each 8 bits. The input signal Gi is input to the LUT 21 to obtain k, G _k and G _{k + 1} . The storage number k and the upper 3 bits Rn, Bn of the input signals Ri, Bi are input to the three-dimensional LUT 1,
Unit cubic lattice (Rn, k, Bn) of 8 points near the input signals Ri, Gi, Bi,
(Rn + Dn, k, Bn), (Rn + Dn, k, Bn + Dn), (Rn, k, Bn + Dn), (Rn, k +
D _k , Bn), (Rn + Dn, k + D _k , Bn), (Rn + Dn, k + D _k , Bn + Dn), (Rn, k +
D _k , Bn + Dn) output signal d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d
_{Get 7} . The lower 5 bits of the input signals Ri and Bi are r,
b is input to the interpolation coefficient generation circuit 2 to obtain the interpolation coefficients S ₀ , S ₁ , S ₂ and S ₃ as shown in FIG.

FIG. 13 is a diagram showing the structure of the interpolation coefficient generating circuit 2 in this embodiment. Reference numerals 28, 29, 30, and 31 are multiplication circuits, and 32 and 33 are bit inversion circuits.
The multiplication circuits 28, 29, 30, 31 are for the inputs r, b,
S ₀ , S shown in equations (26), (27), (28), and (29)
Output ₁ , S ₂ , S ₃ . Input r and b are both 5 bits, output S ₀ ,
Since S ₁ , S ₂ , and S ₃ are 10 bits, the multiplication circuits 28 and 2
If 9, 30, and 31 are configured by LUT, the total capacity becomes 40 kbits. With this capacity, the circuit scale is smaller when four multipliers are used. Therefore, the LUT is reduced by dividing the input signal into an upper signal and a lower signal and multiplying them. As shown in the equations (36) and (37), when the inputs r and b are divided into the upper signals r _H and b _H and the lower signals r _L and b _L , S ₂ is given by the equation (3
8). r = r _H × 2 ^K + r _L …… (36) b ＝ b _H × 2 ^K + b _L …… (37) S ₂ ＝ r × b ＝ r _H b _H × 2 2 ^K + (r _H b _L + r _L b _H ) × 2 ^K + r _L b _L (38) Since r and b are 5-bit signals, K is 3 and
r, b is divided into upper 2 bits and lower 3 bits. As a result, 16 LUTs with 3 bits input and 6 bits output are required, but the capacity can be reduced to 6 kbits. Formula (38)
As is apparent from the above, twelve adders are required in total, but the circuit scale is smaller than when four multipliers are used.

FIG. 14 is a multiplication circuit 3 for realizing the equation (38).
It is a figure which shows the structure of 0. In the figure, 34 to 37 are L for outputting a multiplication result of 6 bits for input 3 bits.
UTs 38, 39, 40 are adders, 41 is a 6-bit shift circuit, and 42 is a 3-bit shift circuit. LUT3
By 4,35,36,37, calculates _{r H b H, r L b} H, r H b L, the r _L b _L. The adder 38 calculates r _L b _H + r _H b _L to obtain 6
And up 6 bits digits of r _H b _H the bit shift circuit 41, 3-bit shift circuit 42 to raise _{r L b H + r H b} 3 bits digits of _L by, these signal summer 39, 40 is added to calculate S ₂ . Multiplier circuits 28, 29, 31
Can be configured with a similar circuit configuration.

In FIG. 1, the output of the interpolation coefficient generation circuit 2
S ₀ , S ₁ , S ₂ and S ₃ are input to the multipliers 3, 4, 5 and 6 and the multipliers 7, 8, 9 and 10, respectively, and the outputs of these multipliers are added to the adder circuit 13 and the adder circuit 13, respectively. It is input to 14 to calculate the first interpolation signal ds and the second interpolation signal ds. Three-dimensional interpolation is performed by interpolating the two interpolation signals on the G axis as shown in Expression (32), and the output signal d is obtained. Interpolation processing of L ^* , a ^* , and b ^* is performed by the same calculation method.

Example 5. The configuration of the color conversion processing device according to the fifth embodiment of the present invention is the same as that of FIG. 1, but the signal processing in the interpolation coefficient generation circuit 2 is different.

The operation will be described. Input signal Ri, Gi, Bi
Are each 8 bits. The input signal Gi is input to the LUT 21 to obtain k, G _k and G _{k + 1} . Storage number k and input signals Ri, Bi
The upper 3 bits of each of Rn, Bn are input to the three-dimensional LUT ₁ , and the output signals d ₀ , d ₁ , d ₂ , d ₃ , d located at the unit cubic lattice of 8 points near the input signals Ri, Gi, Bi _{Get 4} , d ₅ , d ₆ , d ₇ . Also,
The lower 5 bits r, b of each of the input signals Ri, Bi are input to the interpolation coefficient generation circuit 2, and the interpolation coefficients S ₀ , S ₁ , S ₂ , S as shown in FIG.
_{Get three} . Only the interpolation coefficient S ₂ calculated by the equation (28) is obtained from the multiplication circuit 30, and the other interpolation coefficients S ₀ , S ₁ , S ₃ are calculated by the equation (3
9), (40), it is calculated by using the S ₂ as shown in (41). Since Dn is ²⁵ , equations (39), (40), (4
1) can be realized by a combination of an adder and a bit shift circuit. S ₀ ＝ (Dn-r) × (Dn-b) ＝ Dn ^2- (r + b) × Dn + S ₂ …… (39) S ₁ ＝ r × (Dn-b) ＝ r × Dn-S ₂ …… (40) S ₃ = (Dn-r) × b ＝ b × Dn-S ₂ …… (41)

FIG. 15 is a diagram showing the structure of the interpolation coefficient generating circuit 2 in this embodiment. In the figure, 43, 44,
Reference numeral 45 is a 5-bit shift circuit, and 46 to 50 are adders. The interpolation circuit S ₂ is calculated by the multiplication circuit 30. r is 5
It is input to the bit shift circuit 43 to obtain an output r × 2 ^5, and an adder 46 subtracts S ₂ from r × 2 ⁵ to obtain an interpolation coefficient S ₁ . Similarly, the 5-bit shift circuit 44 and the adder 47 obtain the interpolation coefficient S ₃ . Also, the sum of r and b added by the adder 50 is input to the 5-bit shift circuit 45, and (r + b) ×
2 ⁵ is obtained, 2 ¹⁰ and S ₂ are added by the adder 48, and the adder 4
By (9), (r + b) × ²⁵ is subtracted from the output of the adder 48 to obtain the interpolation coefficient S ₀ . Compared to the case where four multipliers are used, the interpolation coefficient generation circuit 2 can be realized by the LUT having a total capacity of 1.5 kbits and eight adders by the above-described calculation method, and the circuit scale can be reduced. It will be possible.

In FIG. 1, the output of the interpolation coefficient generation circuit 2
S ₀ , S ₁ , S ₂ and S ₃ are input to the multipliers 3, 4, 5 and 6 and the multipliers 7, 8, 9 and 10, respectively, and the outputs of these multipliers are added to the adder circuit 13 and the adder circuit 13, respectively. It is input to 14 to calculate the first interpolation signal ds and the second interpolation signal ds. Three-dimensional interpolation is performed by interpolating the two interpolation signals on the G axis as shown in Expression (32), and the output signal d is obtained. Interpolation processing of L ^* , a ^* , and b ^* is performed by the same calculation method.

Example 6. 16 is a block circuit diagram showing an inverse color conversion processing device according to a sixth embodiment of the present invention. In the figure, 51 is a three-dimensional L obtained by expanding the conversion value to 10 bits.
UT, 52 is an interpolation coefficient generation circuit, 53 to 62 are multipliers, 63 and 64 are addition circuits, 65 to 68 are adders, 6
Reference numeral 9 is a divider, and 71 is an LUT.

The input signal Li ^* is input to the LUT 71 and L
Output h of UT71 and higher order signal a of input signals ai ^* , bi ^*
Input n ^* and bn ^* to the three-dimensional LUT 51. LUT7 above
The output L _h ^* , L _{h + 1} ^* of ₁ is input to the adder 65, and Li ^* , L _{h + 1} ^*
Is input to the adder 66, and Li ^* and L _h ^* are input to the adder 67. Further, the lower-order signals a ^* and b ^* of ai ^* and bi ^* are input to the interpolation coefficient generation circuit 52. Outputs of the three-dimensional LUT 51 p ₀ , p ₁ , p ₂ , p ₃ ,
p ₄ , p ₅ , p ₆ , p ₇ are respectively multiplied by multipliers 53, 54, 55, 56, 5
Input to 7,58,59,60. Interpolation coefficient generation circuit 5
2 outputs T ₀ , T ₁ , T ₂ , T ₃ are respectively multiplied by multipliers 53, 54, 55,
56 and 57, 58, 59, 60. Multiplier 5
The outputs of 3, 54, 55 and 56 are input to the adding circuit 63,
The outputs of the multipliers 57, 58, 59, 60 are input to the adder circuit 64. Output of adder 66 and output pt of adder circuit 63
Is input to the multiplier 61, and the output of the adder 67 and the output pt of the adder circuit 64 are input to the multiplier 62. The outputs of the two multipliers 61 and 62 are input to the adder 68. The output of the adder 65 and the output of the adder 68 are input to the divider 69 to obtain the upper 8 bits p of the output.

The operation will be described. Input signal Li ^* , ai ^* ,
Each bi ^* is 8 bits. The input signal Li ^* is set to LUT71
To enter. FIG. 17 shows a conceptual diagram of the LUT 71. LU
T71 is a storage number when the input signal Li ^* is 200, for example.
Output h as 4, L _h ^* as 195, and L _{h + 1} ^* as 213. The same applies to other cases, but L _{h + 1} ^{* is set} to 2 only when Li ^* is 243 or more.
Output as 56.

Each of R, G, and B is an 8-bit signal,
When the R, G, and B signals are of the same white color, L ^* , a ^* , b ^* (the C light source is the reference white color) corresponding to these signals are as shown in Table 1. This L ^* is normalized to 8 bits as shown in Table 6.

[0109]

[Table 6]

In FIG. 16, the storage number h and the input signal a
The three-dimensional LUT5 of the upper 3 bits of each of i ^* and bi ^* an ^* and bn ^*
Input to 1 and input unit signals Li ^* , ai ^* , bi ^{* in} the vicinity of eight unit cubic lattices (h, an ^* , bn ^* ), (h, an ^* + Dn, bn ^* ), (h, an ^* + Dn, bn ^* + D
n), (h, an ^* , bn ^* + Dn), (h + D _h , an ^* , bn ^* ), (h + D _h , an ^* + Dn, b
n ^* ), (h + D _h , an ^* + Dn, bn ^* + Dn), (h + D _h , an ^* , bn ^* + Dn) output signals p ₀ , p ₁ , p ₂ , p _{Get 3} , p ₄ , p ₅ , p ₆ , p ₇ . Dn is 3
1 in the a ^* and b ^* axis directions of the unit cubic lattice of the three-dimensional LUT 51
The side length is ²⁵ . D _h is the output of the LUT 71 L _{h + 1} ^* and L _h
It is the difference of ^* , and is the length of one side of the unit cubic lattice in the L ^* axis direction. In addition, the lower 5 bits of each of the input signals ai ^* and bi ^* are r,
b is input to the interpolation coefficient generation circuit 52, and interpolation coefficients T ₀ , T ₁ , T ₂ , T ₃ as shown in FIG. 18 are obtained. FIG. 18 shows a three-dimensional LU
Upper surface (unit plane consisting of p ₄ , p ₅ , p ₆ , p ₇ points) and lower surface (unit plane consisting of p ₀ , p ₁ , p ₂ , p ₃ points) of the unit cubic lattice of T51
And the position of the input signal Li ^{* on} the L ^* axis. T ₀ , T ₁ , T ₂ , T ₃ are unit planes each having ²⁵ bits on one side with a point located at a ^* , b ^* for the lower 5 bits of the input signals ai ^* , bi ^* as a center. Interpolation coefficient corresponding to 4 planes when divided into 4 in the ^* axis direction and b ^* axis direction. T ₀ = (Dn-a ^* ) × (Dn-b ^* ) …… (42) T ₁ ＝ a ^* × (Dn-b ^* ) …… (43) T ₂ ＝ a ^* × b ^* …… (44 ) T ₃ = (Dn-a ^* ) × b ^* …… (45)

FIG. 19 is a diagram showing the structure of the interpolation coefficient generating circuit 52. In the figure, 72 and 73 are bit inversion circuits, and 74 to 77 are multipliers. Since Dn is the length of one side of the unit cubic lattice, the upper 3 of the 8 bits of the input signal
When inputting bits for the three-dimensional LUT 51, Dn = ²⁵ . Therefore, Dn-a ^* is the inversion of all bits of a ^* . Similarly, Dn-b ^* is also the inversion of all bits of b ^* . Using the above, the bit inversion circuit 7
2, 73 and the multipliers 74, 75, 76 and 77 can realize the operations of the expressions (42), (43), (44) and (45).

Multipliers 53, 54, 55 in FIG.
56 and the addition circuit 63 are used to calculate the first interpolation signal pt. Also, the multipliers 57, 58, 59, 60 and the adder circuit 6
4 is used to calculate the second interpolation signal pt. The respective calculation formulas are represented by formulas (46) and (47). pt ＝ p ₀ T ₀ + p ₁ T ₁ + p ₂ T ₂ + p ₃ T ₃ …… (46) pt ■ ＝ p ₄ T ₀ + p ₅ T ₁ + p ₆ T ₂ + p ₇ T ₃ …… (47) In the equations (46) and (47), the signals at the respective lattice points are multiplied by the areas located point-symmetrically with respect to the input signals ai ^* and bi ^* as interpolation coefficients to obtain a ^* and b. ^* Two interpolation signals on the plane are calculated. By interpolating these two interpolation signals pt, pt ■ with the L ^* axis, 3
Realize dimensional interpolation. When the length of one side of the unit cubic lattice is D _h , the output signal p is calculated as in equation (48). p = {pt ■ × l ^* + pt × (D _h -l ^* )} / (Dn ² × D _h ) …… (48)

However, l ^* is the difference between L _h ^* and the input signal Li ^* , which is calculated by the adder 67, and D _h is calculated by the adder 65. The division by (Dn ² × D _h ) is for normalizing the interpolation coefficient to 1. Here, Dn ² is to become a 2 ¹⁰ can be calculated by actually be lowered 10 bits of digits. The calculation of Expression (48) is realized by the multipliers 61 and 62, the adders 65, 66, 67 and 68, and the divider 69. D _h -l
^{The *} and the first interpolation signal pt are input to the multiplier 61, and the l ^* and the second interpolation signal pt ^* are input to the multiplier 62. Multiplier 6
The output signals of 1, 62 are input to the adder 68, and the divider 69
The output of the adder 68 is divided by D _h . This divider 6
The upper 8 bits p of the output of 9 are obtained. p is _{p 0, p 1, p 2} , p 3,
It is obtained by multiplying p ₄ , p ₅ , p ₆ , p ₇ by an interpolation coefficient and adding them together, and further, discarding the lower 18 bits in order to normalize the interpolation coefficient to 1. By the same calculation method, R,
G and B interpolation processing is performed.

The inverse conversion requires that the CIE 1976 L ^* a ^* b ^* uniform perceptual color space that has been positively converted is returned to the original RGB color space, and a three-dimensional LUT for inverse conversion that completely includes the original RGB color space. Need. Therefore, the three-dimensional LUT for inverse transformation includes negative R, G, B (imaginary color that does not actually exist) and R, G, B exceeding the maximum value. When the number of grid points of the three-dimensional LUT for the input value is sufficiently large, the color conversion accuracy is greatly affected by any value converted to a color that does not exist in the original RGB color space. Because there is no
Negative R, G, B is rounded to 0, and R, G, B exceeding the maximum value are rounded to the maximum value. However, when the number of grid points of the three-dimensional LUT for the input value is small and simple linear interpolation is performed, rounding the conversion value to a color that does not exist in the original RGB color space to 0 or the maximum value increases the color conversion accuracy. Influence.

For example, consider the case where 8-bit L ^* , a ^* , b ^* is inversely converted into 8-bit R, G, B. 33 There is little deterioration of color conversion accuracy if the inverse conversion is performed by using 3D LUT that has ³ grid points and the conversion value of each grid point is rounded to 8 bits with 0 and 255 (maximum value) and linear interpolation. , 5 In case of ³ grid points, the color conversion accuracy deteriorates significantly. Such deterioration of the color conversion accuracy occurs when several conversion values used for interpolation include points existing in the original RGB color space and points not existing in the original RGB color space. This is because the linear interpolation is performed using the converted value rounded with a value of 0 to 255, and this is because an error occurs between the originally obtained value and the interpolated value. When the number of lattice points of the three-dimensional LUT is sufficiently large, such an error is unlikely to occur, and the error itself is small, so that there are few problems. However, if the number of grid points is reduced in order to reduce the circuit scale, an error is more likely to occur and the error itself becomes large, which is a problem.

In the present invention, negative R, G, B (imaginary color that does not actually exist) or R, G, B exceeding the maximum value is stored as a conversion value in the three-dimensional LUT, and linear interpolation is performed. To improve color conversion accuracy. For example, by expanding the conversion value to 10 bits and storing the values from -512 to +511 in the three-dimensional LUT, it is possible to improve the color conversion accuracy.

Example 7. The configuration of the color inverse conversion processing device according to the seventh embodiment of the present invention is the same as that of FIG. 16, but the signal processing in the interpolation coefficient generation circuit 52 is different.

The operation will be described. Input signal Li ^* , ai ^* ,
Each bi ^* is 8 bits. The input signal Li ^* is set to LUT71
To get h, L _h ^* , L _{h + 1} ^* . The storage number h and the upper 3 bits of each of the input signals ai ^* and bi ^* , an ^* and bn ^*, are stored in a three-dimensional LU.
Input to T51, the input signal Li ^*, ai ^*, the unit cubic lattice near eight points ^{bi * (h, an *,} bn *), (h, an * + Dn, bn *), (h, an * + Dn, bn ^*
+ Dn), (h, an ^* , bn ^* + Dn), (h + D _h , an ^* , bn ^* ), (h + D _h , an ^* + Dn, bn
^* ), (h + D _h , an ^* + Dn, bn ^* + Dn), (h + D _h , an ^* , bn ^* + Dn) output signal p ₀ , p ₁ , p ₂ , p ₃ , p ₄ , p ₅ , p ₆ , p ₇ are obtained. The input signal ai ^*, bi each lower 5 bits a ^* of ^*, enter the b ^* to the interpolation coefficient generation circuit 52, the interpolation coefficients as shown in FIG. 18
Obtain T ₀ , T ₁ , T ₂ and T ₃ .

FIG. 20 is a diagram showing the structure of the interpolation coefficient generating circuit 52 in this embodiment. 78, 79, 80, 81
Is a multiplication circuit, and 82 and 83 are bit inversion circuits. The multiplying circuits 78, 79, 80, 81 apply T ₀ , T ₁ , T ₂ , T ₃ shown in equations (42), (43), (44), (45) to the inputs a ^* , b ^* . Output. Since the inputs a ^* and b ^* are both 5 bits and the outputs T ₀ , T ₁ , T ₂ and T ₃ are 10 bits, if the multiplication circuits 78, 79, 80 and 81 are configured by LUTs, the total capacity is 40 kbits. Become. With this capacity, the circuit scale is smaller when four multipliers are used. Therefore, the LUT is reduced by dividing the input signal into an upper signal and a lower signal and multiplying them. Input as shown in equations (49) and (50)
a ^*, b ^* upper signal a _H ^*, b _H ^* and the lower signal a _L ^*, when divided into a b _L ^*, T ₂ is expressed by equation (51). ^{_{a * = a H * × 2}} K + a L * ...... (49) b * = b H * × 2 K + b L * ...... (50) T 2 = a * × b * = a H * b H ^* × 2 ^2K + (a _H ^* b _L ^* + a _L ^* b _H ^* ) × 2 ^K + a _L ^* b _L ^* ... (51) Since a ^* and b ^* are 5-bit signals respectively, When K is 3, a ^* and b ^* are divided into upper 2 bits and lower 3 bits.
As a result, the LUT of 3 bits for input and 6 bits for output is 16
Although the number is required, the capacity can be reduced to 6k bits. As is clear from the equation (51), twelve adders are required in total, but the circuit scale is smaller than when four multipliers are used.

FIG. 21 is a multiplication circuit 8 for realizing the equation (51).
0 configuration. In the figure, reference numerals 84 to 87 denote LUTs for outputting 6-bit multiplication results for input 3-bits, 8
8, 89 and 90 are adders, 91 is a 6-bit shift circuit,
Reference numeral 92 is a 3-bit shift circuit. LUT 84, 85,
From 86 and 87, a _H ^* b _H ^* , a _L ^* b _H ^* , a _H ^* b _L ^* , a _L ^* b _L ^* is calculated. The adder 88 calculates a _L ^* b _H ^* + a _H ^* b _L ^* ,
The 6-bit shift circuit 91 carries a carry of a _H ^* b _H ^* by 6 bits, and the 3-bit shift circuit 92 carries a _L ^* b _H ^* + a _H ^* b _L ^*.
Carry by 3 bits and add these signals to the adder 89,
90 is added to calculate T ₂ . Multiplier circuits 78, 7
9, 81 can be configured with the same circuit configuration.

In FIG. 16, the outputs T ₀ , T ₁ , T ₂ and T ₃ of the interpolation coefficient generating circuit 52 are respectively multiplied by multipliers 53, 54 and 5.
5, 56 and multipliers 57, 58, 59, 60,
The outputs of these multipliers are added to adders 63 and 64, respectively.
To calculate the first interpolation signal pt and the second interpolation signal pt. Three-dimensional interpolation is performed by interpolating the two interpolation signals on the L ^* axis as shown in equation (48), and the output signal p is obtained. Interpolation processing for each of R, G, and B is performed by the same calculation method.

Example 8. The configuration of the inverse color conversion processing apparatus according to the eighth embodiment of the present invention is the same as that of FIG. 16, but the signal processing in the interpolation coefficient generation circuit 52 is different.

The operation will be described. Input signal Li ^* , ai ^* ,
Each bi ^* is 8 bits. The input signal Li ^* is set to LUT71
To get h, L _h ^* , L _{h + 1} ^* . The storage number h and the upper 3 bits of each of the input signals ai ^* and bi ^* , an ^* and bn ^*, are stored in a three-dimensional LU.
Input to T51, the input signal Li ^*, ai ^*, the output signal is located in the unit cubic lattice near eight points _{^{bi * p 0, p 1,}} p 2, p 3, p 4, p 5, p 6, p
_{Get 7} . Further, the lower 5 bits a ^* and b ^* of the input signals ai ^* and bi ^* are input to the interpolation coefficient generation circuit 52, and the interpolation coefficients T ₀ , T ₁ , T ₂ and T ₃ as shown in FIG. obtain. Only the interpolation coefficient T ₂ calculated by the equation (44) is obtained from the multiplication circuit 80, and the other interpolation coefficients T ₀ , T ₁ , T ₃ are given by T as shown in equations (52), (53) and (54). Calculate using ₂ . Since Dn is ²⁵ , equations (52), (53), and (54) can be realized by a combination of an adder and a bit shift circuit. T ₀ = (Dn-a ^* ) × (Dn-b ^* ) = Dn ^2- (a ^* + b ^* ) × Dn + T ₂ (52) T ₁ = a ^* × (Dn-b ^* ) = a ^* × Dn-T ₂ …… (53) T ₃ ＝ (Dn-a ^* ) × b ^* ＝ b ^* × Dn-T ₂ …… (54)

FIG. 22 is a diagram showing the structure of the interpolation coefficient generating circuit 52 in this embodiment. In the figure, 93, 9
Reference numerals 4 and 95 are 5-bit shift circuits, and reference numerals 96 to 100 are adders. The interpolation circuit T ₂ is calculated by the multiplication circuit 80.
Enter the a ^* in the 5-bit shift circuit 93, give the output a ^* × 2 ^5, interpolated from a ^* × 2 ⁵ by the adder 96 subtracts the T ₂ coefficients T ₁
To get Similarly, the 5-bit shift circuit 94 and the adder 97 obtain the interpolation coefficient T ₃ . Further, the addition of a ^* and b ^* by the adder 100 is input to the 5-bit shift circuit 95,
(a ^* + b ^* ) × 2 ⁵ is obtained, 2 ¹⁰ and T ₂ are added by the adder 98,
From the output of the adder 98 by the adder 99, (a ^* + b ^* )
The interpolation coefficient T ₀ is obtained by subtracting × ²⁵ . Compared to the case where four multipliers are used, the interpolation coefficient generation circuit 52 can be realized by a LUT having a total capacity of 1.5 kbits and eight adders by the above-described calculation method, and the circuit scale can be reduced. It will be possible.

In FIG. 16, the outputs T ₀ , T ₁ , T ₂ and T ₃ of the interpolation coefficient generating circuit 52 are multiplied by multipliers 53, 54 and 5, respectively.
5, 56 and multipliers 57, 58, 59, 60,
The outputs of these multipliers are added to adders 63 and 64, respectively.
To calculate the first interpolation signal pt and the second interpolation signal pt. Three-dimensional interpolation is performed by interpolating the two interpolation signals on the L ^* axis as shown in equation (48), and the output signal p is obtained. Interpolation processing for each of R, G, and B is performed by the same calculation method.

Example 9. 23 is a block circuit diagram showing a color inverse conversion processing device according to a ninth embodiment of the present invention. 16, those parts which are the same as those corresponding parts in FIG. 16 are designated by the same reference numerals, and a description thereof will be omitted. 101 is an L ^* axis LUT, 102 is an a ^* axis LU
T and 103 are b ^* axis LUTs, and the configuration of the three-dimensional LUT 51 is different from that of FIG.

The operation will be described. Input signal Li ^* , ai ^* ,
Each bi ^* is 8 bits. The input signal Li ^* is set to LUT71
To enter. A conceptual diagram of the LUT 71 is shown in FIG. LU
For example, when the input signal Li ^* is 200, T71 outputs the storage number h * as 8, the _Lh ^** as 195, and the Lh _{+ 1} ^** as 204. The same applies to other cases, but only when Li ^* is 250 or more, L _{h + 1} ^* ₂ is output as 256.

Each of R, G, and B is an 8-bit signal,
When the R, G, and B signals are of the same white color, L ^* , a ^* , b ^* (the C light source is the reference white color) corresponding to these signals are as shown in Table 1. This L ^* is normalized to 8 bits as shown in Table 7.

[0129]

[Table 7]

The input signal Li ^* is input to the LUT 71, and the LU
Obtain the output h ■ of T71. Storage number h ■, input signal ai ^* , b
i ^* is L ^* axis LUT 101, a ^* axis LUT 102, b ^*
It is input to the axis LUT 103 and outputs h ^* , ai ^** , bi ^** are obtained. This output signal h ■, ai ^* ■, bi ^* ■ is converted into a three-dimensional LUT51.
To enter. The output of the LUT 71, L _h ^* , L _{h + 1} ^*, is input to the adder 65, and Li ^* , L _{h + 1} ^* is input to the adder 66.
i ^* , L _h ^{* 1} are input to the adder 67. Further, the lower-order signals a ^* and b ^* of ai ^* and bi ^* are input to the interpolation coefficient generation circuit 52. The outputs p ₀ , p ₁ , p ₂ , p ₃ , p ₄ , p ₅ , p ₆ , p ₇ of the three-dimensional LUT 51 are respectively multiplied by multipliers 53, 54, 55, 56, 57, 58, 59, ₆₀ .
To enter. Outputs of interpolation coefficient generation circuit 52 T ₀ , T ₁ , T ₂ , T ₃
To multipliers 53, 54, 55, 56 and 57, 58, respectively.
Input 59 and 60. Multipliers 53, 54, 55, 56
Input to the adder circuit 63, and the multipliers 57, 58, 5
The outputs of 9, 60 are input to the adder circuit 64. Adder 66
And the output pt of the adder circuit 63 are input to the multiplier 61, and the output of the adder 67 and the output pt of the adder circuit 64 are input to the multiplier 62. The outputs of the two multipliers 61 and 62 are input to the adder 68. The output of the adder 65 and the output of the adder 68 are input to the divider 69 to obtain the upper 8 bits p of the output.

The inverse conversion requires that the CIE 1976 L ^* a ^* b ^* uniform perceptual color space that has been positively converted is returned to the original RGB color space, and a three-dimensional LUT for inverse conversion that completely includes the original RGB color space. Need. Therefore, negative R, G, B (imaginary colors that do not actually exist) are included in the conversion values of this three-dimensional LUT for inverse conversion.
Or R, G, B exceeding the maximum value are included.

For example, consider a three-dimensional LUT in which the maximum value to the minimum value of each of L ^* , a ^* , and b ^* for the original RGB color space of the NTSC system is input. The number of grid points from the minimum value to the maximum value on the a ^* axis and b ^* axis is equally divided into 33, and the number of grid points from the minimum value to the maximum value on the L ^* axis is 33 so that the output values are even. The total number of grid points in the three-dimensional LUT is 35937 when divided into, but the number of grid points that return to the original NTSC RGB color space is 10
237 points. The remaining 25700 points are points at which negative R, G, B or R, G, B exceeding the maximum value are output.

The conversion value of a portion that does not exist in the original NTSC RGB color space is not directly used,
If the number of grid points of the three-dimensional LUT for the input value is sufficiently large, the possibility of being used for interpolation becomes very low. Therefore, it can be said that the color conversion accuracy is not significantly lowered even if only the number of grid points in the portion including negative R, G, B and R, G, B exceeding the maximum value is reduced. Many colors that do not exist in the original RGB color space of the NTSC system exist in the areas where L ^* , a ^* , and b ^* are close to the maximum value or the minimum value, respectively. By calculating the output value by interpolation, it is possible to improve the color conversion accuracy with respect to the capacity of the three-dimensional LUT.

In FIG. 23, the input signals h ■, ai ^* , bi ^* are input to the L ^* axis LUT 101, the a ^* axis LUT 102, and the b ^* axis LUT 103, respectively. The LUT 101 for the L ^* axis has an input signal h (outputs 0, 1, 2, 3, and 4 for each 0,2,4,5,6,7,8,9,10,11,12,14 input. 4,5,6,7,8,9,10,11) to h ■ 3
Input to the dimension LUT 51. The input signals of the a ^* -axis LUT 102 and the b ^* -axis LUT 103 are between 0 and 63 and
If the input signal is between 192 and 255, the input signal is output in units of 32. If the input signal is between 64 and 191, the input signal is output in the order of 16 when the input signal is divided. That is, the input signal ai
^* , bi ^* (input is 0,32,64,80,96,112,128,144,160,176,19
The output is set to 0,1,2,3,4,5,6,7,8,9,10,11 for every 2,224) and is input to the three-dimensional LUT 51 as ai ^** , bi ^** . Thus, the number of grid points at the end of the three-dimensional LUT 51 is made smaller than that at the center.

From CIE 1976 L ^* a ^* b ^* uniform perceptual color space to the original
Three-dimensional LUT51 for inverse conversion to NTSC RGB color space
FIG. 25 shows a conceptual diagram of. Three-dimensional L in FIG. 25
One side of the unit cubic lattice in the center of the a ^* , b ^* plane of UT51 is
2 ⁴ , one side of the unit cubic lattice at the end is 2 ⁵ , and the converted value at the center is large and the converted value at the end is small. The same applies to the L ^* axis, where the conversion value at the center is large and the conversion value at the end is small. The other signal processing is the same as in the sixth embodiment, and the generation of the interpolation coefficient and the interpolation processing are performed using Li ^* , ai.
^This is performed using the lower order signals l ^* , a ^* , b ^* of ^* , bi ^* . By using such a three-dimensional LUT for inverse conversion, it is possible to improve the color conversion accuracy with respect to the storage capacity.

Example 10. 26 shows a tenth embodiment of the present invention.
3 is a block circuit diagram showing a video signal processing device according to the invention.
In the figure, 104 is a color conversion processing device, 105 is an aperture correction circuit, and 106 is a color inverse conversion processing device.

The input signals Ri, Gi, Bi are converted into the color conversion processing device 104.
And output signals Li ^* , ai ^* , bi ^* are obtained. Li ^* , ai ^* , bi ^*
Is input to the aperture correction circuit 105 to obtain aperture-corrected outputs Li ^* , ai ^* , and bi ^* . Li ^* ■, ai ^* ■, bi ^* ■
Is input to the color inverse conversion processing device 106 to obtain aperture-corrected Ri, Gi, and Bi.

The structure of the color conversion processing device 104 is the same as that shown in FIG. 1, and the description thereof will be omitted. Aperture correction circuit 1 uses Li ^* , ai ^* , bi ^* obtained by color conversion processing device 104.
Aperture corrected Li ^* ■, ai ^* ■, bi ^* ■
To get FIG. 27 shows a block circuit diagram of the aperture correction circuit 105. In the figure, 107 to 110 are 1-pixel delay circuits (DLY), 111 to 115 are 1 horizontal scanning period delay circuits (1 HDLY), 116 to 118 are multipliers, and 119 to 126 are adders.

The operation of the aperture correction circuit 105 will be described. Input signal Li of horizontal h-th pixel and vertical v-th pixel
^* (h, v), ai ^* (h, v), bi ^* (h, v) is the aperture correction circuit 105
It has been entered in. The input signal Li ^* (h, v) is input to the 1-pixel delay circuit 107 and the adder 119. The 1-pixel delay circuit 107 obtains the signal Li ^* (h-1, v) one pixel before,
Li ^* (h-1, v) is input to the 1-pixel delay circuit 108 and the adder 120. The one-pixel delay circuit 108 obtains the signal Li ^* (h-2, v) two pixels before, and inputs this Li ^* (h-2, v) to the adder 119. The lower 1 bit of the output Li ^* (h, v) + Li ^* (h-2, v) of the adder 119 is truncated and input to the adder 120. As a result, the output of the adder 120 is as shown in equation (55). Li ^* (h-1, v)-{Li ^* (h, v) + Li ^* (h-2, v)} / 2 (55) The gain control signal C _H is input to the multiplier 116 and its The output signal is input to the delay circuit 113 for one horizontal scanning period, and the expression (5
A horizontal aperture control signal AP _H as shown in 6) is obtained.
FIG. 28 shows a waveform diagram of the horizontal aperture control signal AP _H. AP _H = C _H × [Li ^* (h-1, v-1)-{Li ^* (h, v-1) + Li ^* (h-2, v-1)} / 2] …… (56)

Further, the output signal Li of the 1-pixel delay circuit 107
^* (h-1, v) is 1 horizontal scanning period delay circuit 111 and adder 1
Enter in 21. The signal Li ^* (h-1, v-1) one horizontal scanning period before is obtained by the one horizontal scanning period delay circuit 111, and this signal Li ^* (h-
1, v-1) is input to the delay circuit 112 for one horizontal scanning period. 1
The horizontal scanning period delay circuit 112 obtains the signal Li ^* (h-1, v-2) two horizontal scanning periods before, and this Li ^* (h-1, v-2) is added to the adder 1
Enter in 21. Output of adder 121 Li ^* (h-1, v) + Li ^* (h
The lower 1 bit of (-1, v-2) is truncated and input to the adder 122. As a result, the output of the adder 122 becomes as shown in equation (57). Li ^* (h-1, v-1)-{Li ^* (h-1, v) + Li ^* (h-1, v-2)} / 2 (57) The gain control signal C _V is multiplied by Input to 117, formula (58)
A vertical aperture control signal AP _V as shown in is obtained. A waveform diagram of the vertical aperture control signal AP _V is shown in FIG. AP _v = C _v × [Li ^* (h-1, v-1)-{Li ^* (h-1, v) + Li ^* (h-1, v-2)} / 2] (58)

The horizontal aperture control signal AP _H and the vertical aperture control signal AP _V are input to the adder 123, and the equation (5
An aperture control signal AP as shown in 9) is obtained. AP = AP _H + AP _v (59) The output Li ^* (h-1, v-1) of the 1 horizontal scanning period delay circuit 111 and the aperture control signal AP are input to the adder 124, and equation (6
0) aperture correction signal as shown in Li ^* ■ obtaining (h-1, v-1 ). Li ^* ■ (h-1, v-1) ＝ Li ^* (h-1, v-1) + AP …… (60)

Aperture control signal AP and gain control signal C
_{The S} is input to the multiplier 118 to obtain the aperture control signal AP _S. The aperture control signal AP _S is added to the adders 125 and 126.
To enter.

The input signal ai ^* (h, v) is input to the delay circuit 114 for one horizontal scanning period. The signal ai ^* (h, v-1) one horizontal scanning period before is obtained by the one horizontal scanning period delay circuit 114, and this ai ^* (h, v-1) is obtained.
^* (h, v-1) is input to the 1-pixel delay circuit 109. The one-pixel delay circuit 109 obtains the signal ai ^* (h-1, v-1) one pixel before, and inputs the ai ^* (h-1, v-1) to the adder 125, and the aperture correction signal ai ^* ■ Get (h-1, v-1). ai ^* ■ (h-1, v-1) ＝ ai ^* (h-1, v-1) + AP _S …… (61)

The input signal bi ^* (h, v) is input to the delay circuit 115 for one horizontal scanning period. The signal bi ^* (h, v-1) one horizontal scanning period before is obtained by the one horizontal scanning period delay circuit 115, and this bi
^* (h, v-1) is input to the 1-pixel delay circuit 110. The 1-pixel delay circuit 110 obtains the signal bi ^* (h-1, v-1) one pixel before, and inputs bi ^* (h-1, v-1) to the adder 126, and the aperture correction signal bi ^* ■ Get (h-1, v-1). bi ^* ■ (h-1, v-1) ＝ bi ^* (h-1, v-1) + AP _s (62)

The structure of the color inverse conversion processing device 106 is the same as that shown in FIG. 16, and the description thereof will be omitted. Conventionally, RG
The image represented by the B signal is subjected to aperture correction for each of R, G, and B, or the RGB signal is converted into a luminance signal Y, an RY color difference signal, and a BY color difference signal by matrix calculation, and the luminance signal Y Luminance signals Y, R- in the high frequency part
Aperture correction was performed by controlling the gains of the Y color difference signal and the BY color difference signal. The RGB color space is a color space of mixed colors and is not a uniform space for human visual characteristics. Therefore, like the former case, when the aperture correction that changes the gains of the R, G, and B signals at a constant ratio is performed in the high-frequency portion of the image represented by the RGB signals, the balance of hue, lightness, and saturation is lost, Color reproducibility deteriorates. Further, like the latter, by performing aperture correction on the luminance signal Y, the RY color difference signal, and the BY color difference signal, it is possible to emphasize the brightness and the saturation separately, but in the uniform perceptual color space. Therefore, the color reproducibility is deteriorated. As in the present embodiment, CIE that is uniform from the RGB color space to human visual characteristics
1976 Converting to L ^* a ^* b ^* uniform perceptual color space and performing aperture correction on each of L ^* , a ^* , and b ^* makes it possible to emphasize the high-frequency part of the image by dividing into brightness and saturation. Moreover, the balance of hue, lightness, and saturation is not disturbed, and the color reproducibility is not deteriorated.

In the first embodiment, when the input signal is an m-bit red signal, a green signal, and a blue signal, a unit of 2 ^mn bits on one side centering on the red signal and the blue signal of the lower m−n bits. The area of the four planes obtained by dividing the plane into four in the axial direction of the red signal and the axial direction of the blue signal was used as the interpolation coefficient. However, in consideration of the conversion characteristics of the color space before conversion and the color space after conversion, other It may be an interpolation coefficient.

In the third embodiment, from the three-dimensional color space represented by the luminance signal Y, the RY color difference signal, and the BY color difference signal,
The method to convert to CIE 1976 L ^* a ^* b ^* uniform perceptual color space was shown, but CIE 1976 L ^* a ^* b ^* uniform perceptual color space and CIE 1976 L ^* u ^*
v ^* 3 which separates color information from lightness information such as uniform perceptual color space
It can also be applied to a method of converting from a three-dimensional color space to another three-dimensional color space.

In the above-mentioned sixth embodiment, the input signal of m bits is used.
In the case of Li ^* signal, ai ^* signal, and bi ^* signal, lower mn
Bits of a ^* signal, around the b ^* signals, one side of the unit plane 2 ^mn bits, interpolation area of 4 planes in the case of 4 divided in the axial direction of the axial and b ^* signal of a ^* signal Although the coefficient is used, another interpolation coefficient in consideration of conversion characteristics of the color space before conversion and the color space after conversion may be used.

In the tenth embodiment described above, the CI is calculated from the RGB color space.
E 1976 L ^* a ^* b ^* Converted to uniform perceptual color space, performed aperture correction, and inversely converted to RGB color space. CIE 1976 L ^* u ^* v ^* Aperture corrected in uniform perceptual color space. Alternatively, the aperture may be corrected in another color space having the same hue, lightness, and saturation.

Storage means and LUT in the above embodiment
Is a ROM (Read Only Memory), RAM (Random Acc
It may be configured by a semiconductor element such as an ess memory) or other high-speed storage means. Further, in the above embodiment, the conversion method from the RGB color space to the CIE 1976L ^* a ^* b ^* uniform perceptual color space, the CIE 1976 L ^* a ^* b ^* uniform perceptual color space to the RGB
Although the inverse conversion method to the color space has been shown, conversion to another color space may be used.

In the above embodiment, the three-dimensional LUT constructed so that the converted value in the achromatic color direction represented by the converted three-dimensional color space is linear has been described. The same applies to the three-dimensional LUT configured such that the conversion value in the specific color direction is linear.

[0152]

According to the present invention, the video information is converted from the color space depending on one image input / output device to the color space depending on the other image input / output device, and the following effects can be obtained.

According to the color conversion processing apparatus of the first aspect of the present invention, it is possible to realize highly accurate color conversion at real time or at a speed corresponding thereto and to improve color conversion accuracy by linear interpolation.

Further, according to the color conversion processing apparatus of the second aspect of the present invention, highly accurate color conversion is realized with a small circuit scale in real time or at a speed corresponding thereto, and color conversion accuracy by linear interpolation is improved. It becomes possible. For example, the number of grid points is 729, the conversion value is 8 bits, the three-dimensional LUT for forward conversion and the three-dimensional LUT for reverse conversion in which the reference light source of the CIE 1976 L ^* a ^* b ^* uniform perceptual color space is the C light source. An image simulation was performed using. The image used for evaluation is ITE Co
This is an image of a lor Matching Chart (a girl with carnation) captured on a workstation using a video camera. For the evaluation, after the positive conversion from RGB to L ^* a ^* b ^* , L ^*
The color difference between the original image and the processed image that was inversely converted from a ^* b ^* to RGB was used. Note that the color difference is not in the RGB color space, but in CIE 1976.
Calculated in L ^* a ^* b ^* uniform perceptual color space. The color difference of 8-point interpolation which is the conventional method is 1.24, the color difference of 6-point interpolation is 1.34, the color difference of 5-point interpolation is 2.23, the color difference of 4-point interpolation is 1.33, and the color difference without interpolation processing is 27.43. According to the present invention, the color difference is
It became 1.21, and the color conversion accuracy was the best. Further, if it is considered that the image that has been subjected to the normal conversion is subjected to the inverse conversion and returned to the original color space as one transmission, the color difference of the 8-point interpolation is 10 transmissions.
9.94, 6-point interpolation color difference is 10.63, 5-point interpolation color difference is 10.4
The color difference of 8- and 4-point interpolation was 7.76. According to the present invention, the color difference was 10.66, the color difference with respect to the original image was the largest, and the numerically lowest result was obtained. However, in the processed image subjected to image simulation by a method other than the present invention, the gradation becomes discontinuous, and false contour occurs in the low frequency part of the image. Since the present invention employs the combination of the three-dimensional LUT and the linear interpolation that makes the output value linear, the occurrence of such false contour is suppressed. Furthermore, the RG as shown in FIG.
Simulations were performed by both the 8-point interpolation and the method according to the present invention (the above conditions) using a ramp function in which B is the same and gradation changes continuously. 38 shows the output value of the processed image when the transmission is repeated 10 times using the 8-point interpolation method, and FIG. 39 shows the output value of the processed image when the transmission is repeated 10 times using the present invention. . As is clear from these results, it can be said that the processed image of the present invention maintains gradation continuity. In general, it can be said that an image in which the occurrence of false contours is significantly smaller is a better image than an image having a slightly better color difference, and the present invention is a color conversion method superior to the conventional method.

Further, according to the color conversion processing device of the third aspect of the present invention, since the three-dimensional LUT configured so that the conversion value in the specific color direction is linear is used, the color conversion accuracy of the specific color is improved. It becomes possible. For example, when converting the RGB color space to another color space, the storage capacity is increased by using a three-dimensional LUT configured such that the conversion value in the green direction, which is the most important factor in human visual characteristics, is linear. It is possible to improve the color conversion accuracy with respect to.

Further, according to the color conversion processing device of the fourth aspect of the present invention, since the three-dimensional LUT configured so that the conversion value in the achromatic color direction is linear is used, the hue in the converted image is It is possible to reduce the error in the lightness direction while maintaining the balance of lightness and saturation. For example, in the case of a monochrome image, coloring due to a color conversion error is reduced.

Further, according to the color conversion processing apparatus of the fifth aspect of the present invention, since the color conversion is performed by the small-capacity storage means and the interpolation processing means, the storage means, for example, as an 8-bit digital signal, is used. In the case of inputting the upper 3 bits of the input signal and performing the interpolation processing with the lower 5 bits of the input signal, it is possible to reduce the number of multipliers required from 72 in the conventional interpolation method to 30 to 30. It is possible to reduce the size.

Further, according to the color conversion processing device of the sixth aspect of the present invention, when converting the RGB color space to another color space, the red, green and blue are the most important in terms of human visual characteristics. The conversion value in the green direction, which is a different element, is made larger than the other conversion values, and the color conversion accuracy with respect to the capacity of the storage unit can be improved.

According to the seventh aspect of the color conversion processing apparatus of the present invention, when a color space represented by two color difference signals different from the luminance signal is converted into another color space, human visual characteristics are Since only the important brightness information is increased, it is possible to improve the color conversion accuracy with respect to the capacity of the storage means.

According to the color conversion processing device of the eighth aspect of the present invention, when converting the CIE 1976 L ^* a ^* b ^* uniform perceptual color space to another color space, it is important for human visual characteristics. Therefore, it is possible to improve the color conversion accuracy with respect to the capacity of the storage means by increasing only the brightness information.

According to the color conversion processing device of claim 9 of the present invention, when the CIE 1976 L ^* u ^* v ^* uniform perceptual color space is converted to another color space, it is important for human visual characteristics. Therefore, it is possible to improve the color conversion accuracy with respect to the capacity of the storage means by increasing only the brightness information.

According to the color conversion processing apparatus of the tenth aspect of the present invention, for example, multiplication of a 5-bit signal can be realized by four 384-bit LUTs, two bit shift circuits and three adders, and interpolation is performed. Total capacity of 4 multipliers required for signal generation
6k bit LUT, 8 bit shift circuits and 1 adder
Since it can be realized by two pieces, the circuit scale can be reduced.

Further, according to the color conversion processing device of the eleventh aspect of the present invention, the interpolation coefficient generation circuit 2 can be realized by a plurality of LUTs, a plurality of bit shift circuits and a plurality of adders, and the interpolation coefficient generation circuit 2 Since the LUT having a total capacity of 1.5 k bits, 5 bit shift circuits and 8 adders can be realized, the circuit scale can be reduced.

According to the color inverse conversion processing device of the twelfth aspect of the present invention, the three-dimensional color space represented by the first, second and third color signals is divided into the fourth, fifth and sixth color spaces. The original first color signal that is non-linearly converted into the three-dimensional color space represented by the color signal,
By storing the conversion value outside the original three-dimensional color space in the second storage means, which is a constituent element of the color inverse conversion processing device for inverse conversion into the second and third color signals, color conversion accuracy by linear interpolation It becomes possible to raise.

According to the color inverse conversion processing device of the thirteenth aspect of the present invention, the three-dimensional color space represented by the first, second and third color signals is divided into the fourth, fifth and sixth color spaces. The original first color signal that is non-linearly converted into the three-dimensional color space represented by the color signal,
By storing the conversion value outside the original three-dimensional color space in the second storage unit, which is a constituent element of the color inverse conversion processing device for inverse conversion into the second and third color signals, linear interpolation is performed with a small circuit scale. It is possible to improve the color conversion accuracy due to.

Further, according to the color inverse conversion processing device of the fourteenth aspect of the present invention, since the three-dimensional LUT configured so that the conversion value in the specific color direction is linear is used, the color conversion accuracy of the specific color is improved. It is possible to improve. For example, RGB
When converting a color space to another color space, by using a three-dimensional LUT configured such that the conversion value in the green direction, which is the most important factor in human visual characteristics, is linear,
It is possible to improve the color conversion accuracy with respect to the storage capacity.

According to the color inverse conversion processing apparatus of the fifteenth aspect of the present invention, since the three-dimensional LUT configured so that the conversion value in the achromatic color direction is linear is used, the hue in the converted image is changed. It is possible to reduce the error in the lightness direction while maintaining the balance of lightness and saturation. For example, in the case of a monochrome image, coloring due to a color conversion error is reduced.

According to the sixteenth aspect of the present invention, since the inverse color conversion is performed by the small-capacity storage means and the interpolation processing means, for example, the input signal is an 8-bit digital signal. When the upper 3 bits of the input signal are input to the storage means and the lower 5 bits of the input signal are interpolated, the number of multipliers required from 72 in the conventional interpolation method can be reduced to 30, and the circuit It is possible to reduce the scale.

According to the inverse color conversion processing device of the seventeenth aspect of the present invention, for example, multiplication of a signal of 5 bits is performed by 384
4 bit LUTs, 2 bit shift circuits and 3 adders
The number of multipliers required for generating an interpolation signal can be reduced to 4 by using a LUT having a total capacity of 6 kbits, 8 bit shift circuits, and 12 adders, so that the circuit scale can be reduced.

According to the color inverse conversion processing device of the eighteenth aspect of the present invention, the interpolation coefficient generation circuit 52 is provided in a plurality of LUs.
T, a plurality of bit shift circuits, and a plurality of adders, and the interpolation coefficient generation circuit 52 is an LU with a total capacity of 1.5 kbits.
Since it can be realized by T, 5 bit shift circuits, and 8 adders, the circuit scale can be reduced.

According to the nineteenth aspect of the present invention, the CIE 1976 L ^* a ^* b ^* uniform perceptual color space stores a conversion value for inverse conversion into the RGB color space. By making the conversion value at the end portion smaller than the conversion value at the central portion of the second storage unit, it is possible to improve the color conversion accuracy with respect to the storage capacity of the second storage unit.

According to the twentieth aspect of the video signal processing device of the present invention, the sixth color signal and the color of the lightness information from the three-dimensional color space represented by the first, second and third color signals are stored. By converting the information into the three-dimensional uniform perceptual color space of the color-developing system represented by the fourth color signal and the fifth color signal of information and performing aperture correction, the high-frequency part of the image is emphasized by dividing it into brightness and saturation. This makes it possible to maintain the balance of hue, lightness, and saturation without lowering the color reproducibility.

Further, according to the video signal processing device of the twenty-first aspect of the present invention, since the aperture correction means is composed of a plurality of adders, a plurality of multipliers and a plurality of one-pixel delay circuits, the control signal is variable. By doing so, it becomes possible to perform horizontal aperture correction of the image with an arbitrary gain.

According to the video signal processing apparatus of the twenty-second aspect of the present invention, since the aperture correction means is composed of a plurality of adders, a plurality of multipliers and a plurality of one horizontal scanning period delay circuits, the control signal It is possible to correct the aperture in the vertical direction of the image with an arbitrary gain by changing the.

[Brief description of drawings]

FIG. 1 is a block circuit diagram illustrating a color conversion processing device according to first, fourth, fifth, and tenth embodiments.

FIG. 2 is a diagram showing a conceptual diagram of an LUT 21 in Examples 1, 4, and 5.

FIG. 3 is a diagram illustrating an interpolation method in a color conversion processing device according to the first, fourth, and fifth embodiments.

FIG. 4 is a diagram showing a configuration of an interpolation coefficient generation circuit 2 in the first embodiment.

FIG. 5 is a block circuit diagram showing a color conversion processing device according to a second embodiment.

FIG. 6 is a diagram illustrating a conceptual diagram of an LUT 21 according to a second embodiment.

FIG. 7 is a diagram illustrating an interpolation method in the color conversion processing device according to the second embodiment.

FIG. 8 is a diagram showing a configuration of a three-dimensional LUT 1 according to the second embodiment.

FIG. 9 is a block circuit diagram illustrating a color conversion processing device according to a third embodiment.

FIG. 10 is a diagram illustrating a conceptual diagram of an LUT 21 according to a third embodiment.

FIG. 11 is a diagram illustrating an interpolation method in the color conversion processing device according to the third embodiment.

FIG. 12 is a diagram showing a configuration of a three-dimensional LUT 1 according to the third embodiment.

FIG. 13 is a diagram illustrating a configuration of an interpolation coefficient generation circuit 2 according to a fourth embodiment.

FIG. 14 is a diagram illustrating a configuration of a multiplication circuit 30 according to the fourth embodiment.

FIG. 15 is a diagram showing a configuration of an interpolation coefficient generation circuit 2 in the fifth embodiment.

FIG. 16 is a block circuit diagram showing a color inverse conversion processing device in Examples 6, 7, 8 and 10.

FIG. 17 is a diagram showing a conceptual diagram of an LUT 71 in Examples 6, 7, and 8.

FIG. 18 is a diagram showing an interpolation method in the color reverse conversion processing apparatus of Examples 6, 7 and 8.

FIG. 19 is a block circuit diagram showing the configuration of an interpolation coefficient generation circuit 52 in the sixth embodiment.

FIG. 20 is a block circuit diagram showing the configuration of an interpolation coefficient generation circuit 52 in the seventh embodiment.

FIG. 21 is a block circuit diagram showing a configuration of a multiplication circuit 80 according to the seventh embodiment.

FIG. 22 is a block circuit diagram showing a configuration of an interpolation coefficient generation circuit 52 in the eighth embodiment.

FIG. 23 is a block circuit diagram showing an inverse color conversion processing device according to a ninth embodiment.

FIG. 24 is a diagram showing a conceptual diagram of an LUT 71 in Example 9.

FIG. 25 is a diagram showing a conceptual diagram of a three-dimensional LUT 51 in Example 9.

FIG. 26 is a block circuit diagram showing a video signal processing device according to a tenth embodiment.

FIG. 27 Aperture correction circuit 1 in Example 10
It is a block circuit diagram which shows the structure of 05.

FIG. 28 is an aperture correction circuit 1 according to the tenth embodiment.
5 is a waveform diagram of a horizontal aperture correction signal AP _H generated in 05.

FIG. 29 is an aperture correction circuit 1 according to the tenth embodiment.
5 is a waveform diagram of a vertical aperture correction signal AP _V generated in 05.

FIG. 30 is a block circuit diagram showing a conventional color conversion processing device and conventional color inverse conversion processing device.

FIG. 31 is a diagram showing a conceptual diagram of a three-dimensional LUT 127.

FIG. 32 is a diagram showing a conceptual diagram of a three-dimensional LUT 128.

FIG. 33 is a block circuit diagram showing another conventional color conversion processing device.

FIG. 34 is a diagram showing an interpolation method in a conventional color conversion processing device.

FIG. 35 is a block circuit diagram showing a conventional color inverse conversion processing device.

FIG. 36 is a diagram showing an interpolation method in a conventional color inverse conversion processing device.

[Fig. 37] Fig. 37 is a diagram illustrating output values of a ramp function in which RGB are equal and gradation is continuously changed.

FIG. 38 is a diagram showing output values of a processed image in which conversion and inverse conversion are repeated 10 times by a conventional method using the ramp function of FIG. 37 as an original image.

FIG. 39 is a diagram showing output values of a processed image obtained by repeating conversion and inverse conversion by the color conversion method of the present invention 10 times using the ramp function of FIG. 37 as an original image.

[Explanation of symbols]

1,51,127,128,129,141 Three-dimensional L
UT, 2, 52, 130, 142 interpolation coefficient generation circuit,
3-12, 24-27, 53-62, 74-77, 11
6-118, 131-138, 143-150 Multiplier, 13, 14, 63, 64, 139, 151 Adder circuit 15-18, 38-40, 46-50, 65-6
8,88-90,96-100,119-126 Adder, 19,69 Divider 21,34-37,71,8
4-87 LUTs, 22, 23, 32, 33, 72, 7
3,82,83 bit inversion circuit, 28-31,78-
81 multiplication circuit, 41, 91 6-bit shift circuit, 4
2,92 3-bit shift circuit, 43-45, 93-9
5 5-bit shift circuit, 101 L ^* axis LUT, 10
2 a ^* -axis LUT, 103 b ^* -axis LUT, 104 color conversion processing device, 105 aperture correction circuit, 106 color inverse conversion processing device, 107-110 1 pixel delay circuit, 1
11 to 115 1 Horizontal scanning period delay circuit.

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[Procedure amendment]

[Submission date] March 1, 1995

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Claim 6

[Correction method] Change

[Correction content]

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0032

[Correction method] Change

[Correction content]

Further, in the color conversion processing device according to claim 6 of the present invention, when the first, second, and third color signals are green, red, and blue, the second storage means is used for upper n bits. Second and third color signals and n + p (p is a natural number n> p )
The storage number k for bits is input, and the fourth of the eight points located on the unit cubic lattice near the point in the second three-dimensional color space indicating the m-bit first, second, and third color signals. , 5th and 6th color signals are output.

[Procedure 3]

[Document name to be amended] Statement

[Correction target item name] 0054

[Correction method] Change

[Correction content]

Further, the second storage means of the color conversion processing device according to the sixth aspect of the present invention is such that when the first, second and third color signals are green, red and blue, the upper n bits of the first color signal are stored. 2, the third color signal and the storage number k of n + p (p is a natural number n> p ) bits are input, and the m-bit first, second,
Since the fourth, fifth, and sixth color signals at eight points located in the unit cubic lattice near the point in the second three-dimensional color space indicating the third color signal are output, red, green,
The conversion value in the green direction, which is the most important factor in the visual characteristics of human beings in the blue, will be made larger than the other conversion values, and it is possible to improve the color conversion accuracy with respect to the capacity of the storage means. .

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0080

[Correction method] Change

[Correction content]

The first interpolation signal ds is calculated using the multipliers 3, 4, 5, 6 and the adder circuit 13 shown in FIG. Also,
Using the multipliers 7, 8, 9, 10 and the adder circuit 14, the second
Interpolation signal ds ■ is calculated. The calculation formula is the formula (3
It is represented by 0) and (31). ds ＝ d ₀ S ₀ + d ₁ S ₁ + d ₂ S ₂ + d ₃ S ₃ …… (30) ds ■ ＝ d ₄ S ₀ + d ₅ S ₁ + d ₆ S ₂ + d ₇ S ₃ …… (31) In equations (30) and (31), the signals at the respective grid points are multiplied by the areas located symmetrically about the input signals Ri and Bi as the interpolation coefficients, so that two interpolations on the RB plane are performed. The signal is being calculated. Three-dimensional interpolation is realized by further interpolating the two interpolation signals ds, ds (2) on the G axis. When the length of one side of the unit cubic lattice in the G-axis direction is D _k , the output signal d is calculated as in equation (32). d = {ds ■ × g + ds × (D k -g)} / (Dn 2 × D k) ...... (32) However, g is the difference G _k and the input signal Gi, calculated by the adder 17 Then, D _k is calculated by the adder 15. (Dn ²
The division by × D _k ) is to normalize the interpolation coefficient to 1. Since the Dn ² is 2 ^10, actually 1
It can be calculated by decrementing by 0 bits. Expression (3
The calculation of 2) is performed by multiplying the multipliers 11 and 12 and the adders 15, 16 and 1
7, 18 and the divider 19. D _k -g and the first interpolation signal ds are input to the multiplier 11, and g and the second interpolation signal ds 2 are input to the multiplier 12. The output signals of the multipliers 11 and 12 are input to the adder 18, and the divider 19 divides the output of the adder 18 by D _k . The higher 8 bits d of the output of the divider 19 are obtained. d is multiplied by d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ respectively and added, and further, in D _k to normalize the interpolation coefficient to 1 , It is divided and the lower 18 bits are discarded. Interpolation processing of L ^* , a ^* , and b ^* is performed by the same calculation method.

[Procedure Amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0087

[Correction method] Change

[Correction content]

In FIG. 5, the storage number k and the input signal R
The upper 3 bits Rn and Bn of i and Bi respectively are input to the three-dimensional LUT 1, and the unit cubic lattice (Rn, Rn, Bn of 8 points near the input signals Ri, Gi and Bi is input.
k ■, Bn), (Rn + Dn, k ■, Bn), (Rn + Dn, k ■, Bn + Dn), (Rn, k ■, B
n + Dn), (Rn, k ■ + _Dk ■, Bn), (Rn + Dn, k ■ + _Dk ■, Bn), (Rn + Dn,
k ■ + D _k ■, Bn + Dn), (Rn, k ■ + D _k ■, Bn + Dn) output signals d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d _{Get 6} and d ₇ . Dn is a three-dimensional LU
The length of one side in the R-axis and B-axis directions of the unit cubic lattice of T1
²⁵ . D _{k 2} is the difference between the outputs G _{k + 1} and G _k of the LUT 21, and is the length of one side of the unit cubic lattice in the G axis direction.
Further, the lower 5 bits r, b of each of the input signals Ri, Bi are input to the interpolation coefficient generation circuit 2, and the interpolation coefficients S ₀ , S as shown in FIG.
_{Get 1} , S ₂ , S ₃ . As shown by the equations (30) and (31) of the first embodiment, d ₀ , d ₁ , d ₂ , d ₃ , d ₄ , d ₅ , d ₆ , d ₇ and S ₀ , S ₁ , S ₂ , S ₃
Then, the first interpolation signal ds and the second interpolation signal ds? These two interpolated signals ds, ds ■ are as shown in equation (33),
Further, by interpolating on the G axis, three-dimensional interpolation is realized. d = {ds ■ × g + ds × (D k ■ -g)} / (Dn 2 × D k ■) ...... (33) However, g is the difference in G _k ■ an input signal Gi, (Dn ² × D _k ■)
The reason for dividing by is to normalize the interpolation coefficient to 1. Further, Dn ² is to become a 2 ¹⁰ can be calculated by actually be lowered 10 bits of digits.

[Procedure correction 6]

[Document name to be amended] Statement

[Correction target item name] 0093

[Correction method] Change

[Correction content]

In FIG. 9, the storage number k ■ and the input signal R
Three-dimensional LUT for Rn and Bn of upper 3 bits of i-Yi and Bi-Yi respectively
Input to 1 and input unit Yi, Ri-Yi, Bi-Yi neighborhood 8 point unit cubic lattice (Rn, k ■, Bn), (Rn + Dn, k ■, Bn), (Rn + Dn, k ■, Bn +
Dn), (Rn, k ■, Bn + Dn), (Rn, k ■ + D _k ■, Bn), (Rn + Dn, k ■ + D _k
■, Bn), (Rn + Dn, k ■ + D _k ■, Bn + Dn), (Rn, k ■ + D _k ■, Bn + Dn)
Obtaining an output signal _{d 0, d 1, d 2} , d 3, d 4, d 5, d 6, d 7 located.
Dn is the R-Y axis and B- of the unit cubic lattice of the three-dimensional LUT1
The length of one side in the Y-axis direction is ²⁵ . D _k 'is the difference between the outputs Y _{k + 1} ' and Y _k 'of the LUT 21, and is the length of one side of the unit cubic lattice in the Y-axis direction. The lower 5 bits r, b of each of the input signals Ri-Yi, Bi-Yi are input to the interpolation coefficient generation circuit 2,
Interpolation coefficients S ₀ , S ₁ , S ₂ , S ₃ as shown in FIG. 11 are obtained. As shown in the equations (30) and (31) of the first embodiment, d ₀ , d ₁ ,
_{d 2, d 3, d 4} , d 5, d 6, d 7 and _{S 0, S 1, S 2} , it is from S ₃ calculated ■ first interpolated signal ds and a second interpolation signal ds. These two interpolation signals ds,
Three-dimensional interpolation is realized by further interpolating ds ■ on the Y axis as shown in equation (35). d = {ds ■ × y + ds × (D k ■ -y)} / (Dn 2 × D k ■) ...... (35) Here, y is the difference between Y _k ■ an input signal Yi, (Dn ² × D _k ■)
The reason for dividing by is to normalize the interpolation coefficient to 1. Further, Dn ² is to become a 2 ¹⁰ can be calculated by actually be lowered 10 bits of digits.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0105

[Correction method] Change

[Correction content]

Example 6. 16 is a block circuit diagram showing an inverse color conversion processing device according to a sixth embodiment of the present invention. In the figure, 51 is a three- dimensional LUT, 52 is an interpolation coefficient generation circuit, 53 to 62 are multipliers, 63 and 64 are addition circuits, 6
Reference numerals 5 to 68 are adders, 69 is a divider, and 71 is an LUT.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Name of item to be corrected] 0112

[Correction method] Change

[Correction content]

Multipliers 53, 54, 55 in FIG.
56 and the addition circuit 63 are used to calculate the first interpolation signal pt. Also, the multipliers 57, 58, 59, 60 and the adder circuit 6
4 is used to calculate the second interpolation signal pt. The respective calculation formulas are represented by formulas (46) and (47). pt ＝ p ₀ T ₀ + p ₁ T ₁ + p ₂ T ₂ + p ₃ T ₃ …… (46) pt ■ ＝ p ₄ T ₀ + p ₅ T ₁ + p ₆ T ₂ + p ₇ T ₃ …… (47) In the equations (46) and (47), the signals at the respective lattice points are multiplied by the areas located point-symmetrically with respect to the input signals ai ^* and bi ^* as interpolation coefficients to obtain a ^* , b ^* Two interpolation signals on the plane are calculated. By interpolating these two interpolation signals pt, pt ■ with the L ^* axis, 3
Realize dimensional interpolation. When the length of one side of the unit cubic lattice is D _h , the output signal p is calculated as in equation (48). p = {pt ■ × l ^* + pt × (D _h -l ^* )} / (Dn ² × D _h ) …… (48)

[Procedure Amendment 9]

[Document name to be amended] Statement

[Name of item to be corrected] 0166

[Correction method] Change

[Correction content]

Further, according to the color inverse conversion processing device of the fourteenth aspect of the present invention, since the three-dimensional LUT configured so that the conversion value in the specific color direction is linear is used, the color conversion accuracy of the specific color is improved. It is possible to improve. For example, RGB
When a color space is converted into another color space, a three-dimensional LUT configured such that the conversion value in the green direction, which is the most important factor in human visual characteristics , is linear, is used to perform color conversion for storage capacity. It is possible to improve accuracy.

[Procedure Amendment 10]

[Document name to be corrected] Drawing

[Correction target item name] Fig. 16

[Correction method] Change

[Correction content]

FIG. 16

[Procedure Amendment 11]

[Document name to be corrected] Drawing

[Correction target item name] Fig. 31

[Correction method] Change

[Correction content]

FIG. 31

Claims (22)

[Claims] 1. A first three-dimensional color space represented by first, second, and third color signals is converted into a second three-dimensional color space represented by fourth, fifth, and sixth color signals. In the color conversion processing device, the first storage means for receiving the first color signal and outputting the first color signals at a plurality of points located in the vicinity of the input signal, and the output and first output of the first storage means. 2. Inputting a third color signal, and outputting a plurality of fourth, fifth, and sixth color signals located on a unit cell near the point in the second three-dimensional color space indicating the input signal Second storage means, interpolation coefficient generating means for generating an interpolation coefficient for calculating an interpolation signal from the fourth, fifth, and sixth color signals of the plurality of points;
A color conversion processing device comprising an interpolation processing means for interpolating the fourth, fifth, and sixth color signals by the fifth and sixth color signals and the interpolation coefficient. 2. A first three-dimensional color space represented by first, second, and third color signals is converted into a second three-dimensional color space represented by fourth, fifth, and sixth color signals. In the color conversion processing device, the first color signal is input as an m (m is a natural number) bit digital signal, and the kth (k is a natural number) and k + 1th stored near the input signal are stored. 1
First storage means for outputting the color signal and the storage number k, and m
The second and third color signals, which are bit digital signals, and the storage number k are input, and the eight points of the eight points located on the unit cubic lattice near the point in the second three-dimensional color space indicating the input signal are input. Second storage means for outputting the fourth, fifth, and sixth color signals; interpolation coefficient generation means for generating an interpolation coefficient for multiplying the fourth, fifth, and sixth color signals at the eight points; The second of the bits,
The interpolation is performed on each of the fourth, fifth, and sixth color signals that include the third color signal and are located in the unit plane lattice of four points when the first color signal is the kth stored signal. Similarly to the means for outputting a first interpolated signal obtained by multiplying and adding a coefficient, m
Bit second and third color signals, where the first color signal is k
Outputs a second interpolation signal obtained by multiplying the fourth, fifth, and sixth color signals located in the unit plane lattice of four points stored in the + 1st order by the interpolation coefficient and adding them. Means and the first interpolated signal minus the first color signal stored in the (k + 1) th order minus the m-bit first color signal, and the second interpolated signal from the m-bit first color signal Color conversion processing characterized by comprising interpolation processing means for calculating fourth, fifth, and sixth color signals by multiplying and adding the subtracted first color signal stored in the k-th apparatus. 3. The first storage means stores a first color signal such that the lightness of a specific color represented by the fourth, fifth and sixth color signals after color conversion is increased by a certain amount. The color conversion processing device according to claim 1 or 2. 4. The first storage means stores a first color signal such that the lightness of the achromatic color represented by the fourth, fifth and sixth color signals after color conversion is increased by a certain amount. The color conversion processing device according to claim 1 or 2. 5. When the first, second and third color signals are digital signals of m bits each, the second and third color signals of lower m−n (n is a natural number and m> n) bits. Centered on 1
An interpolation coefficient generation unit is provided which outputs an area of four planes as an interpolation coefficient when a unit plane having sides of 2 ^mn bits is divided into four in the axial direction of the second color signal and the axial direction of the third color signal. The color conversion processing device according to claim 1 or 2, wherein 6. The first, second and third color signals are green,
In the case of red and blue, the second storage means, which is a constituent element of the color conversion processing device according to claims 1 and 2, is provided with the second and third color signals for the upper n bits and n + p (p is a natural number) bits. Enter the storage number k for the minute, and enter the m-bit first, second, and
The fourth color signal, the fourth color signal, the fifth color signal, and the sixth color signal, which are located in a unit cubic lattice near a point in the second three-dimensional color space indicating the third color signal, are output. Claim 1
Alternatively, the color conversion processing device according to claim 2. 7. The first, second and third color signals are luminance signals,
In the case of the first color difference signal and the second color difference signal, the second storage means, which is a constituent element of the color conversion processing device according to claim 1 or 2, is used for the second and third color signals for the upper n bits. And n + p
The storage number k for bits is input, and the fourth of the eight points located on the unit cubic lattice near the point in the second three-dimensional color space indicating the m-bit first, second, and third color signals. 3. The color conversion processing device according to claim 1, wherein the color conversion processing device is configured to output the fifth, sixth color signals. 8. The first, second and third color signals are CIE 1976 L.
^* a ^* b ^* In the case of L ^* , a ^* , and b ^* in the uniform perceptual color space, the second storage unit, which is a constituent element of the color conversion processing device according to claim 1 or 2, is stored in the second and third upper n bits. The color signal and the storage number k for n + p bits are input, and the color signal is located on the unit cubic lattice near a point in the second three-dimensional color space indicating the m-bit first, second, and third color signals. 3. The color conversion processing device according to claim 1, wherein the color conversion processing device is configured to output the fourth, fifth, and sixth color signals of the point. 9. The first, second and third color signals are CIE 1976 L.
^In the case of L ^* , u ^* , and v ^{* in} the ^* u ^* v ^* uniform perceptual color space, the second storage unit, which is a constituent element of the color conversion processing device according to claim 1 or 2, is stored in the upper n bits. 2, a unit color of a third color signal and a storage number k for n + p bits, and a unit cube in the vicinity of a point in the second three-dimensional color space indicating the m-bit first, second, and third color signals 8 points 4th, 5th, which are located on the grid
The color conversion processing device according to claim 1, wherein the color conversion processing device is configured to output a sixth color signal. 10. An interpolation coefficient generating means for inputting second and third color signals of lower m-n bits and outputting four interpolation coefficients required for calculation of an interpolation signal is constituted by four storage means. The color conversion processing device according to claim 5, wherein 11. Storage means for inputting second and third color signals of lower m-n bits and outputting one interpolation coefficient out of four interpolation coefficients required for calculation of the interpolation signal, 6. The color conversion processing device according to claim 5, further comprising interpolation coefficient generation means for calculating the other three interpolation coefficients from the output signal of the storage means, the plurality of adders and the plurality of bit shift circuits. 12. The first three-dimensional color space represented by the first, second, and third color signals is nonlinear to the second three-dimensional color space represented by the fourth, fifth, and sixth color signals. In a color inverse conversion processing device that inversely converts the converted color signal into first, second, and third color signals, a fourth color signal is input, and a plurality of fourth points located in the vicinity of the input signal are used. A first storage unit that outputs a color signal, and a unit near the point in the first three-dimensional color space that receives the output of the first storage unit and the fifth and sixth color signals and that indicates the input signal Second storage means for outputting first, second, and third color signals of a plurality of points located on the grid or assumed to be located, and interpolation from the first, second, and third color signals of the plurality of points An interpolation coefficient generating means for generating an interpolation coefficient for calculating a signal, and the first, second and third color signals of the plurality of points and the interpolation coefficient. An inverse color conversion processing device, comprising: interpolation processing means for interpolating the first, second, and third color signals. 13. A first three-dimensional color space represented by first, second, and third color signals is non-linear to a second three-dimensional color space represented by fourth, fifth, and sixth color signals. In a color inverse conversion processing device that inversely converts the converted color signal into first, second, and third color signals, the fourth color signal is input as an m-bit digital signal, and the fourth color signal is located near the input signal. Fourth storage means for outputting the h-th (h is a natural number) and h + 1-th stored color signal and the storage number h, and fifth and sixth color signals and storage which are m-bit digital signals. Number h
Input, and outputs the first, second, and third color signals of eight points which are located on the unit cubic lattice near the point in the first three-dimensional color space indicating the input signal or are assumed to be located. Second
Storage means and interpolation coefficient generation means for generating interpolation coefficients for multiplying the first, second and third color signals of the eight points, m
Including the fifth and sixth color signals of the bit, and the fourth color signal is h
Means for outputting a first interpolated signal obtained by multiplying the first, second, and third color signals located in the unit plane lattice of four points when they are stored in the th And similarly includes m-bit fifth and sixth color signals,
4 when the color signal of is stored in the h + 1th position
Means for outputting a second interpolation signal obtained by multiplying the first, second, and third color signals located on the unit plane grid of points by the interpolation coefficient and adding them together, and storing the first interpolation signal in the (h + 1) th position The fourth color signal obtained by subtracting the m-bit fourth color signal from the generated fourth color signal is multiplied, and the second interpolated signal is multiplied by the h-th stored fourth color signal from the m-bit fourth color signal. An inverse color conversion processing apparatus comprising an interpolation processing means for calculating first, second, and third color signals by multiplying and adding the subtracted ones. 14. A fourth memory signal is stored in the first storage means so that the lightness of the specific color represented by the first, second and third color signals after color inverse conversion is increased by a certain amount. 14. The color reverse conversion processing device according to claim 12 or 13, wherein 15. A fourth memory signal is stored in the first memory means so that the brightness of the achromatic color represented by the first, second and third color signals after the color reverse conversion is increased by a certain amount. 14. The color reverse conversion processing device according to claim 12 or 13, wherein 16. When each of the fourth, fifth, and sixth color signals is a digital signal of m bits, one side is 2 ^mn bits centering on the fifth and sixth color signals of lower m−n bits. The unit plane of 4 is divided into four in the axial direction of the fifth color signal and the axial direction of the sixth color signal, and the interpolation coefficient generating means is provided for outputting the area of the four planes as an interpolation coefficient. The color inverse conversion processing device according to claim 12 or 13. 17. An interpolation coefficient generating means for inputting the fifth and sixth color signals of lower m−n bits and outputting four interpolation coefficients necessary for calculating an interpolation signal is constituted by four storage means. The color inverse conversion processing device according to claim 16, wherein 18. Storage means for inputting the fifth and sixth color signals for the lower mn bits and outputting one interpolation coefficient out of four interpolation coefficients required for calculation of the interpolation signal; 17. The inverse color conversion processing apparatus according to claim 16, further comprising interpolation coefficient generation means for calculating the other three interpolation coefficients from the output signal of the storage means, the plurality of adders and the plurality of bit shift circuits. 19. The conversion value at the end of the second storage means for storing the output first, second and third color signals for the input fourth, fifth and sixth color signals is stored in the second storage means. 14. The color reverse conversion processing device according to claim 12, wherein the conversion value is smaller than the conversion value in the central portion. 20. A three-dimensional color space represented by first, second and third color signals is composed of a fourth color signal having lightness information, a fifth color signal having color information and a sixth color signal. In a video signal processing device that performs aperture correction by converting into a three-dimensional uniform perceptual color space of a represented color system, a first color signal is input, and a plurality of first colors located in the vicinity of the input signal are input. A first storage means for outputting a signal, and a unit cell near the point in the second three-dimensional color space that receives the output of the first storage means and the second and third color signals and indicates the input signal Second storage means for outputting the fourth, fifth, and sixth color signals of a plurality of points located at, and interpolation for calculating an interpolation signal from the fourth, fifth, and sixth color signals of the plurality of points. Interpolation coefficient generating means for generating a coefficient, and the fourth, fifth, and sixth color signals of the plurality of points and the interpolation coefficient, Interpolation processing means for interpolating the fourth, fifth, and sixth color signals, first gain control means for controlling the gain of the high-frequency component of the fourth color signal in an arbitrary pixel, and fifth and fifth in that pixel. Second gain control means for controlling the gain of the sixth color signal, and the second gain control means for inversely converting the gain-controlled fourth, fifth, and sixth color signals into first, second, and third color signals. An image signal processing apparatus comprising: first and second storage means, an interpolation coefficient generating means, and an interpolation processing means, which have the same configuration as the above. 21. First gain control means for controlling the gain of a high frequency component of a fourth color signal in an arbitrary pixel, and second gain control means for controlling the gains of fifth and sixth color signals in the pixel. 21. The video signal processing device according to claim 20, wherein is constituted by a plurality of adders, a plurality of multipliers, and a plurality of 1-pixel delay circuits. 22. First gain control means for controlling the gain of a high frequency component of a fourth color signal in an arbitrary pixel, and second gain control means for controlling the gains of fifth and sixth color signals in the pixel. 21. The video signal processing apparatus according to claim 20, wherein the video signal processing device comprises a plurality of adders, a plurality of multipliers, and a plurality of one horizontal scanning period delay circuits.