JPH0865003A - Semiconductor high frequency switching circuit - Google Patents
Semiconductor high frequency switching circuitInfo
- Publication number
- JPH0865003A JPH0865003A JP19836894A JP19836894A JPH0865003A JP H0865003 A JPH0865003 A JP H0865003A JP 19836894 A JP19836894 A JP 19836894A JP 19836894 A JP19836894 A JP 19836894A JP H0865003 A JPH0865003 A JP H0865003A
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- Prior art keywords
- fet
- electrode
- transmission line
- wavelength
- switch circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Waveguide Switches, Polarizers, And Phase Shifters (AREA)
- Electronic Switches (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、概ね１ＧＨｚ以上のマ
イクロ波帯、準ミリ波帯、ミリ波帯などの高周波帯にお
いて用いられる半導体高周波スイッチ回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor high frequency switch circuit used in a high frequency band such as a microwave band, a quasi-millimeter wave band and a millimeter wave band of approximately 1 GHz or more.
【０００２】[0002]
【従来の技術】図１０に、３個のＰチャンネル電界効果
トランジスタ（以下、電界効果トランジスタをＦＥＴと
いう。）を用いた従来例の半導体高周波スイッチ回路の
構成例を示す。図１０に示すように、入力端子１と出力
端子２との間に、３つのＰチャンネルＦＥＴ６，７，８
が接続される。ここで、入力端子１は、ＦＥＴ６のソー
スとドレインとを介して、ＦＥＴ７及びＦＥＴ８の各ソ
ースに接続される。ＦＥＴ８のドレインはアースに接地
され、ＦＥＴ７のドレインは出力端子２に接続される。
さらに、ＦＥＴ６，７，８の各ゲートはそれぞれ抵抗素
子９，１１，１０を介して制御端子３，５，４に接続さ
れる。2. Description of the Related Art FIG. 10 shows a configuration example of a conventional semiconductor high-frequency switch circuit using three P-channel field effect transistors (hereinafter, a field effect transistor is referred to as an FET). As shown in FIG. 10, three P-channel FETs 6, 7, 8 are provided between the input terminal 1 and the output terminal 2.
Is connected. Here, the input terminal 1 is connected to the sources of the FET 7 and the FET 8 via the source and the drain of the FET 6. The drain of the FET 8 is grounded, and the drain of the FET 7 is connected to the output terminal 2.
Further, the gates of the FETs 6, 7, and 8 are connected to control terminals 3, 5, and 4 via resistance elements 9, 11, and 10, respectively.
【０００３】以上のように構成された従来例の半導体高
周波スイッチ回路において、ＦＥＴ６及び７の各制御端
子３，５にそれぞれ０Ｖを印加すると同時に、ＦＥＴ８
の制御端子４にＦＥＴ８のピンチオフ電圧以上の負電圧
を印加すると、ＦＥＴ６及び７がオンとなるとともにＦ
ＥＴ８がオフとなる。このとき、入力端子１と出力端子
２との間はほぼ短絡状態となり、当該半導体高周波スイ
ッチ回路はオンとなる。一方、ＦＥＴ６及び７の各制御
端子３，５にそれぞれＦＥＴ３，５のピンチオフ電圧以
上の負電圧を印加すると同時に、ＦＥＴ８の制御端子４
に０Ｖを印加すると、ＦＥＴ６及び７がオフとなるとと
もにＦＥＴ８がオンとなる。このとき、入力端子１と出
力端子２との間はほぼ開放状態となり、当該半導体高周
波スイッチ回路はオフとなる。In the conventional semiconductor high-frequency switch circuit configured as described above, 0 V is applied to each of the control terminals 3 and 5 of the FETs 6 and 7, and at the same time, the FET 8
When a negative voltage higher than the pinch-off voltage of the FET 8 is applied to the control terminal 4 of the
ET8 turns off. At this time, the input terminal 1 and the output terminal 2 are substantially short-circuited, and the semiconductor high-frequency switch circuit is turned on. On the other hand, a negative voltage higher than the pinch-off voltage of the FETs 3 and 5 is applied to the control terminals 3 and 5 of the FETs 6 and 7, respectively, and at the same time, the control terminal 4 of the FET 8 is
When 0V is applied to the FETs, the FETs 6 and 7 are turned off and the FET 8 is turned on. At this time, the space between the input terminal 1 and the output terminal 2 is substantially open, and the semiconductor high-frequency switch circuit is turned off.
【０００４】[0004]
【発明が解決しようとする課題】図１１は、図１０の従
来例の半導体高周波スイッチ回路のシミュレーション結
果である通過損失の周波数特性のグラフである。図１１
から明らかなように、オン時の通過損失は０に近い値と
なるが、オフ時には、周波数が高くなるにつれて通過損
失が低下し、オン時とオフ時の通過損失比（以下、通過
損失比という。）又はアイソレーションが小さくなると
いう問題点があった。これは、ＦＥＴ６，７の寄生容量
のために、オフ時に信号が出力端子２に漏れるためであ
り、当該通過損失比のとり得る値に限界がある。さらに
高い通過損失比をとるためには、スイッチとしての段数
を増やせばよいが、そうした場合にはスイッチのオン時
の挿入損失が増し、回路面積も大きくなるという欠点が
ある。FIG. 11 is a graph showing the pass loss frequency characteristics obtained as a result of simulation of the conventional semiconductor high-frequency switch circuit shown in FIG. Figure 11
As is clear from the above, the pass loss at the time of ON is close to 0, but at the time of OFF, the pass loss decreases as the frequency increases, and the pass loss ratio between ON and OFF (hereinafter referred to as pass loss ratio). ) Or the isolation becomes small. This is because a signal leaks to the output terminal 2 at the time of off due to the parasitic capacitance of the FETs 6 and 7, and there is a limit to a value that the passing loss ratio can take. In order to obtain a higher transmission loss ratio, the number of stages as a switch may be increased. However, in such a case, there is a disadvantage that an insertion loss when the switch is turned on increases and a circuit area increases.
【０００５】本発明の目的は、従来例に比較してより大
きなオン時とオフ時の通過損失比を得ることができ、し
かも回路構成が簡単である半導体高周波スイッチ回路を
提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor high-frequency switch circuit which can obtain a larger ON / OFF pass loss ratio than the conventional example and has a simple circuit configuration.
【０００６】[0006]
【課題を解決するための手段】この発明に係る半導体高
周波スイッチ回路は、一方の電極が入力端子に接続され
た第１のＦＥＴの他方の電極と、一方の電極が出力端子
に接続された第２のＦＥＴの他方の電極と、一方の電極
が接地された第３のＦＥＴの他方の電極とを接続し、上
記第１のＦＥＴと上記第２のＦＥＴと上記第３のＦＥＴ
の各ゲートが制御端子に接続されてなる半導体高周波ス
イッチ回路において、上記入力端子と上記出力端子との
間に、それぞれ概略１／４波長の線路長を有し互いに直
列に接続された第１及び第２の伝送線路を接続し、上記
第１の伝送線路と上記第２の伝送線路との接続点と接地
点との間に、概略１／４波長の線路長を有する第３の伝
送線路を接続し、上記入力端子と接地点との間に、概略
１／１６波長の線路長を有する第４の伝送線路を接続
し、上記出力端子と接地点との間に、概略１／１６波長
の線路長を有する第５の伝送線路を接続して構成したこ
とを特徴とする。In a semiconductor high frequency switch circuit according to the present invention, the other electrode of the first FET having one electrode connected to an input terminal and the other electrode having one electrode connected to an output terminal are provided. The other electrode of the second FET and the other electrode of the third FET whose one electrode is grounded are connected to each other, and the first FET, the second FET, and the third FET are connected.
In the semiconductor high-frequency switch circuit in which each gate is connected to the control terminal, the first and the second terminals are connected in series between the input terminal and the output terminal, each having a line length of approximately 1/4 wavelength. A second transmission line is connected, and a third transmission line having a line length of approximately 波長 wavelength is provided between a ground point and a connection point between the first transmission line and the second transmission line. A fourth transmission line having a line length of approximately 1/16 wavelength is connected between the input terminal and the ground point, and a fourth transmission line of approximately 1/16 wavelength is connected between the output terminal and the ground point. A fifth transmission line having a line length is connected and configured.
【０００７】[0007]
【作用】以上のように構成された半導体高周波スイッチ
回路においては、従来例とは逆に各ＦＥＴの制御端子の
電圧を制御し、すなわち、第１と第２のＦＥＴをオフと
しかつ第３のＦＥＴをオンとなるように制御端子に電圧
を印加することによって、当該スイッチ回路をオンと
し、一方、第１と第２のＦＥＴをオンとしかつ第３のＦ
ＥＴをオフとなるように制御端子に電圧を印加すること
によって、当該スイッチ回路をオフとすることができ
る。In the semiconductor high-frequency switch circuit configured as described above, the voltage at the control terminal of each FET is controlled, that is, the first and second FETs are turned off and the third The switch circuit is turned on by applying a voltage to the control terminal so that the FET is turned on, while the first and second FETs are turned on and the third F
The switch circuit can be turned off by applying a voltage to the control terminal so that ET is turned off.
【０００８】ここで、当該スイッチ回路がオフの時に
は、当該スイッチ回路の等価回路は図５のように書き換
えることができる。図５からわかるように、当該スイッ
チ回路の入力端子と出力端子との間に、一端が接地され
た一種の直列共振トラップ回路が接続され、これによっ
て、例えば図９の通過損失の周波数特性に示すように、
所定の直列共振周波数において通過損失が極めて大きく
なる。一方、当該スイッチ回路がオンの時には、当該ス
イッチ回路の等価回路は図８のように書き換えることが
できる。図８からわかるように、入力端子と出力端子と
の間に、各一端が接地された３個の並列共振回路が接続
されて、当該スイッチ回路は一種の帯域通過フィルタと
みなすことができる。これより、低損失な、すなわち良
好なオン特性を得ることができる。以上より、当該スイ
ッチ回路の通過損失比は、従来例に比較して極めて大き
くなる。When the switch circuit is off, the equivalent circuit of the switch circuit can be rewritten as shown in FIG. As can be seen from FIG. 5, a kind of series resonance trap circuit having one end grounded is connected between the input terminal and the output terminal of the switch circuit. like,
At a given series resonance frequency, the passage loss becomes extremely large. On the other hand, when the switch circuit is on, the equivalent circuit of the switch circuit can be rewritten as shown in FIG. As can be seen from FIG. 8, three parallel resonance circuits each having one end grounded are connected between the input terminal and the output terminal, and the switch circuit can be regarded as a kind of band-pass filter. As a result, low loss, that is, good ON characteristics can be obtained. From the above, the pass loss ratio of the switch circuit becomes extremely large as compared with the conventional example.
【０００９】[0009]
【実施例】図１に、本発明に係る一実施例の半導体高周
波スイッチ回路の回路図を示す。この実施例の半導体高
周波スイッチ回路は、図１０のスイッチ回路に加えて、
以下の如く５個の伝送線路１２乃至１６を接続したこと
を特徴とする。 （ａ）入力端子１と出力端子２との間に、それぞれ１／
４波長の線路長を有し互いに直列に接続された伝送線路
１２，１３を接続する。 （ｂ）伝送線路１２と第２の伝送線路１３との接続点と
接地点との間に、１／４波長の線路長を有する伝送線路
１４を接続する。 （ｃ）入力端子１と接地点との間に、１／１６波長の線
路長を有する伝送線路１５を接続する。 （ｄ）出力端子２と接地点との間に、１／１６波長の線
路長を有する伝送線路１６を接続する。FIG. 1 is a circuit diagram of a semiconductor high-frequency switch circuit according to an embodiment of the present invention. The semiconductor high-frequency switch circuit of this embodiment has, in addition to the switch circuit of FIG.
It is characterized in that five transmission lines 12 to 16 are connected as follows. (A) between the input terminal 1 and the output terminal 2
Transmission lines 12 and 13 having a line length of four wavelengths and connected in series with each other are connected. (B) The transmission line 14 having a line length of ¼ wavelength is connected between the connection point between the transmission line 12 and the second transmission line 13 and the ground point. (C) A transmission line 15 having a line length of 1/16 wavelength is connected between the input terminal 1 and the ground point. (D) A transmission line 16 having a line length of 1/16 wavelength is connected between the output terminal 2 and the ground point.
【００１０】この実施例の半導体高周波スイッチ回路
は、図１に示すように、入力端子１と出力端子２との間
に、３つのＰチャンネルＦＥＴ６，７，８が接続され
る。ここで、入力端子１は、ＦＥＴ６のソースとドレイ
ンとを介して、ＦＥＴ７及びＦＥＴ８の各ソースに接続
される。ＦＥＴ８のドレインはアースに接地され、ＦＥ
Ｔ７のドレインは出力端子２に接続される。さらに、Ｆ
ＥＴ６，７，８の各ゲートはそれぞれ抵抗素子９，１
１，１０を介して制御端子３，５，４に接続される。ま
た、入力端子１と出力端子２との間に、それぞれ１／４
波長の線路長を有し互いに直列に接続された伝送線路１
２，１３を接続する。さらに、伝送線路１２と第２の伝
送線路１３との接続点と接地点との間に、１／４波長の
線路長を有する伝送線路１４を接続する。またさらに、
入力端子１と接地点との間に、１／１６波長の線路長を
有する伝送線路１５を接続するとともに、出力端子２と
接地点との間に、１／１６波長の線路長を有する伝送線
路１６を接続する。In the semiconductor high-frequency switch circuit of this embodiment, as shown in FIG. 1, three P-channel FETs 6, 7, and 8 are connected between an input terminal 1 and an output terminal 2. Here, the input terminal 1 is connected to the sources of the FET 7 and the FET 8 via the source and the drain of the FET 6. The drain of FET8 is grounded to ground and FE
The drain of T7 is connected to the output terminal 2. Furthermore, F
The gates of ET6, 7, and 8 are connected to resistance elements 9 and 1, respectively.
The terminals are connected to control terminals 3, 5, and 4 via 1, 10. Also, each of the input terminals 1 and 2 has a 1/4
Transmission line 1 having a wavelength line length and connected in series with each other
Connect 2 and 13. Further, a transmission line 14 having a line length of 1/4 wavelength is connected between a connection point between the transmission line 12 and the second transmission line 13 and a ground point. Furthermore,
A transmission line 15 having a line length of 1/16 wavelength is connected between the input terminal 1 and the ground point, and a transmission line having a line length of 1/16 wavelength is connected between the output terminal 2 and the ground point. 16 is connected.
【００１１】以上のように構成された本実施例の半導体
高周波スイッチ回路において、ＦＥＴ６及び７の各制御
端子３，５にそれぞれＦＥＴ３，５のピンチオフ電圧以
上の負電圧を印加すると同時に、ＦＥＴ８の制御端子４
に０Ｖを印加すると、ＦＥＴ６及び７がオフとなるとと
もにＦＥＴ８がオンとなる。このとき、当該半導体高周
波スイッチ回路は後述するようにオンとなる。一方、Ｆ
ＥＴ６及び７の各制御端子３，５にそれぞれ０Ｖを印加
すると同時に、ＦＥＴ８の制御端子４にＦＥＴ８のピン
チオフ電圧以上の負電圧を印加すると、ＦＥＴ６及び７
がオンとなるとともにＦＥＴ８がオフとなる。このと
き、当該半導体高周波スイッチ回路は後述するようにオ
フとなる。In the semiconductor high-frequency switch circuit according to the present embodiment, a negative voltage equal to or higher than the pinch-off voltage of the FETs 3 and 5 is applied to the control terminals 3 and 5 of the FETs 6 and 7, respectively. Terminal 4
When 0V is applied to the FETs, the FETs 6 and 7 are turned off and the FET 8 is turned on. At this time, the semiconductor high-frequency switch circuit is turned on as described later. On the other hand, F
When 0 V is applied to each of the control terminals 3 and 5 of the ETs 6 and 7 and simultaneously a negative voltage equal to or higher than the pinch-off voltage of the FET 8 is applied to the control terminal 4 of the FET 8,
Is turned on and the FET 8 is turned off. At this time, the semiconductor high-frequency switch circuit is turned off as described later.
【００１２】図２に、図１の半導体高周波スイッチ回路
のオフ時の等価回路を示す。ここで、伝送線路はインダ
クタＬとキャパシタＣの集中定数素子で等価的に表し
た。すなわち、１／４波長の伝送線路１２乃至１４はそ
れぞれ、Ｃ−Ｌ−Ｃのπ型回路で置き換えるとともに、
１／１６波長の伝送線路１５及び１６はインダクタＬで
置き換えた。ここで、１７ａ，１７ｂはそれぞれ、ＦＥ
Ｔ６，７がオン時の等価抵抗であり、１８はＦＥＴ８が
オフ時の等価容量である。また、１９ａ乃至１９ｅはそ
れぞれ、伝送線路１２乃至１４の等価インダクタであ
り、２０ａ乃至２０ｆは伝送線路１２乃至１４の等価容
量である。FIG. 2 shows an equivalent circuit when the semiconductor high-frequency switch circuit of FIG. 1 is turned off. Here, the transmission line is represented equivalently by a lumped constant element of an inductor L and a capacitor C. That is, the quarter-wave transmission lines 12 to 14 are each replaced with a C-L-C [pi] -type circuit, and
The transmission lines 15 and 16 of 1/16 wavelength were replaced with an inductor L. Here, 17a and 17b are respectively FE
T6 and 7 are equivalent resistances when the FET is on, and 18 is an equivalent capacitance when the FET 8 is off. 19a to 19e are equivalent inductors of the transmission lines 12 to 14, respectively, and 20a to 20f are equivalent capacitances of the transmission lines 12 to 14.
【００１３】図２の等価回路において、一端が接地され
た等価容量２０ｆが接地された等価容量２０ｆを無視す
るとともに、等価容量２０ｂ，２０ｃおよび２０ｅを１
つの等価容量２１にまとめて簡単にすると、図３の等価
回路になる。ここで、ＦＥＴ６及び７の等価抵抗１７
ａ，１７ｂの抵抗値は一般に数Ωであるので、零とみな
し、また、接続線と接地点との間に接続されたインダク
タ１９ｃ，１９ｄ，１９ｅは主として低周波領域におい
て支配的であるが、準ミリ波帯又はミリ波帯ではこれら
のインダクタの影響は少ないので無視することができ零
とすると、図４の等価回路のように書き換えることがで
きる。In the equivalent circuit of FIG. 2, the equivalent capacitance 20f whose one end is grounded is ignored and the equivalent capacitance 20f whose ground is ignored, and the equivalent capacitances 20b, 20c and 20e are set to 1
When simplified into two equivalent capacitances 21, the equivalent circuit shown in FIG. 3 is obtained. Here, the equivalent resistance 17 of the FETs 6 and 7
Since the resistance values of a and 17b are generally several Ω, they are regarded as zero, and the inductors 19c, 19d and 19e connected between the connection line and the ground point are dominant mainly in the low frequency region. In the quasi-millimeter wave band or the millimeter wave band, the influence of these inductors is small and can be ignored, and if it is set to zero, it can be rewritten as the equivalent circuit in FIG.
【００１４】さらに、図４において、等価インダクタ１
９ａ，１９ｂを１つの等価インダクタ２２で書き換える
とともに、等価容量１８，２０ａ，２０ｄを１つの等価
容量２３で書き換えると、図５の等価回路のようにな
る。図５から明らかなように、当該スイッチ回路の入力
端子と出力端子との間に、一端が接地された一種の直列
共振トラップ回路が接続され、これによって、所定の直
列共振周波数ｆ0において通過損失が極めて大きくな
る。それ故、上記通過損失比が従来例に比較して大きく
なる。上記直列共振周波数ｆ0は次の数１で表わすこと
ができる。Further, in FIG. 4, the equivalent inductor 1
When 9a and 19b are rewritten with one equivalent inductor 22, and equivalent capacitances 18, 20a and 20d are rewritten with one equivalent capacitance 23, the equivalent circuit of FIG. 5 is obtained. As is apparent from FIG. 5, a kind of series resonance trap circuit, one end of which is grounded, is connected between the input terminal and the output terminal of the switch circuit, whereby the passage loss at a predetermined series resonance frequency f 0 is achieved. Becomes extremely large. Therefore, the above-mentioned passing loss ratio becomes larger than that of the conventional example. The series resonance frequency f 0 can be expressed by the following equation 1.
【００１５】[0015]
【数１】ｆ0＝１／｛２π√（Ｌ22・Ｃ21）｝[Formula 1] f 0 = 1 / {2π√ (L 22 · C 21 )}
【００１６】ここで、Ｌ22は等価インダクタ２２のイン
ダクタンスであり、Ｃ22は等価容量２１のキャパシタン
スである。従って、容量素子、またはインダクタの値、
すなわち伝送回路のインピーダンスと線路長を選定すれ
ば、上記直列共振周波数ｆ0に等しい、目的とする動作
周波数で、入力端子１と出力端子２との間は概ね開放状
態となり、当該スイッチ回路はオフ状態となる。例え
ば、入力端子１にミリ波信号を入力したとき、出力端子
２から出力されるミリ波信号は非常に小さくなり、優れ
たオフ特性が得られる。Here, L 22 is the inductance of the equivalent inductor 22, and C 22 is the capacitance of the equivalent capacitance 21. Therefore, the value of the capacitive element or inductor,
That is, if the impedance and the line length of the transmission circuit are selected, between the input terminal 1 and the output terminal 2 at a target operating frequency equal to the series resonance frequency f 0 , the input terminal 1 and the output terminal 2 are almost opened, and the switch circuit is turned off. It becomes a state. For example, when a millimeter wave signal is input to the input terminal 1, the millimeter wave signal output from the output terminal 2 becomes very small, and excellent off characteristics can be obtained.
【００１７】次いで、図６に、図１の半導体高周波スイ
ッチ回路のオン時の等価回路を示す。ここで、２４はＦ
ＥＴ８がオン時の等価抵抗であり、２５ａ，２５ｂはそ
れぞれＦＥＴ６及び７がオフ時の等価容量である。この
図６において、一端が接地された等価容量２０ｆを無視
し、等価容量２０ｂ，２０ｃ及び２０ｅを１つの等価容
量２１に代表させて、簡単化すると図７の等価回路を得
る。ここで、等価抵抗２４を上述と同様に零とみなして
無視するととともに、等価容量２５ａと２０ａとを１つ
の等価容量２６ａに置き換え、等価容量２５ｂと２０と
を１つの等価容量２６ｂに置き換えて簡単化すると、図
８の等価回路のようになる。図８から明らかなように、
入力端子１と出力端子２との間に、各一端が接地された
３個の並列共振回路が接続されて、当該スイッチ回路は
一種の帯域通過フィルタとみなすことができる。これよ
り、低損失な、すなわち良好なオン特性を得ることがで
きる。Next, FIG. 6 shows an equivalent circuit of the semiconductor high frequency switch circuit of FIG. 1 when it is turned on. Where 24 is F
ET8 is an equivalent resistance when ON, and 25a and 25b are equivalent capacitances when FETs 6 and 7 are OFF, respectively. In FIG. 6, the equivalent capacitance 20f whose one end is grounded is ignored, and the equivalent capacitances 20b, 20c and 20e are represented by one equivalent capacitance 21 for simplification, and the equivalent circuit of FIG. 7 is obtained. Here, the equivalent resistance 24 is regarded as zero in the same manner as described above and ignored, and the equivalent capacitances 25a and 20a are replaced with one equivalent capacitance 26a, and the equivalent capacitances 25b and 20 are replaced with one equivalent capacitance 26b. Then, an equivalent circuit shown in FIG. 8 is obtained. As is clear from FIG.
Three parallel resonance circuits each having one end grounded are connected between the input terminal 1 and the output terminal 2, and the switch circuit can be regarded as a kind of band-pass filter. As a result, low loss, that is, good ON characteristics can be obtained.
【００１８】図９は、図１の半導体高周波スイッチ回路
のシミュレーション結果である通過損失の周波数特性の
グラフである。この図９からわかるように、本実施例の
半導体高周波スイッチ回路は、数１で表される直列共振
周波数に等しい、目的とする所望の動作周波数ｆ0で、
従来例の図１０の半導体高周波スイッチ回路と比べて極
めて大きな、オン時とオフ時の通過損失比（又はアイソ
レーション）を得ることができる。しかも、本実施例の
半導体高周波スイッチ回路は、図１に示すように極めて
簡単な回路構成を有し、小型・軽量に製造することがで
きるという特有の効果を有する。FIG. 9 is a graph of frequency characteristics of passage loss which is a simulation result of the semiconductor high frequency switch circuit of FIG. As can be seen from FIG. 9, the semiconductor high-frequency switch circuit of this embodiment has a desired desired operating frequency f 0 equal to the series resonance frequency expressed by the equation 1 ,
As compared with the semiconductor high-frequency switch circuit of FIG. 10 of the conventional example, it is possible to obtain an extremely large pass loss ratio (or isolation) at the time of on and off. Moreover, the semiconductor high-frequency switch circuit of this embodiment has an extremely simple circuit configuration as shown in FIG. 1, and has a unique effect that it can be manufactured in a small size and a light weight.
【００１９】以上の実施例において、ＰチャンネルＦＥ
Ｔ６，７，８を用いているが、本発明はこれに限らず、
ＮチャンネルＦＥＴを用いてもよい。また、Ｐチャンネ
ルＦＥＴ及びＮチャンネルＦＥＴに限らず、図１におけ
る各ＦＥＴ６，７，８のソースとドレインの電極を入れ
替えてもよい。以上の実施例において、伝送線路１２乃
至１４は１／４波長の線路長を有し、伝送線路１５，１
６は１／１６波長の線路長を有しているが、本発明はこ
れに限らず、それぞれ概略の各線路長を有するように構
成してもよい。In the above embodiment, the P channel FE
Although T6, 7, and 8 are used, the present invention is not limited to this.
N-channel FET may be used. Further, the source and drain electrodes of each of the FETs 6, 7, and 8 in FIG. 1 are not limited to the P-channel FET and the N-channel FET, and may be replaced. In the above embodiment, the transmission lines 12 to 14 have a line length of 1/4 wavelength, and the transmission lines 15, 1
Although 6 has a line length of 1/16 wavelength, the present invention is not limited to this, and may be configured to have respective line lengths.
【００２０】[0020]
【発明の効果】以上詳述したようにこの発明によれば、
一方の電極が入力端子に接続された第１のＦＥＴの他方
の電極と、一方の電極が出力端子に接続された第２のＦ
ＥＴの他方の電極と、一方の電極が接地された第３のＦ
ＥＴの他方の電極とを接続し、上記第１のＦＥＴと上記
第２のＦＥＴと上記第３のＦＥＴの各ゲートが制御端子
に接続されてなる半導体高周波スイッチ回路において、
上記入力端子と上記出力端子との間に、それぞれ概略１
／４波長の線路長を有し互いに直列に接続された第１及
び第２の伝送線路を接続し、上記第１の伝送線路と上記
第２の伝送線路との接続点と接地点との間に、概略１／
４波長の線路長を有する第３の伝送線路を接続し、上記
入力端子と接地点との間に、概略１／１６波長の線路長
を有する第４の伝送線路を接続し、上記出力端子と接地
点との間に、概略１／１６波長の線路長を有する第５の
伝送線路を接続して構成した。このように、この発明
は、回路構成が簡単であって小型・軽量に製造すること
ができるとともに、従来例に比較してより大きなオン時
とオフ時の通過損失比を得ることができるという特有の
効果を有する。As described above in detail, according to the present invention,
The other electrode of the first FET, one electrode of which is connected to the input terminal, and the second F electrode of which one electrode is connected to the output terminal.
The other electrode of the ET and the third F with one electrode grounded
In a semiconductor high-frequency switch circuit in which the other electrode of ET is connected, and the gates of the first FET, the second FET, and the third FET are connected to control terminals,
Between the input terminal and the output terminal, each is roughly 1
A first and a second transmission line having a line length of / 4 wavelength and connected in series with each other, and between a connection point of the first transmission line and the second transmission line and a ground point. To 1 /
A third transmission line having a line length of 4 wavelengths is connected, a fourth transmission line having a line length of approximately 1/16 wavelength is connected between the input terminal and a ground point, and the output terminal is connected. A fifth transmission line having a line length of approximately 1/16 wavelength was connected to the ground point. As described above, the present invention is unique in that it has a simple circuit configuration, can be manufactured in a small size and light weight, and can obtain a larger ON / OFF pass loss ratio than the conventional example. Has the effect of
【図１】 本発明に係る一実施例の半導体高周波スイッ
チ回路の回路図である。FIG. 1 is a circuit diagram of a semiconductor high-frequency switch circuit according to one embodiment of the present invention.
【図２】 図１の半導体高周波スイッチ回路のオフ時の
等価回路図である。FIG. 2 is an equivalent circuit diagram when the semiconductor high-frequency switch circuit of FIG. 1 is off.
【図３】 図１の半導体高周波スイッチ回路のオフ時の
動作を示すための第１の等価回路図である。FIG. 3 is a first equivalent circuit diagram showing an operation of the semiconductor high-frequency switch circuit of FIG. 1 when it is off.
【図４】 図１の半導体高周波スイッチ回路のオフ時の
動作を示すための第２の等価回路図である。FIG. 4 is a second equivalent circuit diagram showing the operation of the semiconductor high-frequency switch circuit of FIG. 1 when it is off.
【図５】 図１の半導体高周波スイッチ回路のオフ時の
動作を示すための第３の等価回路図である。FIG. 5 is a third equivalent circuit diagram showing the operation of the semiconductor high-frequency switch circuit of FIG. 1 when it is off.
【図６】 図１の半導体高周波スイッチ回路のオン時の
等価回路図である。6 is an equivalent circuit diagram when the semiconductor high-frequency switch circuit of FIG. 1 is turned on.
【図７】 図１の半導体高周波スイッチ回路のオン時の
動作を示すための第１の等価回路図である。7 is a first equivalent circuit diagram for showing the operation of the semiconductor high-frequency switch circuit of FIG. 1 when it is turned on.
【図８】 図１の半導体高周波スイッチ回路のオン時の
動作を示すための第２の等価回路図である。FIG. 8 is a second equivalent circuit diagram showing an operation when the semiconductor high-frequency switch circuit of FIG. 1 is turned on.
【図９】 図１の半導体高周波スイッチ回路のオン時と
オフ時の通過損失の周波数特性を示すグラフである。9 is a graph showing frequency characteristics of a pass loss when the semiconductor high-frequency switch circuit of FIG. 1 is on and off.
【図１０】 従来例の半導体高周波スイッチ回路の回路
図である。FIG. 10 is a circuit diagram of a conventional semiconductor high-frequency switch circuit.
【図１１】 図１０の半導体高周波スイッチ回路のオン
時とオフ時の通過損失の周波数特性を示すグラフであ
る。11 is a graph showing frequency characteristics of a pass loss when the semiconductor high-frequency switch circuit of FIG. 10 is on and off.
１…入力端子、 ２…出力端子、 ３，４，５…制御端子、 ６，７，８…ＦＥＴ、 ９，１０，１１…抵抗素子、 １２，１３，１４…１／４波長の伝送線路、 １５，１６…１／１６波長の伝送線路、 １７ａ，１７ｂ，２４…等価抵抗、 １８，２０ａ，２０ｂ，２０ｃ，２０ｄ，２０ｅ，２０
ｆ，２１，２３，２５ａ，２５ｂ，２６ａ，２６ｂ…等
価容量、 １９ａ，１９ｂ，１９ｃ，１９ｄ，１９ｅ，２２…伝送
線路の等価インダクタ。1 ... Input terminal, 2 ... Output terminal, 3, 4, 5 ... Control terminal, 6, 7, 8 ... FET, 9, 10, 11 ... Resistor element, 12, 13, 14 ... 1/4 wavelength transmission line, 15, 16 ... 1/16 wavelength transmission line, 17a, 17b, 24 ... Equivalent resistance, 18, 20a, 20b, 20c, 20d, 20e, 20
f, 21, 23, 25a, 25b, 26a, 26b ... equivalent capacitance, 19a, 19b, 19c, 19d, 19e, 22 ... transmission line equivalent inductor.
Claims (1)
の電界効果トランジスタの他方の電極と、一方の電極が
出力端子に接続された第２の電界効果トランジスタの他
方の電極と、一方の電極が接地された第３の電界効果ト
ランジスタの他方の電極とを接続し、上記第１の電界効
果トランジスタと上記第２の電界効果トランジスタと上
記第３の電界効果トランジスタの各ゲートが制御端子に
接続されてなる半導体高周波スイッチ回路において、 上記入力端子と上記出力端子との間に、それぞれ概略１
／４波長の線路長を有し互いに直列に接続された第１及
び第２の伝送線路を接続し、 上記第１の伝送線路と上記第２の伝送線路との接続点と
接地点との間に、概略１／４波長の線路長を有する第３
の伝送線路を接続し、 上記入力端子と接地点との間に、概略１／１６波長の線
路長を有する第４の伝送線路を接続し、 上記出力端子と接地点との間に、概略１／１６波長の線
路長を有する第５の伝送線路を接続して構成したことを
特徴とする半導体高周波スイッチ回路。A first electrode having one electrode connected to an input terminal;
The other electrode of the field effect transistor, the other electrode of the second field effect transistor having one electrode connected to the output terminal, and the other electrode of the third field effect transistor having one electrode grounded. A semiconductor high-frequency switch circuit in which the respective gates of the first field-effect transistor, the second field-effect transistor, and the third field-effect transistor are connected to a control terminal. Between the terminal and the outline 1
A first and a second transmission line having a line length of / 4 wavelength and connected in series with each other, and between a connection point of the first transmission line and the second transmission line and a ground point. A third line having a line length of approximately 1/4 wavelength
A fourth transmission line having a line length of about 1/16 wavelength is connected between the input terminal and the ground point, and a fourth transmission line is connected between the output terminal and the ground point. A semiconductor high-frequency switch circuit comprising a fifth transmission line having a line length of / 16 wavelength connected thereto.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19836894A JP2642600B2 (en) | 1994-08-23 | 1994-08-23 | Semiconductor high frequency switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19836894A JP2642600B2 (en) | 1994-08-23 | 1994-08-23 | Semiconductor high frequency switch circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0865003A true JPH0865003A (en) | 1996-03-08 |
| JP2642600B2 JP2642600B2 (en) | 1997-08-20 |
Family
ID=16389951
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19836894A Expired - Fee Related JP2642600B2 (en) | 1994-08-23 | 1994-08-23 | Semiconductor high frequency switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2642600B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5091124B2 (en) * | 2006-12-28 | 2012-12-05 | ローム株式会社 | Display control device and electronic device using the same |
| JP2014096671A (en) * | 2012-11-08 | 2014-05-22 | Taiyo Yuden Co Ltd | Switching device and module |
-
1994
- 1994-08-23 JP JP19836894A patent/JP2642600B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5091124B2 (en) * | 2006-12-28 | 2012-12-05 | ローム株式会社 | Display control device and electronic device using the same |
| JP2014096671A (en) * | 2012-11-08 | 2014-05-22 | Taiyo Yuden Co Ltd | Switching device and module |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2642600B2 (en) | 1997-08-20 |
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