JPH0862583A - Method of liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent crosstalk between the pixels of a liquid crystal display and to provide the images with high contrast by respectively selectively operating low frequency signals to the columns of electrodes and high-frequency signals to rows of the electrodes. SOLUTION: This method is provided with a means for selectively operating the low-frequency signals to the columns CE1-CEJ of the electrodes on a substrate holding liquid crystal, the means for selectively operating the high-frequency signals to the rows of the electrodes and operating the liquid crystal at the selected part of the row and the column by first signals and second signals, and the means for passively preserving the energy of capacitance, expressed by the row at a high-frequency by a dielectric. The low-frequency is from 10kHz to 20kHz and the high-frequency is the frequency equal to or higher than 1MHz. While the dielectric L keeps the high-frequency energy impressed to an internal electrode capacitance, the high-frequency signals cancel considerably the crosstalk between the pixels.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly to a method for a liquid crystal display in a computer or other device using a passive liquid crystal display.

[0002]

Liquid crystal displays suffer from crosstalk between pixels. Whenever a particular pixel is activated, all other unselected pixels in the same row and column will also receive some of the voltage applied to the selected pixel. This partially activates the unselected pixels and creates a low contrast image.

[0003]

In this conventional liquid crystal display method, crosstalk between pixels causes
The present invention aims to overcome these drawbacks by using dual frequency addressing because it produces a low contrast image. However, dual frequency addressing involves considerable energy consumption when both frequencies are high. This increased energy usage is not desirable in battery powered displays.

[0004]

In order to solve the above problems, the passive liquid crystal display of the present invention comprises means for selectively activating a low frequency signal to a column of electrodes on a substrate sandwiching liquid crystal. , Means for selectively actuating a high frequency signal on a row of electrodes, the first and second signals actuating a liquid crystal at selected locations of the row and column, and a capacitance of the capacitance represented by the row at a high frequency. A means for passively storing energy with an inductor is provided to enhance the effect. Low frequency is 10KHz to 20
KHz, and the high frequency is a high frequency of 1 MHz or higher.

[0005]

The feature of the present invention is that the low-frequency signal and the high-frequency signal are selectively actuated to the row or the column of the electrodes on the substrate sandwiching the liquid crystal, so that the low-frequency signal and the high-frequency signal are applied to the row and the column. Activate the liquid crystal at the selected location. It also saves energy from the capacitance presented at the electrodes. Another feature of the invention is that the energy required to charge the electrodes is stored in an inductor that resonates with the capacitance formed by the rows and columns of the electrodes. Another feature of the present invention is that the low frequency is 10 KH.
From z to 20 KHz, the high frequency is 1 MHz.
All these features of the invention are set forth in the claims. Further, the effects of the present invention are clarified by the following detailed description with reference to the accompanying drawings.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENT In FIG. 1, a computer CO1 has a main body B01 having a keyboard KB1 and a processor PR1. The liquid crystal display (LCD) DI1 is B
It has four blocks L1, BL2, BL3, and BL4. Of these, the block BL1 is BL2, BL3, BL
An enlarged view is shown in order to make the explanation of the common details of the four blocks easier. The block BL1 is a row electrode R
E1 to REN are provided, and column electrodes CE1 to CEJ are provided together with blocks BL2 to BL4. The description of block BL1 applies equally to blocks BL2 to BL4. Electrodes RE1 to REN and CE1 to C
EJ is a pixel row, P11 to P1J, P21 to P2J ... In each block of BL1 to BL4.
., PN1 is formed from PN1. The electrodes are shown in a much enlarged view for clarity. For example, display DI1 has a pixel resolution of 640x480 at each electrode crossover corresponding to one pixel.
Each of the blocks BL1 to BL4 has 120 row electrodes RE
1 to REN (N = 120) and 640 column electrode CE
1 to CEJ (J = 640). This means that each block has 640 × 120 pixels, and the display DI1 has a total of 640 × 480 pixels.

The processor PR1 has the drive circuit DC shown in the detailed views of FIGS. As shown in FIG. 2 and FIG. 3, the drive circuit DC includes four row drivers DR1 to DR4, one for each block BL1 to BL4.
And has one column driver CD1. FIG. 2 shows a row driver DR that drives the row electrodes RE1 to REN.
It is a detailed view of 1. FIG. 3 shows column electrodes CE1 to CE.
It is a detailed diagram of a column driver DC1 that drives N.

In FIG. 2, the source LF1 is complementary to the MOSFETs M1, M2, M3, M4, ...
・ From M (N-1), MN to MH1 of MOSFETs,
MH2, MH3, MH4, ... MH (N-1), MH
Operate each of up to N. Source b + is MOSFET
s M1 to MN and MH1 to MHN are activated.
The corresponding inverter, of which IN1 is shown, sends a negative input pulse to the MHs of the MOSFETs.
While driving from 1 to MHN, a positive input pulse is driven from M1 to MN of MOSFETs to provide complementary synchronization. The reverse is also true. Thus, the activated and controlled MOSFETs M1 to MN actuate an addressing pulse to the row electrodes RE1 to REN while the row electrode is separated from the inductor L. The low frequency address input source LF1 operates, for example, in the range of 5 KHz to 40 KHZ. MH1 of MOSFETs
To MHN conduct, they connect the row electrodes RE1 to REN and their capacitance C _row to the inductor L. The latter forms a natural resonant circuit with the total capacitance C _TB of the driver DC1. The resonant circuit has a resonant frequency.

[0009]

[Equation 1] The L value is a selected value, and the resonance frequency f _hi is in the range of 0.5 MHz to 3 MHz, preferably 0.75 MHz.
To 1.25 MHz, with about 1 MHz being most preferred. These frequencies are, every few times, considerably higher than the crossover frequency f _c of the liquid crystal material in the blocks BL1 to BL4 of the display DI1. Liquid crystal molecules tend to align parallel to the drive field when driven below f _c , and tend to align perpendicular to the drive field when driven above f _c . Therefore, the current at high frequency f _hi opposes the effect of stray voltage on unselected pixels. The frequency range presented here is an example, and other ranges are possible.

When a pulse is applied to the resonant circuit composed of the capacitance C _TB and the inductor L, ringing starts at the frequency f _hi and the oscillation is maintained at that frequency. This includes lines LH1 and LH2 and row electrodes RE1 to RE.
At N, it becomes a high frequency current. The high frequency source HF1 that maintains ringing at the frequency f _hi is M of MOSFETs.
The pulsar PS1 composed of F1 to MF4 is operated. The pulsar PS1 activates a pulse to start ringing and maintain ringing of the resonance circuit. In particular, the pulse source HF1 activates the MOSFETs MF1 and MF4 simultaneously for a short time at or near the peak of the 1/2 cycle of the frequency f _hi while the MOSFETs MF2 and MF3 are off. And MF1 and MF4 of MOSFETs
While is off, the MOSFETs MF3 and MF2 are simultaneously activated at or near the peak of the other half cycle for a short time.

At system startup, the resonant circuit consisting of the inductor L and the cell capacitance starts ringing at the frequency f _hi . At this time, the high frequency source HF1 receives the feedback signal from the oscillating resonant circuit traversing the lines LH1 and LH2 and determines when and when the MOSFETs MF1 to MF4 should be activated and deactivated. This feedback process is a form of automatic frequency control and assists its operation. Because the capacitance C _TB is 3
This is because the number of pixels turned on and off changes to as much as 0%, depending on the temperature, to a lower level. As a result, the f _hi value changes. Resonance frequency 1
Resonance frequency f _hi at or around the / 2 cycle peak
By generating a pulse in synchronism with the pulse generator, the pulse generator changes its frequency or the pulse repetition rate and follows the instantaneously changing frequency f _hi . In this method, the pulse resonance frequency is maintained by the row electrodes RE1 to RE.
Activating a high frequency signal for N results in a low energy system. It provides maximum energy conservation and energy return. This frequency control is particularly advantageous for large screens, since individual pixels change the capacitance very little.

MH1, MH2, MH of MOSFETs
3, MH4 ... MH (N-1), MHN are the row electrodes RE1, RE2, RE3, RE4 ... RE (N-
1), applying high frequency signals to these electrodes in lines LH1 and LH2 while there are no low frequency addressing pulses at REN. Due to the advantages of these complementary operations, the MOSFETs M1 to MN operate together with the MOSFETs MF1 to MF4 to switch either the high frequency signal or the addressing pulse from the row electrodes RE1 to REN. The connection of MOSFETs from MH1 to MHN is like a pair of alternating rows, RE1 to REN, which receive high frequency signals in antiphase. Such reverse fading reduces radiation. There are M (M = N / 2) pairs in each block from BL1 to BL4.
To give a numerical example, M = 60.

The electrodes RE1 to REN of each column form a capacitance C _row with the column electrodes CE1 to CEJ. The M pairs of alternating rows, RE1 to REN, which receive high frequency signals in antiphase in block BL1, are connected to each other. The capacitance in these pairs of rows resonates with the inductor L between lines LH1 and LH2 at a frequency f _hi higher than the frequency f _c . Dielectric L
Passively stores energy from the internal electrode capacitance of block BL1 and sends it back to the capacitance at high frequencies. Since the energy of the capacitance formed by the row electrode and the column electrode is not dissipated and is exchanged with the inductor L, the driver DR1 and hence the drive circuit DC show excellent efficiency.

FIG. 3 is a detailed view of the column driver DC1 for driving the column electrodes CE1 to CEJ. Here, the data passes from the inverter IC1 through the ICJ to the MOSFE.
Activates MA1 to MAJ of Ts and directly MOSF
Activate MB1 to MBJ of ETs. In general, certain MOSFETs, MA1 on a pixel in a column
It is when the MAJ is made transparent or glossy. In the preferred embodiment of the present invention, two or more voltage levels are applied to create several brightness levels.

Drivers DR1 and D in the drive circuit DC
An example of the operation of C1 is shown in FIG. The latter one is the block BL of the display DI1 in FIGS. 1 to 3.
One part and the sample voltage applied there at different times are shown. In the block portion of the display shown here, rows RE1 to RE3 and column CE1
To CE3 are targeted, pixels P11 to P33 are affected. The shaded areas represent activated pixels. The example shown here can be applied to any of three adjacent rows and three columns. Here, the data pulse drives columns CE1 to CE3. The addressing pulse, together with the high frequency signals on the lines LH1 and LH2 generated between the addressing pulses,
It occurs on the row electrodes RE1, RE2, RE3. While the inductor L retains the high frequency energy applied to the inner electrode capacitance (otherwise the inner electrode capacitance disappears), the high frequency signal significantly cancels out the crosstalk between pixels.

In FIGS. 2-4, the rows are similar to the passive addressing configuration, one selected at the same time. Similarly, column lines are driven with image data corresponding to the appropriate row. High frequency drive
It prevents each bit of data from trying to align the crystals between the electrodes and partially activates each pixel. The high frequency drive of the inactive row reduces the average alignment strength of the unselected pixels to a very small value.
In addition, the inductor L prevents energy loss due to conversion of high frequency voltage.

In another embodiment of the invention, pulses are provided to operate the pixels at selected row and column intersections, while a constant high frequency background
Reduces the effect of stray voltage on unselected pixels. The inductor L again reduces energy consumption and, like all other examples, enhances battery operation.

FIG. 5 is a detailed view of the high frequency source HF1 forming the pulse source of the pulsar PS1. The operation is shown in FIG. When the ringing of the resonator formed by the inductor L and the capacitance of the cell drop below a certain value, the source HF1 detects this and pulses the resonant circuit at the next peak of the ringing voltage. In this way, the frequency of the source HF1 follows the natural frequency of ringing in the resonant circuit consisting of the inductor L and the instantaneous capacitance of the cell.

In FIG. 5, the subtraction circuit SC1 has a line L
It receives the counter voltage appearing on H1 and LH2. because,
This is because the voltages of the line LH1 and the line LH2 oppose each other, and subtracting them results in addition of each. The output of the subtraction circuit is shown in FIG. To find the peak, the differentiator DF1 differentiates the voltage at the output of the circuit SC1. Therefore, at the peak of each output cycle of the circuit SC1, the voltage at the output of the differentiator DF1 passes through zero as shown in FIG. The comparison circuit CP1 compares 0 with the differential output of the differentiator DF1. It directs a logic high or one for 180 degrees when the derivative voltage is positive and a logic low or zero for 180 degrees when the derivative voltage is negative. The output of the comparison circuit CP1 is shown in FIG.

An edge triggered pulse generator with a reversing input produces a train of 1 pulses only during the transition from 1 to 0. This is only at the positive peak. (See FIG. 6.) These pulses appear at the input of the AND gate AN1. AND when possible
The gate AN1 triggers MF1 and MF of MOSFETs.
Act on 4. When possible, this causes the resonant circuit to pulse during positive peaks. Another edge trigger pulse generator PG2 is only during the transition from 0 to 1,
Create a train of one pulse. This is only during the negative peak. These pulses appear at the input of AND gate AN2. (See FIG. 6.) When possible, AND gate AN2 triggers MF1 and MF4 of MOSFETs.
To act on. When possible, this causes the resonant circuit to pulse during negative peaks.

The source HF1 enables the gates AN1 and AN2 only when the positive peak falls below the desired positive value and when the negative peak is more positive than the desired negative value. For this purpose, the comparison circuit CP2 compares the differential voltage from the circuit SC1 with the desired positive voltage V _d . Out CP2 in Figure 6
, A logic 1 when the input voltage exceeds the desired positive voltage. This indicates that the differential voltage LH1-LH2 is too high to request further enhancement. In this way, an indicator that is too positive appears at the turning input of the AND gate AN1 and disables the enhancement. Voltages below the desired voltage will be logic 0, enabling AND gate AN1. On the next trigger pulse from generator PG1, AND gate AN1 pulses MOSFETs MF1 and MF4 to trigger the resonant circuit.

The comparison circuit CP3 compares the differential voltage from the circuit SC1 with the desired positive voltage V _d . A logic 0 is provided when the input voltage is more negative than the desired negative voltage, as shown by the out CP3 line in FIG. This indicates that the differential voltage LH1-LH2 is too negative to request a pulse. Thus, a too negative 0 appears at the input of the AND gate AN2, making it impossible to pulse. A voltage above the desired negative voltage becomes logic 1 and A
Enables ND gate AN1. At the time of the next trigger pulse from the generator PG2 at the time of the next negative peak, A
The ND gate AN2 pulses the MOSFETs MF2 and MF3 to trigger the resonant circuit.

The pulses at MF1 and MF4 of MOSFETs appear across lines LH1 and LH2 when the positive peak does not reach the desired positive value. M
The pulses at MF2 and MF3 of the OSFETs are in the opposite direction during the negative peak, in lines LH1 and LH2.
Appear across. Each trigger produces ringing, the natural frequency of which changes with the instantaneous value of the capacitance presented in the row being driven by the driver DR1. When the natural frequency changes, the peak timing also changes. This is an automatic frequency control that changes the pulse timing to match the changing natural frequency.

The present invention also contemplates dual frequency operation which drives a display having a significant number of rows with acceptable power consumption. In the embodiment of the present invention,
Electrodes RE1 to REN of 480 rows are driven at both ends by the energy saving circuit shown in FIGS. In addition, power dissipation can be reduced by having the high frequency drive take more than one value. Figure 7
Shows a circuit that creates a 4-level drive. Here, the voltages V ₁ to V ₄ produce four levels. MO
High frequency control voltage in SFET, MF11 to MF1
8 most often produces the waveform shown in FIG.

In most cases the capacitance is dominated by the LCD in each block of the display DI1 itself. As an example, the row has a capacitance of 360 pf. The inductor L effectively saves energy so that the same current will flow from the capacitance of the LCD in each block of the display DI1 through the inductor and anywhere in the belly. Then, it returns to the block of the display DI1. M in series with pulsar PS1
The internal resistance R _SW of each MOSFET from H1 to MHN, the internal resistance R _r of the block of the display DI1, and the internal resistance R _{L of} the inductor L are consumed at the respective points to cause losses. When + b voltage is applied to the row,
The loss from M1 to MN of MOSFETS of FIG.
Assuming these only work once per frame,
It is so low that it can be ignored. MOSFETS M ₁₁ to M ₁₄ are
It operates every cycle of f _hi . However, they are only used to supply the small amount of power that is dissipated in the other components. The losses in these devices are small compared to the total disappearance. Only four such resistors act as a chip driving hundreds of lines. Thus, many electrical circuits can be used to operate these resistors in the most effective way possible.

The present invention thus provides an energy feedback electrical circuit that drives the electrodes through an LC oscillator. A considerable amount of energy savings is achieved in this way.
Resistance R _sw and LCD row resistance (R _row = р _ITO □ 1 _r
N / L _C ), ITO resistance per square р _ITO □
= 2Ω / □ (about 0.5 μm in thickness), and R _{ro w} = 13
It becomes 00Ω. The inductor has a resistance R _L and is induced by its inductance and value. LCD display DI with a sample capacitance C _{row of} 360 pf
The inductance required to resonate with the capacitance of block BL1 of 1 is:

[0027]

[Equation 2] Therefore, the two LCD rows are electrically connected to the resonance circuit. In M = 60, i.e., the inductance in the number of electrode pairs in the block, a 4.7x10 ^{over 6} H, is the most small value to perform the drive.

In the preferred embodiment of the present invention, the inductor L1 is a toroid inductor. In the practice of the present invention, the factor of 5 and just 10 in the above implementation of dual frequency addressing to bring the driver power below watts,
It was calculated that the drive power could be reduced considerably.
The present invention achieves its results by utilizing the frequency response of liquid crystals. Liquid crystals are useful for displays. Because its structure can be affected by the limited electric field. The "manipulation" of circulating a molecule in a field is the anisotropic dielectric constant of the molecule. Anisotropy is due to the geometry of the molecules and their intrinsic dipole moments.

End-to-end reversal of molecules generally occurs frequently on the nanosecond to microsecond time scale, albeit at a picosecond timescale rate of molecular vibration. An electric field applied at low frequencies changes the relative population of molecules that exhibit parallel and antiparallel positions to the applied field. Molecules tend to orient to cancel the applied field, resulting in a large dielectric constant. At higher frequencies compared to typical inversion rates, the molecules cannot reorient in one period of the electric field, and the dielectric constant is usually low. In addition, weak dielectric relaxation is observed in many liquid crystals resulting from reorientation of molecular subunits. Dielectric anisotropy (δε), defined as the difference in permittivity along the direction parallel and perpendicular to the long axis of liquid crystal molecules
Is a crossover frequency f _c that is generally close to the molecular inversion rate.
When the drive frequency goes up, change the sign. When microparticles are driven below f _c, tend to align parallel to the drive field, when driven above f _c,
It tends to align vertically to the drive field. Therefore, the application of the high frequency drive voltage can counter the effect of the stray voltage on the unselected pixels.

In the present invention, the high frequency drive components can be fed several times while f _c varies with the liquid crystal mix design.
_c . The crossover frequency f _c has a very strong temperature dependency, and the f _c value varies from 0 ° C. to 40 ° C.
As the temperature changes to ° C, it changes from several kilohertz to 100 kilohertz. Generally, 50KHz to 100KH
Drive frequencies around z have been used in the past, but this became a problem. Because energy is dissipated in the process of charging and discharging capacitance across the liquid crystal,
This is because this power is proportional to the drive frequency. As described above, in the past, the execution of the dual-frequency drive configuration has always been accompanied by the trade-off condition between the operable temperature range and the power dissipation. 300 driven at 1MHz at 10Vp-p
1000 with typical capacitance of pf / row
For a cm ² panel, the energy loss when charging the capacitance can reach up to 3.3 W, abandoning traditional dual frequency drive structures that are not suitable for battery power applications. The present invention reduces energy loss by storing energy from the internal electrode capacitance in the inductor.

The present invention reduces the average alignment strength of unselected pixels to a desired level of fineness by applying a high frequency drive to the inactive row, avoiding the losses caused by high frequency operation with an inductor. To do. In the illustrated embodiment, the number of different voltage levels produced by the drive circuit is minimized. This is the simplest, “live” approach. However, with high power consumption.

In another embodiment of the invention, a more complex drive arrangement, similar to the typical optimum amplitude single frequency passive LCD drive, is utilized. In the example shown here, the inactive row is ± a at high frequencies.
Rows driven and operating in between are set to b. The column is set to c (not selected) or -c (selected). The arrayed dual frequency drive increases contrast at the expense of increased power consumption, which is potentially very important for STN liquid crystal displays. The best STN in this configuration is not as close to bistable as in a regular display. So this display is
It is less sensitive to changes in cell gap than a normal STN display and allows good gray scale.

In this embodiment, the recovery torque used by the high frequency drive also solves the low speed problem of conventional STN displays. The energy savings of the present invention also allow the high frequency drive voltage to operate in the megahertz range. For most normal STNs,
This is a sufficiently high band. Sources other than the type shown in FIG. 5 can also be used to trigger and maintain ringing at the natural frequency of the resonant circuit. The source and its operation shown here are examples. Although the embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that the present invention can be embodied by other methods without departing from the scope of the present invention.

【The invention's effect】 [Brief description of drawings]

FIG. 1 is a schematic diagram of a computer with a display embodying features of the present invention.

2 is a partial block diagram and partial detailed view of the apparatus of FIG. 1. FIG.

3 is a partial block diagram and a partial detailed view of the apparatus of FIG.

FIG. 4 is a table showing a concrete operation of a voltage in the circuits of FIGS. 2 and 3 and an operation effect of the device of FIG.

5 is a detailed chart of the pulse generator in FIGS. 2 and 3. FIG.

FIG. 6 is a flowchart showing an operation of the pulse generator in FIGS. 2 and 3.

FIG. 7 is a schematic diagram showing a high frequency generator of the circuit of FIG.

FIG. 8 is a sample diagram of drive waveforms generated by using the generator of FIG. 7 in the circuit of FIG.

[Explanation of symbols]

 CO1 computer KB1 keyboard PR1 processor DI1 liquid crystal display

Front Page Continuation (72) Inventor Gregory Peter Kochanski United States 08812 New Jersey, Duneren, Third Street 324 (72) Inventor Apollo Wong United States 07922 New Jersey, Berkeley Heights, Lancelot Drive 40

Claims (32)

[Claims] 1. A step of selectively operating each operation signal in a row and a column of electrodes arranged in rows and columns on a substrate sandwiching a liquid crystal in a first frequency range, and higher than a first frequency A liquid crystal comprising: selectively activating an auxiliary signal to the electrode row at a second frequency range; and storing energy from the capacitance represented by the row at the second frequency. Display way. 2. The method of claim 1, wherein the energy storage step is performed by an inductor that operates at a resonance frequency together with a capacitance. 3. The method of a liquid crystal display according to claim 1, wherein the energy storage step is performed by an inductor operating at a resonance frequency together with a capacitance of a majority of the row. 4. The method of a liquid crystal display according to claim 1, wherein the first frequency is in the range of 5 KHz to 40 KHz. 5. The method according to claim 2, wherein the first frequency is in the range of 5 KHz to 40 KHz. 6. The method according to claim 3, wherein the first frequency is in the range of 5 KHz to 40 KHz. 7. The first frequency is 10 KHz to 20 KHz
The method for a liquid crystal display according to claim 1, wherein: 8. The second frequency is 0.5 MHz to 3 MHz.
The method for a liquid crystal display according to claim 1, wherein: 9. The second frequency is 0.5 MHz to 3 MHz.
The method for a liquid crystal display according to claim 3, wherein 10. The second frequency is 0.5 MHz to 3 MH
The method of a liquid crystal display according to claim 4, characterized in that it is in the range of z. 11. The second frequency ranges from 0.75 MHz to 1.
The method of a liquid crystal display according to claim 1, characterized in that it is in the range of 25 MHz. 12. The method of a liquid crystal display according to claim 1, wherein the second frequency is 1 MHz. 13. The method of a liquid crystal display of claim 2, wherein the second frequency is created by a ringing signal near the resonant frequency of the inductor and the row. 14. The method of a liquid crystal display according to claim 3, wherein the second frequency is created by a ringing signal close to a resonant frequency of the inductor and the row. 15. The second frequency changes as the capacitance of the row changes.
Liquid crystal display method described. 16. The second frequency changes when the capacitance of the row changes.
Liquid crystal display method described. 17. A sandwich-like liquid crystal having a plurality of rows and columns of electrodes, a row having capacitance, and a set of sources for selecting signals in a first frequency range connected to the rows and columns. And an energy storage device in energy exchange relationship with the auxiliary source of the auxiliary signal coupled to the row in a frequency range higher than the first frequency range and coupled to the capacitance represented by the row at high frequencies. A method for a liquid crystal display, comprising: 18. The method of a liquid crystal display in a device according to claim 17, wherein the energy storage device comprises an inductor. 19. The method of a liquid crystal display in an apparatus of claim 17, wherein the energy storage device has an inductor in energy exchange relationship with the plurality of rows. 20. The method of a liquid crystal display in a device according to claim 17, wherein the first frequency band in the set of sources is in the range of 5 KHz to 40 KHz. 21. The method of a liquid crystal display in a device according to claim 18, wherein the first frequency range in the set of sources is in the range of 5 KHz to 40 KHz. 22. The method of a liquid crystal display in a device according to claim 17, wherein the first frequency band in the set of sources has a range of 10 KHz to 20 KHz. 23. The frequency of the auxiliary signal has a range of 0.5 MHz to 3 MHz.
Method of liquid crystal display in the described device. 24. The frequency of the auxiliary signal has a range of 0.5 MHz to 3 MHz.
Method of liquid crystal display in the described device. 25. The frequency of the auxiliary signal has a range of 0.5 MHz to 3 MHz.
Method of liquid crystal display in the described device. 26. The frequency of the auxiliary signal is 0.75 MHz
20. The method of a liquid crystal display in a device according to claim 19, having a range from 1 to 1.25 MHz. 27. The method of a liquid crystal display in a device according to claim 17, wherein the frequency of the auxiliary signal is 1 MHz. 28. The method of a liquid crystal display in a device according to claim 17, wherein the auxiliary source is a ringing generator close to the resonant frequencies of the inductor and the row. 29. The method of a liquid crystal display in a device according to claim 20, wherein the auxiliary source is a ringing generator near the resonant frequencies of the inductor and the plurality of rows. 30. The auxiliary source is variable with respect to the storage method and the resonant frequency of the capacitance and exhibits a feedback response when the capacitance of the row changes. Method of liquid crystal display in other devices. 31. The auxiliary source is variable with respect to the storage method and the resonant frequency of the capacitance and exhibits a feedback response as the capacitance of the row changes. Method of liquid crystal display in other devices. 32. The method of a liquid crystal display in a device according to claim 17, wherein the sandwich liquid crystal is an STN liquid crystal.