JPH0860359A - Production of semiconductor thin film having chalcopyrite structure - Google Patents

Production of semiconductor thin film having chalcopyrite structure

Info

Publication number
JPH0860359A
JPH0860359A JP6199418A JP19941894A JPH0860359A JP H0860359 A JPH0860359 A JP H0860359A JP 6199418 A JP6199418 A JP 6199418A JP 19941894 A JP19941894 A JP 19941894A JP H0860359 A JPH0860359 A JP H0860359A
Authority
JP
Japan
Prior art keywords
substrate
thin film
semiconductor thin
chalcopyrite structure
structure semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6199418A
Other languages
Japanese (ja)
Inventor
Naoki Obara
直樹 小原
Takahiro Wada
隆博 和田
Mikihiko Nishitani
幹彦 西谷
Takayuki Negami
卓之 根上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6199418A priority Critical patent/JPH0860359A/en
Publication of JPH0860359A publication Critical patent/JPH0860359A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/541CuInSe2 material PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Physical Vapour Deposition (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE: To provide a method for producing chalcopyrite thin films which have a good adhesion property to lower electrodes, are easily controlled in compsn. and have good crystallinity. CONSTITUTION: A substrate 3 is heated from its front surface at the time of depositing the semiconductor thin films having the chalcopyrite structure on the substrate 3. The substrate temp. is suppressed to <=500 deg.C by a substrate heater 2 from the rear side of the substrate and further, the substrate surface temp. is kept at >=500 deg.C by heating the substrate with an IR heater 15, an IR laser 16, etc., from the front surface side of the substrate, by which the semiconductor thin films having the chalcopyrite structure having the excellent crystallinity are formed without generating distortion in the substrate. The ratios of the cross diffusion between the group I elements and between the group III and VI elements are controlled while the substrate temp. is controlled by changing the heating temp. linearly or stepwise from the front surface side of the substrate in these thin films. At this time, a dielectric substance or metal coated with metal having the value approximate to the coefft. of thermal expansion of the chalcopyrite thin films is used for the substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高効率の薄膜太陽電池
の構成とその製造プロセスに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high efficiency thin film solar cell structure and its manufacturing process.

【0002】[0002]

【従来の技術】太陽電池の吸収層として用いられるI
族、III族、VI族からなるカルコパイライト型化合物半
導体薄膜は光吸収係数が大きく、太陽電池を構成するの
に有利な材料である。
2. Description of the Related Art I used as an absorption layer for solar cells
A chalcopyrite type compound semiconductor thin film made of Group III, Group III or Group VI has a large light absorption coefficient and is an advantageous material for forming a solar cell.

【0003】このカルコパイライト薄膜を作製する場
合、例えばCuInSe2を作成する場合は、I族である
Cu過剰のカルコパイライト薄膜を形成した後、III族
であるIn過剰のカルコパイライト層を前記薄膜上に形
成することによって結晶粒径が大きく、さらにCu2-X
Se等の異相化合物を析出させない二重層カルコパイラ
イト薄膜形成方法により作製する。この2層構造のカル
コパイライト薄膜層を形成するとき、基板の熱膨張係数
がカルコパイライト薄膜の熱膨張係数に近い値を持つ基
板を用いることによって基板温度を500℃以上に設定
できるようになり、結晶粒径が2μm以上でしかも下部
電極との密着性に優れたとカルコパイライト薄膜が得ら
れる。
In the case of producing this chalcopyrite thin film, for example, in the case of producing CuInSe 2, after forming a group I Cu-excessive chalcopyrite thin film, a group III In-excessive chalcopyrite layer is formed on the thin film. Has a large crystal grain size, and Cu 2-X
It is prepared by a double layer chalcopyrite thin film forming method that does not precipitate a heterophase compound such as Se. When the chalcopyrite thin film layer having the two-layer structure is formed, the substrate temperature can be set to 500 ° C. or higher by using a substrate whose coefficient of thermal expansion is close to that of the chalcopyrite thin film. A chalcopyrite thin film is obtained when the crystal grain size is 2 μm or more and the adhesion to the lower electrode is excellent.

【0004】[0004]

【発明が解決しようとする課題】上記二重層カルコパイ
ライト薄膜を形成する場合、基板温度が高いほどカルコ
パイライト薄膜の粒径が大きくなり結晶性が良くなるた
め、光を吸収する能力が高まる。しかし、基板を500
℃以上に加熱するとその熱膨張により基板にかなりの応
力がかかることとなる。実際、急激な熱膨張のため基板
に歪が生じたり、基板あるいは下部電極に亀裂が入る現
象が起こったり、この応力によりカルコパイライト薄膜
が剥離したりする。
In the case of forming the above-mentioned double-layer chalcopyrite thin film, the higher the substrate temperature, the larger the grain size of the chalcopyrite thin film and the better the crystallinity, so that the ability to absorb light is enhanced. However, the substrate
When heated to above ℃, the thermal expansion causes a considerable stress on the substrate. In fact, the substrate may be distorted due to the rapid thermal expansion, a crack may occur in the substrate or the lower electrode, and the stress may cause the chalcopyrite thin film to peel off.

【0005】また、従来は基板裏側からの基板加熱方法
であり、例えばCu(In、Ga)Se2等の固溶体を
作製する場合において、基板温度によりInとGaの膜
厚方向に対する分布の制御は考えられていなかった。
The conventional method is to heat the substrate from the back side of the substrate. For example, when a solid solution such as Cu (In, Ga) Se 2 is prepared, the distribution of In and Ga in the film thickness direction can be controlled by the substrate temperature. I wasn't thinking.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
に、本発明は、I族III族VI族元素からなるカルコパイラ
イト構造半導体薄膜を500℃以上の基板温度で堆積す
る際に、基板表面側から基板を加熱することによって半
導体薄膜を形成する方法をとる。
In order to solve the above-mentioned problems, the present invention provides a substrate surface when a chalcopyrite structure semiconductor thin film made of a group I III group VI element is deposited at a substrate temperature of 500 ° C. or higher. A semiconductor thin film is formed by heating the substrate from the side.

【0007】また、I族III族VI族元素からなるカルコパ
イライト構造半導体薄膜を形成中に直線的あるいは段階
的に基板の加熱温度を変えることにより基板温度の制御
を行いながらカルコパイライト構造半導体薄膜を形成す
る。
Further, the chalcopyrite structure semiconductor thin film is formed while controlling the substrate temperature by changing the heating temperature of the substrate linearly or stepwise during formation of the chalcopyrite structure semiconductor thin film composed of the group I group III group VI element. Form.

【0008】[0008]

【作用】上記の手段により、基板に損傷を与えることな
く、しかも基板と下部電極との密着性を保持したまま結
晶性の優れたカルコパイライト薄膜を得られる。また、
基板表面側からの加熱により基板表面温度の制御性に優
れ、さらにI族、III族、VI族元素間の相互拡散の割合を
制御することが可能であり、太陽光を吸収するのに最適
なバンドギャッププロファイルを設計できる。
By the above means, a chalcopyrite thin film having excellent crystallinity can be obtained without damaging the substrate and maintaining the adhesion between the substrate and the lower electrode. Also,
It has excellent controllability of the substrate surface temperature by heating from the substrate surface side, and it is also possible to control the ratio of interdiffusion between group I, group III, and group VI elements, making it ideal for absorbing sunlight. Can design bandgap profiles.

【0009】[0009]

【実施例】【Example】

(実施例1)以下、本発明の第1の実施例について図
1、図2に基づき説明する。
(Embodiment 1) A first embodiment of the present invention will be described below with reference to FIGS.

【0010】図1は、スパッタ装置の真空容器の概略図
である。以下、カルコパイライト薄膜の作製方法につい
て説明する。
FIG. 1 is a schematic view of a vacuum container of a sputtering apparatus. Hereinafter, a method for producing the chalcopyrite thin film will be described.

【0011】基板3には熱膨張係数80×10-7/℃の
ソ−ダライムガラスを用いた。このガラス基板3上に、
RFスパッタ法によりMo膜を堆積し、さらに前記Mo
上にCuInSe2薄膜を以下に示すように堆積させ
た。
For the substrate 3, soda lime glass having a thermal expansion coefficient of 80 × 10 -7 / ° C. was used. On this glass substrate 3,
A Mo film is deposited by the RF sputtering method, and
A CuInSe 2 thin film was deposited on top as shown below.

【0012】真空容器1内部にCuInSe2の主成分
であるCuの蒸着源7とInの蒸着源8とSe9の蒸着
源を用意し、真空度約10-7torrのもとで、Cu、I
n、Seの蒸着源ルツボの温度をそれぞれ1220℃、
850℃〜900℃、180℃に熱し、各元素を蒸発さ
せる。また、前記真空容器1は赤外線ヒ−タ15と赤外
線レ−ザ16を装備している。CuInSe2薄膜は、
Cu過剰膜上にIn過剰膜を堆積した2層構造である。
1層目のCu過剰膜の基板温度は500℃一定とする。
この時基板の加熱は基板裏側からのヒ−タ−2のみの加
熱とする。
Inside the vacuum vessel 1, a Cu vapor deposition source 7 which is the main component of CuInSe 2, an In vapor deposition source 8 and an Se 9 vapor deposition source are prepared, and under the vacuum degree of about 10 −7 torr, Cu, I
n, Se vapor deposition source crucible temperature of 1220 ℃,
Each element is evaporated by heating at 850 ° C to 900 ° C and 180 ° C. The vacuum container 1 is equipped with an infrared heater 15 and an infrared laser 16. CuInSe 2 thin film is
It has a two-layer structure in which an In excess film is deposited on a Cu excess film.
The substrate temperature of the Cu excess film of the first layer is kept constant at 500 ° C.
At this time, the substrate is heated by heating only the heater-2 from the back side of the substrate.

【0013】このCu過剰膜を約2μm蒸着する。この
Cu過剰膜の組成比は約Cu/In=1.0〜1.2で
ある。次に2層目のIn過剰膜を作製するために、Cu
とSeの分子線強度はCu過剰膜と同じ値に保持し、I
nの分子線強度が増加するようにKセル温度を上昇させ
る。この時、同時に基板温度も525℃まで上昇させ
る。基板加熱は基板裏側からのヒ−タ−2と赤外線ヒ−
タ15による輻射の2通りとする。その後In過剰膜を
堆積し、最終的な組成がCu/In=0.8〜0.9に
なるようIn過剰膜を制御する。
This Cu excess film is vapor-deposited to a thickness of about 2 μm. The composition ratio of the Cu excess film is about Cu / In = 1.0 to 1.2. Next, in order to produce a second layer of In-rich film, Cu
The molecular beam intensities of and Se are kept at the same values as those of the Cu excess film,
The K cell temperature is raised so that the molecular beam intensity of n increases. At this time, the substrate temperature is also raised to 525 ° C. at the same time. The board is heated from the backside of the board by a heater-2 and infrared heater.
There are two types of radiation from the data 15. After that, an In excess film is deposited, and the In excess film is controlled so that the final composition is Cu / In = 0.8 to 0.9.

【0014】また、基板温度の測定は真空容器下部に真
空ガラス窓5を設け、赤外線放射温度計6によって基板
表面温度を測定している。
For measuring the substrate temperature, a vacuum glass window 5 is provided in the lower part of the vacuum container, and the substrate surface temperature is measured by an infrared radiation thermometer 6.

【0015】Cu過剰膜の上にIn過剰膜を作製する際
の25℃の基板温度の昇温を、基板裏側のヒ−タから5
℃/minの割合で昇温した場合と、基板表面からヒ−
タの輻射熱により同じく5℃/minの割合で昇温した
場合における基板表面温度の変化を図2に示す。
When the In-excess film is formed on the Cu-excess film, the substrate temperature is raised by 25 ° C. from the heater on the backside of the substrate to 5
When the temperature is raised at a rate of
FIG. 2 shows the change in the substrate surface temperature when the temperature is raised at a rate of 5 ° C./min by the radiant heat of the substrate.

【0016】図2に示されているように、基板裏側から
のヒ−タの加熱による基板温度の昇温は、指数関数的な
昇温過程である。それに対し基板表面側からのヒ−タの
輻射熱による昇温は、一定の割合で昇温する緩やかな昇
温過程である。
As shown in FIG. 2, the heating of the substrate temperature by heating the heater from the back side of the substrate is an exponential heating process. On the other hand, the temperature rise by the radiant heat of the heater from the substrate surface side is a gradual temperature rise process in which the temperature rises at a constant rate.

【0017】また、これらの基板を100℃以下に冷却
して真空容器内から取り出したところ、基板裏側からヒ
−タで加熱した基板は歪が生じているのに対し、基板表
面側からのヒ−タの輻射熱によって昇温した基板には歪
がみられなかった。これら基板の上に堆積したCuIn
Se2薄膜と下部電極との密着性を調べるためにメンデ
ィングテ−プによる引き剥し試験を行ったところ、基板
裏側からヒ−タで加熱した基板からはCuInSe2
膜が少し剥離しているのに対し、基板表面側からのヒ−
タの輻射熱によって昇温した基板からは目立ったような
剥離はなく、密着性にも優れていることがわかった。
Further, when these substrates were cooled to 100 ° C. or lower and taken out from the vacuum container, the substrate heated by the heater from the back side of the substrate was distorted, while the substrate from the front side was heated. -No distortion was observed on the substrate heated by the radiant heat of the electrode. CuIn deposited on these substrates
A peeling test using a mending tape was conducted to examine the adhesion between the Se 2 thin film and the lower electrode, but the CuInSe 2 thin film was slightly peeled from the substrate heated with a heater from the backside of the substrate. , From the front side of the board
It was found that there was no noticeable peeling from the substrate whose temperature was raised by the radiant heat of the wafer, and the adhesiveness was excellent.

【0018】以下に、基板表面側からヒ−タの輻射熱を
使って基板の昇温を行ったときの基板温度に対する、そ
れによって得られたカルコパイライト薄膜を用いて作製
した太陽電池の特性値を示す。太陽電池の構成は、ガラ
スの上にMo、CuInSe 2、CdS、ZnO、IT
Oの順に堆積している。CdSは化学溶液析出法によ
り、ZnO、ITOはRFマグネトロンスパッタ装置に
より形成している。
Below, the radiant heat of the heater from the substrate surface side
The temperature of the board when the temperature of the board is raised using
Fabrication using the chalcopyrite thin film obtained by this
The characteristic value of the solar cell is shown. The structure of the solar cell is
Mo, CuInSe on top 2, CdS, ZnO, IT
O is deposited in this order. CdS is a chemical solution deposition method.
ZnO and ITO are used in RF magnetron sputtering equipment.
More formed.

【0019】また、基板の昇温は500℃までを基板裏
側からのヒ−タによる加熱とし、500℃以上の昇温は
基板表面側からのヒ−タの輻射熱によるものとした。
The temperature of the substrate was raised up to 500 ° C. by heating with a heater from the back side of the substrate, and the temperature of 500 ° C. or higher was radiated by the heater from the front side of the substrate.

【0020】[0020]

【表1】 [Table 1]

【0021】(表1)よりわかるよう、1層目と2層目
の基板温度がそれぞれ525℃と550℃である太陽電
池において最も高い変換効率を得られた。2層目の基板
温度が575℃以上ではCuInSe2薄膜の剥離によ
り太陽電池を作製できなかった。さらに基板の歪も生じ
ていたが、550℃以下の温度では歪は生じていなかっ
た。
As can be seen from (Table 1), the highest conversion efficiency was obtained in the solar cells in which the substrate temperatures of the first and second layers were 525 ° C. and 550 ° C., respectively. When the substrate temperature of the second layer was 575 ° C. or higher, the solar cell could not be manufactured due to the peeling of the CuInSe 2 thin film. Further, the substrate was distorted, but the strain was not generated at a temperature of 550 ° C. or lower.

【0022】また、(表1)より基板温度が高い方が開
放電圧値が高いことがわかる。従って、基板表面側から
の基板加熱より基板が歪むこと無く、しかも結晶性の優
れたCuInSe2薄膜を作製できた。
Further, it can be seen from Table 1 that the higher the substrate temperature, the higher the open circuit voltage value. Therefore, a CuInSe 2 thin film having excellent crystallinity could be produced without the substrate being distorted by heating the substrate from the surface side.

【0023】同様な結果はI族元素にAg10を、III族
元素にGa11あるいはAl12を、IV族元素にS13
あるいはTe14をそれぞれ用いた場合においても、あ
るいはそれらの混晶を用いた場合においても得られた。
Similar results show that the group I element is Ag10, the group III element is Ga11 or Al12, and the group IV element is S13.
Alternatively, it was obtained when Te14 was used, respectively, or when a mixed crystal thereof was used.

【0024】さらに、基板表面側からの基板加熱はレ−
ザ16においても可能である。 (実施例2)次に第2の実施例として、1層目と2層目
にそれぞれCuとGaの合金薄膜とCuとInの合金薄
膜を堆積した薄膜を真空容器1内で作製した。それぞれ
の膜厚は1μmである。この合金薄膜をSe雰囲気中基
板温度400℃で30分間熱処理を行った。同時に、基
板表面側からも赤外線ヒ−タを用いて基板温度を上げる
ことも行った。基板温度の昇温は、基板表面側からのヒ
−タの輻射熱により0.5℃/minと1℃/minの
割合で行った。
Further, the heating of the substrate from the substrate surface side is delayed.
It is also possible in The 16. (Example 2) Next, as a second example, a thin film in which an alloy thin film of Cu and Ga and an alloy thin film of Cu and In were deposited on the first layer and the second layer, respectively, was prepared in the vacuum container 1. Each film thickness is 1 μm. This alloy thin film was heat-treated in a Se atmosphere at a substrate temperature of 400 ° C. for 30 minutes. At the same time, the substrate temperature was also increased from the substrate surface side using an infrared heater. The substrate temperature was raised at a rate of 0.5 ° C./min and 1 ° C./min by the radiant heat of the heater from the substrate surface side.

【0025】オ−ジェ電子分光法(AES)による、そ
れぞれの薄膜における深さ方向に対するGaとInの分
布の様子を図3、4に示す。
FIGS. 3 and 4 show the distribution of Ga and In in the depth direction of each thin film by Auger electron spectroscopy (AES).

【0026】図3、4より、膜の深さ方向に対してGa
とInの分布の様子が異なっていることがわかる。基板
表面側からのヒ−タの輻射熱による基板加熱昇温が0.
5℃/minの場合では、膜中深さ方向に対して基板側
にGaが多く分布しているが、膜の表面側にはInが多
く分布している。
From FIGS. 3 and 4, Ga is measured in the depth direction of the film.
It can be seen that the distribution states of In and In are different. The substrate heating temperature rise due to the radiant heat of the heater from the substrate surface side is 0.
In the case of 5 ° C./min, a large amount of Ga is distributed on the substrate side with respect to the depth direction in the film, but a large amount of In is distributed on the surface side of the film.

【0027】ところが基板加熱昇温が0.5℃/min
に比べて1℃/minでは、膜中深さ方向に対してGa
とInの分布がより均一に分布している。すなわち、基
板温度が高くなればGaとInの相互拡散の割合が大き
くなる。
However, the substrate heating temperature rise is 0.5 ° C./min.
At 1 ° C./min, compared to Ga in the depth direction in the film,
The distributions of In and In are more evenly distributed. That is, the higher the substrate temperature, the greater the ratio of Ga and In interdiffusion.

【0028】従って、基板表面側からの基板加熱の温度
の変化によってIII族元素間の相互拡散の割合を制御す
ることが可能であり、バンドギャッププロファイルの設
定に有効である。
Therefore, it is possible to control the mutual diffusion ratio between the group III elements by changing the temperature of the substrate heating from the substrate surface side, which is effective for setting the band gap profile.

【0029】このほか、CuInSe2だけでなくA
g、Ga、Al、S、Te等の元素によるカルコパイラ
イト構造半導体薄膜においても形成が可能である。
In addition to CuInSe 2 , A
It can also be formed in a chalcopyrite structure semiconductor thin film made of an element such as g, Ga, Al, S or Te.

【0030】以上、カルコパイライト構造半導体薄膜を
基板上に堆積する場合において、基板裏側から基板加熱
ヒ−タにより基板温度を500℃以下におさえながら基
板表面側から加熱することにより、基板表面温度を50
0℃以上にすることによって基板に歪が生じることな
く、結晶性の優れたカルコパイライト構造半導体薄膜を
形成できた。
As described above, when the chalcopyrite structure semiconductor thin film is deposited on the substrate, the substrate surface temperature is controlled by heating the substrate surface side from the substrate backside while keeping the substrate temperature at 500 ° C. or less by the substrate heating heater. Fifty
By setting the temperature to 0 ° C. or more, a chalcopyrite structure semiconductor thin film having excellent crystallinity could be formed without distortion of the substrate.

【0031】また、カルコパイライト構造半導体薄膜を
形成中に基板表面側から加熱温度を変えることにより、
基板温度の制御を行いながらI族元素間およびIII族、IV
族元素間の相互拡散の割合を制御を可能とできる。
By changing the heating temperature from the substrate surface side during formation of the chalcopyrite structure semiconductor thin film,
Controlling the substrate temperature while controlling group I elements and groups III and IV
It is possible to control the rate of mutual diffusion between group elements.

【0032】[0032]

【発明の効果】本発明により、基板の損傷を起こすこと
無く、かつ下部電極との密着性に優れた結晶性の良いカ
ルコパイライト薄膜を作製することができ、さらに太陽
光吸収層のカルコパイライト薄膜によるバンドギャップ
プロファイルの制御を可能にし、これによりカルコパイ
ライト薄膜を用いた太陽電池の高効率化が図れる。
According to the present invention, it is possible to produce a chalcopyrite thin film having good crystallinity and excellent adhesion to the lower electrode without causing damage to the substrate, and further, the chalcopyrite thin film of the solar light absorbing layer. It becomes possible to control the bandgap profile by using, and thereby the efficiency of the solar cell using the chalcopyrite thin film can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】カルコパイライト薄膜形成装置を示す図FIG. 1 is a view showing a chalcopyrite thin film forming apparatus.

【図2】カルコパイライト薄膜形成時における昇温時間
に対する基板表面温度の変化を示す図
FIG. 2 is a diagram showing changes in the substrate surface temperature with respect to the temperature rise time when forming a chalcopyrite thin film.

【図3】基板温度を400℃から0.5℃/minで昇
温したときのカルコパイライト薄膜形成時における膜中
深さ方向に対するGaとInの分布図
FIG. 3 is a Ga and In distribution diagram in the depth direction of the film during formation of a chalcopyrite thin film when the substrate temperature is increased from 400 ° C. to 0.5 ° C./min.

【図4】基板温度を400℃から1℃/minで昇温し
たときのカルコパイライト薄膜形成時における膜中深さ
方向に対するGaとInの分布図
FIG. 4 is a Ga and In distribution diagram in the depth direction of the film during formation of a chalcopyrite thin film when the substrate temperature is raised from 400 ° C. at 1 ° C./min.

【符号の説明】[Explanation of symbols]

1 真空容器 2 基板ヒ−タ 3 基板 4 排気口 5 真空窓 6 放射温度計 7 Cu源 8 In源 9 Se源 10 Ag源 11 Ga源 12 Al源 13 S源 14 Te源 15 赤外線ヒ−タ 16 赤外線レ−ザ 17 基板裏側から昇温した場合の基板温度の変化 19 基板表面側から昇温した場合の基板温度の変化 20 基板昇温0.5℃/minにおけるGaの膜中深
さ方向に対する分布 21 基板昇温0.5℃/minにおけるInの膜中深
さ方向に対する分布 22 基板昇温1℃/minにおけるGaの膜中深さ方
向に対する分布 23 基板昇温1℃/minにおけるInの膜中深さ方
向に対する分布
1 Vacuum Container 2 Substrate Heater 3 Substrate 4 Exhaust Port 5 Vacuum Window 6 Radiation Thermometer 7 Cu Source 8 In Source 9 Se Source 10 Ag Source 11 Ga Source 12 Al Source 13 S Source 14 Te Source 15 Infrared Heater 16 Infrared laser 17 Change in substrate temperature when the temperature is raised from the back side of the substrate 19 Change in substrate temperature when the temperature is raised from the front side of the substrate 20 Ga relative to the depth direction of Ga at a temperature increase of 0.5 ° C / min Distribution 21 Distribution of In at the substrate temperature rise of 0.5 ° C./min in the depth direction of the film 22 Distribution of Ga at the substrate temperature rise of 1 ° C./min in the depth direction of the film 23 In of In at the substrate temperature rise of 1 ° C./min Distribution in the depth direction in the film

───────────────────────────────────────────────────── フロントページの続き (72)発明者 根上 卓之 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takuyuki Negami 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (12)

【特許請求の範囲】[Claims] 【請求項1】カルコパイライト構造半導体薄膜を基板上
に堆積する工程において、基板の表面側から加熱し薄膜
を堆積させることを特徴とするカルコパイライト構造半
導体薄膜の製造方法。
1. A method for producing a chalcopyrite structure semiconductor thin film, characterized in that, in the step of depositing a chalcopyrite structure semiconductor thin film on a substrate, the thin film is deposited by heating from the front surface side of the substrate.
【請求項2】同時に基板裏側を加熱することを特徴とす
る請求項1記載のカルコパイライト構造半導体薄膜の製
造方法。
2. The method for producing a chalcopyrite structure semiconductor thin film according to claim 1, wherein the back side of the substrate is heated at the same time.
【請求項3】カルコパイライト構造半導体薄膜の堆積工
程時、基板表面側からの加熱温度あるいは加熱時間のう
ち少なくとも1つを変化させることにより、基板温度を
直線的あるいは段階的に加熱することを特徴とする請求
項1または2記載のカルコパイライト構造半導体薄膜の
製造方法。
3. The substrate temperature is linearly or stepwise heated by changing at least one of the heating temperature and the heating time from the substrate surface side during the deposition process of the chalcopyrite structure semiconductor thin film. The method for producing a chalcopyrite structure semiconductor thin film according to claim 1 or 2.
【請求項4】基板温度を500℃以上に保持し加熱する
ことを特徴とする請求項1〜3のいずれかに記載のカル
コパイライト構造半導体薄膜の製造方法。
4. The method for producing a chalcopyrite structure semiconductor thin film according to claim 1, wherein the substrate temperature is maintained at 500 ° C. or higher and heated.
【請求項5】基板裏側からの加熱により基板温度を50
0℃以下に保持し、基板表面側からの加熱により基板温
度を500℃以上に保持することを特徴とする請求項4
記載のカルコパイライト構造半導体薄膜の製造方法。
5. The substrate temperature is controlled to 50 by heating from the back side of the substrate.
5. The substrate temperature is kept at 0 ° C. or lower, and the substrate temperature is kept at 500 ° C. or higher by heating from the substrate surface side.
A method for producing the chalcopyrite structure semiconductor thin film described.
【請求項6】輻射熱により基板表面を加熱することを特
徴とする請求項1記載のカルコパイライト構造半導体薄
膜の製造方法。
6. The method for producing a chalcopyrite structure semiconductor thin film according to claim 1, wherein the substrate surface is heated by radiant heat.
【請求項7】ヒ−タあるいはレ−ザ光のうち少なくとも
1つにより輻射熱を発生させることを特徴とする請求項
6記載のカルコパイライト構造半導体薄膜の製造方法。
7. The method for producing a chalcopyrite structure semiconductor thin film according to claim 6, wherein radiant heat is generated by at least one of a heater and a laser beam.
【請求項8】レ−ザ光の波長を、0.6μm以上、20
μm以下とする請求項7記載のカルコパイライト構造半
導体薄膜の製造方法。
8. A laser light having a wavelength of 0.6 μm or more, 20
The method for producing a chalcopyrite structure semiconductor thin film according to claim 7, wherein the thickness is at most μm.
【請求項9】カルコパイライト構造半導体の構成元素で
あるI族、III族、VI族元素を同時に蒸着し堆積する工程
を含むことを特徴とする請求項1〜3のいずれかに記載
のカルコパイライト構造半導体薄膜の製造方法。
9. The chalcopyrite according to any one of claims 1 to 3, further comprising a step of simultaneously vapor depositing and depositing a group I element, a group III element and a group VI element which are constituent elements of the chalcopyrite structure semiconductor. Method for manufacturing structural semiconductor thin film.
【請求項10】基板上にI族とIII族元素からなる薄膜を
堆積した後に、VI族元素を蒸着して堆積する工程を含む
ことを特徴とする請求項1〜3のいずれかに記載のカル
コパイライト構造半導体薄膜の製造方法。
10. The method according to claim 1, further comprising a step of depositing a thin film of a group I element and a group III element on a substrate and then depositing a group VI element by vapor deposition. Method for manufacturing chalcopyrite structure semiconductor thin film.
【請求項11】金属を被覆した誘電体あるいは金属の基
板上にカルコパイライト構造半導体薄膜を形成する場合
において、基板の熱膨張係数がカルコパイライト構造半
導体薄膜の値から±20×10-7/℃の範囲内であるこ
とを特徴とする請求項1〜10のいずれかに記載のカル
コパイライト構造半導体薄膜の製造方法。
11. When a chalcopyrite structure semiconductor thin film is formed on a metal-coated dielectric or metal substrate, the coefficient of thermal expansion of the substrate is ± 20 × 10 −7 / ° C. from the value of the chalcopyrite structure semiconductor thin film. The method for producing a chalcopyrite structure semiconductor thin film according to any one of claims 1 to 10, wherein the method is within the range.
【請求項12】I族元素としてCuまたはAgのうち少
なくとも1つを、III族元素としてInあるいはGa、
Alのうち少なくとも1つを、VI族元素としてSあるい
はSe、Teのうち少なくとも1つを用いることを特徴
とする請求項1〜11のいずれかに記載のカルコパイラ
イト構造半導体薄膜の製造方法。
12. At least one of Cu or Ag as a group I element, In or Ga as a group III element,
12. The method for producing a chalcopyrite structure semiconductor thin film according to claim 1, wherein at least one of Al is used and at least one of S, Se, and Te is used as a group VI element.
JP6199418A 1994-08-24 1994-08-24 Production of semiconductor thin film having chalcopyrite structure Pending JPH0860359A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6199418A JPH0860359A (en) 1994-08-24 1994-08-24 Production of semiconductor thin film having chalcopyrite structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6199418A JPH0860359A (en) 1994-08-24 1994-08-24 Production of semiconductor thin film having chalcopyrite structure

Publications (1)

Publication Number Publication Date
JPH0860359A true JPH0860359A (en) 1996-03-05

Family

ID=16407479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6199418A Pending JPH0860359A (en) 1994-08-24 1994-08-24 Production of semiconductor thin film having chalcopyrite structure

Country Status (1)

Country Link
JP (1) JPH0860359A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012002381A1 (en) * 2010-06-30 2012-01-05 京セラ株式会社 Photoelectric conversion device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012002381A1 (en) * 2010-06-30 2012-01-05 京セラ株式会社 Photoelectric conversion device
JPWO2012002381A1 (en) * 2010-06-30 2013-08-29 京セラ株式会社 Photoelectric conversion device
JP5328982B2 (en) * 2010-06-30 2013-10-30 京セラ株式会社 Photoelectric conversion device
US8653616B2 (en) 2010-06-30 2014-02-18 Kyocera Corporation Photoelectric conversion device

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