JPH0855058A - Expanding method for memory area - Google Patents

Abstract

PURPOSE:To practically extend a specified memory area by providing an inverter on a LOCK signal line and adding a LOCK signal to a memory address. CONSTITUTION:An inverter 2 for inverting a /LOCK signal is connected to a RAM 1 of 64 bytes for which the CPU of a 8086 system is used. The LOCK is a prefix instruction provided for the CPU and when it is added to the head of a MOV instruction or the like, the output signal LOCK of the CPU is turned to L at the time of executing the MOV instruction. By inputting the LOCK of the output signal of the CPU to an address terminal A12 of the RAM 1, the bit memory area is duplexed. Since the A12 is inverted when the instruction added with the LOCK is executed, the unused memory area is accessed. Therefore, such an instruction is originally used for making a bus a private one a multi-CPU system but by handling this signal equally with an address line, the unused memory area can be used as bit memory.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory system using an 8086 CPU, and more particularly to a memory area expansion method thereof.

[0002]

2. Description of the Related Art When writing bit information using a general-purpose memory and a general-purpose CPU, a plurality of instructions are combined for writing. Therefore, when a large amount of bit information is processed as in a sequence program, the number of instructions is increased. However, there is a problem in that the processing time increases due to the increase in the number of processes. In order to solve this problem, JP-A-59-77557
As described in the publication, a memory system is provided in which a part of the memory area can be read and written in bit units as shown in FIG. This means that data is inverted at A15 of the address terminal, and bit positions A11-A0 in one byte at A14, 13, and 12 are byte addresses. Although FIG. 3 is a circuit block of a bit memory and is not described in detail because it is detailed in the above-mentioned publication, when accessing the 80,000h unit, an arbitrary bit is read to D7 by a read, and a bit of D7 can be written to an arbitrary bit address by a write. It is possible.

[0003]

[Problems to be Solved by the Invention] However, A11-A
The address area specified by 12 bits of 0 is 4K bytes, but there is no 4K bytes in RAM.
Since it uses bytes, half of the memory area is unused, and the lack of bit memory is a problem. The problem to be solved by the present invention is to provide a memory area expansion method capable of substantially doubling the bit memory area.

[0004]

In order to solve the above-mentioned problems, the memory area expansion method of the present invention uses the / LOCK signal ("/" represents inversion) generated by the CPU as an address line to expand the memory area. CPU control instruction L is used when expanding and accessing this expanded memory area.
OCK is added to the beginning of the instruction.

[0005]

The bit memory area is doubled by inputting LOCK, which is the output signal of the CPU, to the address terminal A12 of the RAM. Since A12 is inverted when the instruction with LOCK is executed, an unused memory area is accessed.

[0006]

EXAMPLES The present invention will be specifically described below with reference to examples. FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1 is a 6 using an 8086 CPU
RAM of 4 Kbytes, 2 is an inverter that inverts the / LOCK signal. LOCK is a prefix instruction that an 8086 CPU has, and if it is attached to the beginning of a MOV instruction,
When the MOV instruction is executed, the CPU output signal LOCK becomes L. Originally this instruction is for monopolizing the bus in a multi-CPU system, but by treating this signal the same as an address line, it is possible to use an unused memory area as a bit memory. .

The following is an example of a program using the assembler language. 1 MOV AX, 8000 2 MOV DS, AX Data segment set 3 MOV BYT AL, [3020] Bit data read 20-D3 4 LOCK 5 MOV BYT [4120], AL write 1
20 D4 Explaining this program, by setting the data segment DS to 8000 in steps 1 and 2, access to the 80,000 address block becomes possible. Step 3 is a normal read, and D3 at the address 80020 is read. Step 4 is a prefix instruction, and sets the LOCK signal to L when executing the instruction of step 5. When the instruction is executed in step 5, 81120 of the accumulator is displayed.
7 will be written. That is, the memory up to 80FFFh is expanded to 81FFFh.

[0008]

As described above, according to the present invention, the specific memory area can be substantially doubled by providing a reversing device and adding a LOCK signal to the memory address with some hardware and software measures. It became possible to do.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an exemplary embodiment of the present invention.

FIG. 2 is an explanatory diagram of a memory area in a conventional memory system.

FIG. 3 is a block diagram showing a configuration of a conventional memory system.

[Explanation of symbols]

 1 RAM, 2 inverter

Claims (1)

[Claims] 1. A memory area is expanded by using a / LOCK signal generated by a CPU as an address line, and a CPU control command LOCK is added to the head of the command when accessing the expanded memory area. ,
Memory area expansion method.