JPH0851303A - Irreversible circuit element - Google Patents

Irreversible circuit element

Info

Publication number
JPH0851303A
JPH0851303A JP18714794A JP18714794A JPH0851303A JP H0851303 A JPH0851303 A JP H0851303A JP 18714794 A JP18714794 A JP 18714794A JP 18714794 A JP18714794 A JP 18714794A JP H0851303 A JPH0851303 A JP H0851303A
Authority
JP
Japan
Prior art keywords
conductor
conductor patterns
conductor pattern
central
conductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP18714794A
Other languages
Japanese (ja)
Inventor
Yukihiro Kawada
幸広 川田
Hisakuni Kobayashi
尚都 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP18714794A priority Critical patent/JPH0851303A/en
Publication of JPH0851303A publication Critical patent/JPH0851303A/en
Withdrawn legal-status Critical Current

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  • Non-Reversible Transmitting Devices (AREA)

Abstract

PURPOSE:To provide a highly precise irreversible circuit element with simple structure. CONSTITUTION:A central conductor is formed of two linear conductor patterns 151a, 151b and 153a, 153b which are formed on the surface 15a and the rear surface 15b of a printed board 15 having the two sides of a single layer and which make the crossed angle of 120 degrees, and by conductor patterns 152a, 152b, 154a and 154b which make the crossed angles of 120 degrees with the conductor patterns and which are formed on the surface and the back of the substrate as if they were sewn. Thus, signals are transmitted without a loss since the conductor patterns 151a, 151b, 153a and 153b on input/output do not have through holes on surface facing a magnetic body. Thus, an inductance component formed by the through hole can considerably be reduced and a satisfactory irreversible characteristic can be obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、マイクロ波帯の高周波
部品であるアイソレータ或いはサーキュレータなどの非
可逆回路素子に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonreciprocal circuit device such as an isolator or a circulator, which is a microwave band high frequency component.

【0002】[0002]

【従来の技術】一般に集中定数型アイソレータ或いはサ
ーキュレータ等の非可逆回路素子は、信号の伝送方向に
はほとんど減衰がなく且つ逆方向には大きくなるような
機能を有しており、例えば携帯電話、自動車電話等の移
動体通信機器の送信回路部に採用されている。
2. Description of the Related Art Generally, a non-reciprocal circuit element such as a lumped-constant type isolator or a circulator has a function of causing almost no attenuation in the signal transmission direction and increasing in the opposite direction. It is used in the transmission circuit of mobile communication devices such as car phones.

【0003】このようなアイソレータ、サーキュレータ
の構成としては、従来、次の3種類が知られている。ま
ず、第1には、図2に示す様に中心導体部8をなす金属
の導体9a〜9cによってフェライト7を包むと共に各
導体9a〜9cを互いに120度の角度で交差させ、且
つ絶縁フィルム14a,14bを介在させて導体9a〜
9b間の絶縁を行う。これを金属ケース1とシールド板
2、及び電極片3を装着した容量基板4を重ねた中央の
穴に挿入し、半田で接続する。終端抵抗器13は容量パ
ターン5cとアースパターン6bの間に接続する。これ
ら一体化した金属ケース1に永久磁石11を接着した金
属カバー12を接合しアイソレータが完成する。
The following three types of isolator and circulator configurations have been conventionally known. First, as shown in FIG. 2, first, the ferrite 7 is wrapped by the metallic conductors 9a to 9c forming the central conductor portion 8 and the conductors 9a to 9c are crossed with each other at an angle of 120 degrees, and the insulating film 14a is formed. , 14b are interposed between the conductors 9a ...
Insulate between 9b. This is inserted into the central hole in which the metal case 1, the shield plate 2, and the capacitor substrate 4 on which the electrode piece 3 is mounted are stacked, and they are connected by soldering. The terminating resistor 13 is connected between the capacitance pattern 5c and the ground pattern 6b. An isolator is completed by joining a metal cover 12 to which a permanent magnet 11 is bonded to the integrated metal case 1.

【0004】また、第2の構成として中心導体部8を構
成する導体9a〜9cをプリント基板15上の導体パタ
ーンにて作成した例が図3に示すものである。これはス
ルーホールを駆使し、1組の導体を長さ方向に分割し、
基板の表裏で3組の導体を網状に組み合わせたことで取
扱いを簡単にしている。
FIG. 3 shows an example in which the conductors 9a to 9c forming the central conductor portion 8 are formed by a conductor pattern on the printed circuit board 15 as a second structure. This makes full use of through holes and divides one set of conductors in the length direction,
Handling is simplified by combining three sets of conductors on the front and back of the board.

【0005】さらに、第3の構成としては、図4に示す
ように、多層プリント基板16の3層に1組の導体を設
けて中心導体部8を形成し、フェライト7上でスルーホ
ールを持たないようにしたタイプもある。
Further, as a third structure, as shown in FIG. 4, a set of conductors is provided in three layers of the multilayer printed circuit board 16 to form a central conductor portion 8, and a through hole is provided on the ferrite 7. There is also a type that does not.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、前述し
た従来の非可逆回路素子には、中心導体部に次のような
問題点があった。
However, the above-mentioned conventional non-reciprocal circuit device has the following problems in the central conductor portion.

【0007】即ち、第1の構成例の金属導体タイプは折
曲げ加工が難しく精度が出せず生産性が低い。また、第
2の構成例の両面プリント基板タイプは導体の基板表裏
へのスルーホールがフェライト7上に位置するため、こ
れらのスルーホールが挿入損失に影響与え性能が低下す
る。さらに、第3の構成例の積層プリント基板16によ
って中心導体部8を構成した積層タイプは、少なくとも
両面プリント基板タイプよりも厚くなってしまい、フェ
ライト7の表面から最外層までの距離が開き、フェライ
ト7の効果が少なくなって非可逆性が薄れるという問題
点があった。
That is, the metal conductor type of the first configuration example is difficult to fold and cannot provide accuracy, and the productivity is low. Also, in the double-sided printed circuit board type of the second configuration example, since the through holes to the front and back of the board of the conductor are located on the ferrite 7, these through holes affect the insertion loss and deteriorate the performance. Further, the laminated type in which the central conductor portion 8 is configured by the laminated printed circuit board 16 of the third configuration example becomes thicker than at least the double-sided printed circuit board type, and the distance from the surface of the ferrite 7 to the outermost layer is increased, There was a problem that the effect of No. 7 was reduced and the irreversibility was diminished.

【0008】本発明の目的は上記の問題点に鑑み、簡単
な構造で高精度な非可逆回路素子を提供することにあ
る。
In view of the above problems, an object of the present invention is to provide a highly accurate nonreciprocal circuit device having a simple structure.

【0009】[0009]

【課題を解決するための手段】本発明は上記の目的を達
成するために請求項1では、互いに一端が接続され12
0度で交差する3つの中心導体と、該中心導体に対面配
置された磁性体と、前記各中心導体の他端に接続された
コンデンサとを備えた非可逆回路素子において、配線基
板の表面に形成されたほぼ直線状の2本の平行導体から
なる第1の導体パターンと、前記配線基板の裏面に形成
され、前記第1の導体パターンと120度の角度で交差
するほぼ直線状の2本の平行導体からなる第2の導体パ
ターンと、前記第1の導体パターン及び第2の導体パタ
ーンのそれぞれと120度の角度をなして前記配線基板
の表裏面に形成され、且つ前記第1及び第2の導体パタ
ーンと接触しないようにスルーホールによって接続され
たほぼ直線状の2本の平行導体からなる第3の導体パタ
ーンとから前記中心導体を構成した非可逆回路素子を提
案する。
In order to achieve the above object, the present invention provides, in claim 1, one end of which is connected to the other.
A non-reciprocal circuit device including three central conductors intersecting at 0 degrees, a magnetic body facing the central conductors, and a capacitor connected to the other end of each central conductor, on a surface of a wiring board. A first conductor pattern formed of two substantially straight parallel conductors formed and two substantially straight lines formed on the back surface of the wiring board and intersecting the first conductor pattern at an angle of 120 degrees. Second conductor pattern formed of parallel conductors, and formed on the front and back surfaces of the wiring board at an angle of 120 degrees with each of the first conductor pattern and the second conductor pattern, and the first and second conductor patterns. A nonreciprocal circuit device is proposed in which the central conductor is composed of a third conductor pattern composed of two substantially straight parallel conductors connected by a through hole so as not to contact the second conductor pattern.

【0010】また、請求項2では、請求項1記載の非可
逆回路素子において、前記配線基板は単層両面板である
非可逆回路素子を提案する。
A second aspect of the present invention proposes the nonreciprocal circuit element according to the first aspect, wherein the wiring board is a single-layer double-sided board.

【0011】また、請求項3では、請求項1記載の非可
逆回路素子において、前記第1乃至第3の導体パターン
のそれぞれを構成する2本の導体パターンの中央部の間
隔が、両端の間隔よりも広く形成されている非可逆回路
素子を提案する。
According to a third aspect of the present invention, in the nonreciprocal circuit device according to the first aspect, the distance between the central portions of the two conductor patterns forming each of the first to third conductor patterns is the distance between both ends. We propose a non-reciprocal circuit device that is wider than the above.

【0012】さらに、請求項4では、請求項1記載の非
可逆回路素子において、前記スルーホールがランドレス
スルーホールである非可逆回路素子を提案する。
Further, a fourth aspect proposes the nonreciprocal circuit element according to the first aspect, wherein the through hole is a landless through hole.

【0013】[0013]

【作用】本発明の請求項1によれば、中心導体は、配線
基板の表面に形成されたほぼ直線状の2本の平行導体か
らなる第1の導体パターンと、前記配線基板の裏面に形
成され、前記第1の導体パターンと120度の角度で交
差するほぼ直線状の2本の平行導体からなる第2の導体
パターンと、前記第1の導体パターン及び第2の導体パ
ターンのそれぞれと120度の角度をなして前記配線基
板の表裏面に形成され、且つ前記第1及び第2の導体パ
ターンと接触しないようにスルーホールによって接続さ
れたほぼ直線状の2本の平行導体からなる第3の導体パ
ターンとから構成される。これにより、第1及び第2の
導体パターンを信号の入出力に使用することにより、該
入出力に関する導体パターンは磁性体と対向する面にス
ルーホールを持たないため、信号の伝送が損失なく行わ
れる。
According to claim 1 of the present invention, the center conductor is formed on the back surface of the wiring board and the first conductor pattern formed of two substantially straight parallel conductors formed on the surface of the wiring board. And a second conductor pattern composed of two substantially straight parallel conductors intersecting the first conductor pattern at an angle of 120 degrees, and 120 of each of the first conductor pattern and the second conductor pattern. A third parallel conductor formed on the front and back surfaces of the wiring board at an angle of 4 degrees and connected by through holes so as not to contact the first and second conductor patterns. And a conductor pattern. As a result, by using the first and second conductor patterns for inputting and outputting a signal, the conductor pattern relating to the input and output does not have a through hole on the surface facing the magnetic body, so that signal transmission can be performed without loss. Be seen.

【0014】また、請求項2によれば、前記配線基板が
単層両面板であるので、前記配線基板に対面して前記磁
性体を配置した場合、該磁性体と前記第1乃至第3の導
体パターンとの間の距離は皆ほぼ等しくなり、中心導体
を構成する3組の導体パターンのそれぞれのインダクタ
ンスがほぼ等しくなる。
Further, according to claim 2, since the wiring board is a single-layer double-sided board, when the magnetic body is arranged facing the wiring board, the magnetic body and the first to third layers are arranged. The distances to the conductor patterns are all substantially the same, and the respective inductances of the three conductor patterns forming the central conductor are substantially the same.

【0015】また、請求項3によれば、第1乃至第3の
導体パターンを構成する2本の平行導体の間隔が磁性体
への入出力部分で狭くなるので、他の導体との接触を避
けることができると共に、中央部で広がっているので、
湾曲させずに交差部分のクリアランスを取ることができ
る。
According to the third aspect of the invention, the distance between the two parallel conductors forming the first to third conductor patterns is narrowed at the input / output portion to / from the magnetic body, so contact with other conductors is prevented. You can avoid it, as it spreads in the central part,
Clearance at the intersection can be achieved without bending.

【0016】さらに、請求項4によれば、前記スルーホ
ールがランドレススルーホールによって構成されるの
で、他の導体とのクリアランスが確保されると共に、ス
ルーホールのランドによる信号の反射及び減衰が低減さ
れる。
Further, according to the present invention, since the through hole is composed of a landless through hole, a clearance with another conductor is secured, and signal reflection and attenuation due to the land of the through hole are reduced. It

【0017】[0017]

【実施例】以下、本発明の一実施例を図面に基づいて説
明する。図1は本発明の一実施例のアイソレータを示す
構成図である。図において、前述した従来例と同一構成
部分は同一符号をもって表す。また、従来例と本実施例
との相違点は、中心導体部8をプリント基板15によっ
て形成したことにある。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an isolator according to an embodiment of the present invention. In the figure, the same components as those in the conventional example described above are represented by the same reference numerals. Further, the difference between the conventional example and the present embodiment is that the central conductor portion 8 is formed by the printed board 15.

【0018】図1において、1金属ケース、2は導体か
らなるシールド板、4は容量基板、7は円盤形状のマイ
クロ波フェライト、11は例えばマイクロ波フェライト
と同面積を有する円盤形状の永久磁石、12は金属カバ
ー、13はチップ型の終端抵抗器、15は単層両面配線
用のセラミック誘電体基板(以下、基板と称する)、で
ある。
In FIG. 1, 1 is a metal case, 2 is a shield plate made of a conductor, 4 is a capacitor substrate, 7 is a disk-shaped microwave ferrite, 11 is a disk-shaped permanent magnet having the same area as the microwave ferrite, for example. Reference numeral 12 is a metal cover, 13 is a chip type terminating resistor, and 15 is a ceramic dielectric substrate for single-layer double-sided wiring (hereinafter referred to as a substrate).

【0019】基板15は、図5に示すように例えば正方
形状に形成され、その表面15aには、その上部中央及
び下部左右両側に接地用導体パターン10a〜10cが
印刷形成されると共に、上部左右両側及び下部中央部に
は入出力端子に接続されるランド導体パターン9a〜9
cが印刷形成されている。また、上部右側に形成された
ランド用導体パターン9cと下部左側の接地用導体パタ
ーン10cとの間には両端がこれらに接続された2本の
導体パターン151a,151b が形成されている。これらの導
体パターン151a,151b は、所定の間隔を開けて配置され
ると共に、その中央部の間隔は両端部の間隔よりも広が
るように形成されている。これにより、2本の導体パタ
ーン151a,151b の間隔がフェライト7及び永久磁石11
との対向領域への入出力部分で狭くなるので、他の導体
との接触を避けることができると共に、中央部で広がっ
ているので、湾曲させずに交差部分のクリアランスを取
ることができる。
The substrate 15 is formed, for example, in a square shape as shown in FIG. 5, and on the surface 15a thereof, grounding conductor patterns 10a to 10c are formed by printing on the upper center and lower left and right sides, and the upper left and right sides are formed. Land conductor patterns 9a to 9 connected to the input / output terminals are provided on both sides and the lower central portion.
c is printed. Further, between the land conductor pattern 9c formed on the upper right side and the grounding conductor pattern 10c on the lower left side, two conductor patterns 151a and 151b having both ends connected thereto are formed. These conductor patterns 151a and 151b are arranged with a predetermined gap therebetween, and are formed such that the gap between the central portions thereof is wider than the gap between both end portions. As a result, the distance between the two conductor patterns 151a and 151b is set to the ferrite 7 and the permanent magnet 11.
Since it becomes narrow at the input / output portion to the area opposed to, it is possible to avoid contact with other conductors, and since it spreads at the central portion, it is possible to make clearance at the intersecting portion without bending.

【0020】さらに、下部中央に設けられたランド用導
体パターン9cと上部中央の接地用導体パターン10c
との間には、前述した導体パターン151a,151b に対して
120度の角度をなし、且つこれらの導体パターン151
a,151b を縫うように2本の導体パターン152a,152b が
形成されている。ここで、導体パターン151a,151b は導
体パターン152a,152bとは非接触状態となっており、導
体パターン152a,152b は、導体パターン151a,151b と同
様に所定の間隔を開けて配置されると共に、その中央部
の間隔は前述と同様に両端部の間隔よりも広がるように
形成されている。
Further, the land conductor pattern 9c provided in the lower center and the ground conductor pattern 10c in the upper center.
And an angle of 120 degrees with respect to the above-described conductor patterns 151a and 151b.
Two conductor patterns 152a and 152b are formed so as to sew a and 151b. Here, the conductor patterns 151a and 151b are in a non-contact state with the conductor patterns 152a and 152b, and the conductor patterns 152a and 152b are arranged at a predetermined interval similarly to the conductor patterns 151a and 151b. The interval of the central portion is formed so as to be wider than the interval of both end portions as described above.

【0021】また、接地用導体パターン10bとランド
用導体パターン9cとの間には、終端抵抗器13が接続
されている。
A terminating resistor 13 is connected between the grounding conductor pattern 10b and the landing conductor pattern 9c.

【0022】一方、基板15の裏面15bにおいては、
表面15aの接地用導体パターン10a〜10cに対応
する位置に所定面積の接地用導体パターン10d〜10
fが形成されると共に、表面のランド用導体パターン9
a〜9cに対応する位置に所定面積のランド用導体パタ
ーン9d〜9fが形成され、表裏面に対向する導体パタ
ーンはそれぞれスルーホールTH1〜TH8を介して導
電接続されている。
On the other hand, on the back surface 15b of the substrate 15,
Ground conductor patterns 10d-10 having a predetermined area are provided at positions corresponding to the ground conductor patterns 10a-10c on the surface 15a.
f is formed and the land conductor pattern 9 on the surface is formed.
Land conductor patterns 9d to 9f having a predetermined area are formed at positions corresponding to a to 9c, and the conductor patterns facing the front and back surfaces are conductively connected through through holes TH1 to TH8, respectively.

【0023】また、上部右側に形成されたランド用導体
パターン9dと下部左側の接地用導体パターン10dと
の間には両端がこれらに接続された2本の導体パターン
153a,153b が形成されている。これらの導体パターン15
3a,153b は、所定の間隔を開けて配置されると共に、前
述と同様にその中央部の間隔は両端部の間隔よりも広が
るように形成されている。ここで、これらの導体パター
ン153a,153b は、表面の導体パターン151a,151b 及び15
2a,152b のそれぞれと120度の角度をなすように配置
されている。
Also, between the land conductor pattern 9d formed on the upper right side and the grounding conductor pattern 10d on the lower left side, two conductor patterns are connected at both ends.
153a and 153b are formed. These conductor patterns 15
3a and 153b are arranged with a predetermined gap therebetween, and are formed such that the gap between the central portions thereof is wider than the gap between both end portions, as described above. Here, these conductor patterns 153a and 153b are the conductor patterns 151a, 151b and 15b on the surface.
It is arranged so as to form an angle of 120 degrees with each of 2a and 152b.

【0024】さらに、ランド用導体パターン9fと接地
用導体パターン10fとの間には、表面の導体パターン
152a,152b に対応して、2本の導体パターン154a,154b
が形成され、導体パターン152a,152b と導体パターン15
4a,154b はランドレススルーホールTHa〜THfを介
して接続されている。
Further, a conductor pattern on the surface is provided between the land conductor pattern 9f and the ground conductor pattern 10f.
Two conductor patterns 154a and 154b corresponding to 152a and 152b
Are formed, and the conductor patterns 152a and 152b and the conductor pattern 15 are formed.
4a and 154b are connected through landless through holes THa to THf.

【0025】容量基板4はマイクロ波フェライトの厚さ
に対応した厚さを有し、基板15と同等の形状を有する
と共に、その中央部にはマイクロ波フェライト7を挿入
配置可能な所定面積の開口部4aが形成されている。さ
らに、容量基板4の表面の開口部4aの周囲には、プリ
ント基板15の導体パターン9a〜9cに対応する位置
に容量形成用の導体パターン5a〜5cが形成されてい
ると共に、接地用導体パターン10a〜10cに対応し
て接地用導体パターン6a〜6cが形成されている。ま
た、導体パターン5a,5b,6a,6bのそれぞれに
は、電極端子3が装着される。
The capacitance substrate 4 has a thickness corresponding to the thickness of the microwave ferrite, has the same shape as the substrate 15, and has an opening of a predetermined area into which the microwave ferrite 7 can be inserted and arranged. The portion 4a is formed. Further, around the opening 4a on the surface of the capacitance substrate 4, conductor patterns 5a to 5c for forming capacitance are formed at positions corresponding to the conductor patterns 9a to 9c of the printed circuit board 15, and a conductor pattern for grounding. Grounding conductor patterns 6a to 6c are formed corresponding to 10a to 10c. Further, the electrode terminals 3 are attached to the conductor patterns 5a, 5b, 6a and 6b, respectively.

【0026】組立に際しては、容量基板4の開口部4a
内にフェライト7が挿入配置された後、この容量基板4
上に基板15が重ねて配置される。これにより、基板1
5裏面の接地用導体パターン10d〜10fが接地用導
体パターン6a〜6cに導電接触されると共に、導体パ
ターン9d〜9fが導体パターン5a〜5cに導電接触
される。さらに、基板15の中央部上に永久磁石11が
配置されると共に容量基板4の下にシールド板2が配置
された状態で、これら全てが金属ケース1内に収納され
金属カバー12によって覆われる。これにより、磁気閉
回路が構成され、アイソレータ素子の組立が完了する。
At the time of assembly, the opening 4a of the capacitance substrate 4
After the ferrite 7 is inserted and placed in the capacitor board 4,
The substrate 15 is placed on top of it. As a result, the substrate 1
The conductor patterns 10d to 10f for grounding on the rear surface of 5 are conductively contacted with the conductor patterns 6a to 6c for grounding, and the conductor patterns 9d to 9f are conductively contacted with the conductor patterns 5a to 5c. Further, with the permanent magnet 11 arranged on the central portion of the substrate 15 and the shield plate 2 arranged under the capacitor substrate 4, all of them are housed in the metal case 1 and covered by the metal cover 12. As a result, a magnetic closed circuit is formed, and the assembly of the isolator element is completed.

【0027】ここで、電極端子3に対応して金属ケース
1には切り欠きが形成され、金属ケース1外部より電極
端子3に配線できるようになっている。
Here, a notch is formed in the metal case 1 so as to correspond to the electrode terminal 3, and wiring can be made to the electrode terminal 3 from outside the metal case 1.

【0028】前述した構成によれば、図6に示す回路図
におけるインダクタL1は導体パターン153a,153b によ
って、インダクタL2は導体パターン151a,151b によっ
て、インダクタL3は導体パターン152a,152b,154a,154
b によってそれぞれ構成され、容量C1は導体パターン
5a及びシールド板2によって、容量C2は導体パター
ン5b及びシールド板2によって、容量C3は導体パタ
ーン5c及びシールド板2によってそれぞれ構成され抵
抗値Rは終端抵抗器13によって構成される。
According to the above-mentioned structure, the inductor L1 in the circuit diagram shown in FIG. 6 is formed by the conductor patterns 153a and 153b, the inductor L2 is formed by the conductor patterns 151a and 151b, and the inductor L3 is formed in the conductor patterns 152a, 152b, 154a and 154.
The capacitance C1 is constituted by the conductor pattern 5a and the shield plate 2, the capacitance C2 is constituted by the conductor pattern 5b and the shield plate 2, the capacitance C3 is constituted by the conductor pattern 5c and the shield plate 2, and the resistance value R is the terminating resistance. It is constituted by the container 13.

【0029】従って、前述した本実施例によれば、中心
導体は基板15上に印刷形成された導体パターンによっ
て構成されているので、その交差角度を正確に120度
均等に設定することができ、また単層両面基板の表裏に
ほぼ同様の配置で3つの中心導体を形成しているので、
各中心導体とフェライト7との間の距離が等しくなり、
素子毎の非可逆特性にばらつきが生じることが少ない。
Therefore, according to the above-described embodiment, since the central conductor is formed by the conductor pattern formed by printing on the substrate 15, the intersecting angles can be accurately set to 120 degrees, Also, since three center conductors are formed on the front and back of the single-layer double-sided board in almost the same arrangement,
The distance between each center conductor and the ferrite 7 becomes equal,
Irreversible characteristics of each element rarely vary.

【0030】また、フェライト7及び永久磁石11によ
って直磁場が加わる部分において、信号の入出力に関す
る導体パターン151a,151b,153a,153b にはスルーホール
が形成されていないので、信号の伝送を損失なく行うこ
とができる。
In addition, since no through holes are formed in the conductor patterns 151a, 151b, 153a, 153b relating to signal input / output in the portion where a direct magnetic field is applied by the ferrite 7 and the permanent magnet 11, there is no loss in signal transmission. It can be carried out.

【0031】尚、本実施例の構成は一例でありこれに限
定されることはない。例えば、図7に示すように終端抵
抗器13を削除し、導体パターン5cに電極端子3を接
続すると共に、これに対応してシールド板2及び金属ケ
ース1に切り欠きを設ければサーキュレータを構成する
ことができる。
The configuration of this embodiment is an example, and the present invention is not limited to this. For example, as shown in FIG. 7, the terminating resistor 13 is deleted, the electrode terminal 3 is connected to the conductor pattern 5c, and a notch is provided in the shield plate 2 and the metal case 1 correspondingly to form a circulator. can do.

【0032】[0032]

【発明の効果】以上説明したように本発明の請求項1に
よれば、第1及び第2の導体パターンを信号の入出力に
使用することにより、該入出力に関する導体パターンは
磁性体と対向する面にスルーホールを持たないため、信
号の伝送が損失なく行われるので、スルーホールによっ
て形成されるインダクタンス成分を従来よりも大幅に低
減することができ、良好な非可逆特性を得ることができ
る。
As described above, according to claim 1 of the present invention, by using the first and second conductor patterns for input / output of a signal, the conductor pattern for the input / output faces the magnetic body. Since there is no through-hole in the surface, the signal transmission is performed without loss, so that the inductance component formed by the through-hole can be significantly reduced compared to the conventional one, and good non-reciprocal characteristics can be obtained. .

【0033】さらに請求項2によれば、上記の効果に加
えて、単層両面板とすることにより、配線基板に対面し
て配置した磁性体と第1乃至第3の導体パターンとの間
の距離は皆ほぼ等しくなり、中心導体を構成する3組の
導体パターンのそれぞれのインダクタンスがほぼ等しく
なるので、前記3組の導体パターンのそれぞれに接続さ
れる整合容量も等量に設定することができ、製造時にお
ける作業効率の向上を図ることができる。
Further, according to claim 2, in addition to the above effects, a single-layer double-sided plate is provided, whereby the magnetic body and the first to third conductor patterns arranged facing the wiring board are arranged. Since the distances are almost the same and the inductances of the three conductor patterns forming the central conductor are substantially the same, the matching capacitances connected to the three conductor patterns can be set to the same amount. Therefore, it is possible to improve work efficiency during manufacturing.

【0034】また、請求項3によれば、上記の効果に加
えて、他の導体との接触を避け、湾曲させずに交差部分
のクリアランスを取ることができるので、第1乃至第3
の導体パターンからなる中心導体を小形に形成すること
ができるので、これに対応して小形の磁性体を用いるこ
とができる。これにより素子形状の小型化を図ることが
できる。
Further, according to claim 3, in addition to the above effect, the contact with other conductors can be avoided, and the clearance at the intersecting portion can be taken without curving.
Since the central conductor composed of the conductor pattern can be formed in a small size, a small magnetic body can be used correspondingly. As a result, the element shape can be reduced.

【0035】さらに、請求項4によれば、上記の効果に
加えて、他の導体とのクリアランスが確保されると共
に、スルーホールのランドによる信号の反射及び減衰が
低減されるので、さらに素子形状の小型化を図ることが
できると共に良好な特性を得ることができる。
Further, according to claim 4, in addition to the above effect, a clearance with another conductor is secured, and signal reflection and attenuation due to the land of the through hole are reduced, so that the element shape is further improved. It is possible to achieve miniaturization and to obtain good characteristics.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のアイソレータを示す構成図FIG. 1 is a configuration diagram showing an isolator according to an embodiment of the present invention.

【図2】従来例を示す構成図FIG. 2 is a configuration diagram showing a conventional example.

【図3】従来例を示す構成図FIG. 3 is a configuration diagram showing a conventional example.

【図4】従来例を示す構成図FIG. 4 is a configuration diagram showing a conventional example.

【図5】本発明の一実施例における中心導体部を示す構
成図
FIG. 5 is a configuration diagram showing a central conductor portion in one embodiment of the present invention.

【図6】本発明の一実施例のアイソレータ素子を示す回
路図
FIG. 6 is a circuit diagram showing an isolator element according to an embodiment of the present invention.

【図7】本発明の他の実施例のサーキュレータを示す構
成図
FIG. 7 is a configuration diagram showing a circulator according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 互いに一端が接続され120度で交差す
る3つの中心導体と、該中心導体に対面配置された磁性
体と、前記各中心導体の他端に接続されたコンデンサと
を備えた非可逆回路素子において、 配線基板の表面に形成されたほぼ直線状の2本の平行導
体からなる第1の導体パターンと、 前記配線基板の裏面に形成され、前記第1の導体パター
ンと120度の角度で交差するほぼ直線状の2本の平行
導体からなる第2の導体パターンと、 前記第1の導体パターン及び第2の導体パターンのそれ
ぞれと120度の角度をなして前記配線基板の表裏面に
形成され、且つ前記第1及び第2の導体パターンと接触
しないようにスルーホールによって接続されたほぼ直線
状の2本の平行導体からなる第3の導体パターンとから
前記中心導体を構成したことを特徴とする非可逆回路素
子。
1. A non-equipment comprising: three central conductors, one end of which is connected to each other and intersecting at 120 degrees; a magnetic body facing the central conductor; and a capacitor connected to the other end of each of the central conductors. In the reversible circuit element, a first conductor pattern formed of two substantially linear parallel conductors formed on the surface of the wiring board, and a first conductor pattern formed on the back surface of the wiring board, which is 120 degrees apart. A second conductor pattern composed of two substantially straight parallel conductors intersecting at an angle, and the front and back surfaces of the wiring board at an angle of 120 degrees with each of the first conductor pattern and the second conductor pattern. And a third conductor pattern formed of two substantially straight parallel conductors connected by through holes so as not to contact the first and second conductor patterns A non-reciprocal circuit device characterized by the above.
【請求項2】 前記配線基板は単層両面板であることを
特徴とする請求項1記載の非可逆回路素子。
2. The nonreciprocal circuit device according to claim 1, wherein the wiring board is a single-layer double-sided board.
【請求項3】 前記第1乃至第3の導体パターンのそれ
ぞれを構成する2本の導体パターンの中央部の間隔が、
両端の間隔よりも広く形成されていることを特徴とする
請求項1記載の非可逆回路素子。
3. The distance between the central portions of the two conductor patterns forming each of the first to third conductor patterns is
The nonreciprocal circuit device according to claim 1, wherein the nonreciprocal circuit device is formed so as to be wider than a space between both ends.
【請求項4】 前記スルーホールがランドレススルーホ
ールであることを特徴とする請求項1記載の非可逆回路
素子。
4. The nonreciprocal circuit device according to claim 1, wherein the through hole is a landless through hole.
JP18714794A 1994-08-09 1994-08-09 Irreversible circuit element Withdrawn JPH0851303A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18714794A JPH0851303A (en) 1994-08-09 1994-08-09 Irreversible circuit element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18714794A JPH0851303A (en) 1994-08-09 1994-08-09 Irreversible circuit element

Publications (1)

Publication Number Publication Date
JPH0851303A true JPH0851303A (en) 1996-02-20

Family

ID=16200949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18714794A Withdrawn JPH0851303A (en) 1994-08-09 1994-08-09 Irreversible circuit element

Country Status (1)

Country Link
JP (1) JPH0851303A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6437654B2 (en) 1997-11-19 2002-08-20 Nec Corporation Substrate-type non-reciprocal circuit element and integrated circuit having multiple ground surface electrodes and co-planar electrical interface

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6437654B2 (en) 1997-11-19 2002-08-20 Nec Corporation Substrate-type non-reciprocal circuit element and integrated circuit having multiple ground surface electrodes and co-planar electrical interface

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