JPH0851233A - Light emitting diode - Google Patents
Light emitting diodeInfo
- Publication number
- JPH0851233A JPH0851233A JP18601094A JP18601094A JPH0851233A JP H0851233 A JPH0851233 A JP H0851233A JP 18601094 A JP18601094 A JP 18601094A JP 18601094 A JP18601094 A JP 18601094A JP H0851233 A JPH0851233 A JP H0851233A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- light emitting
- double hetero
- type
- emitting diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Led Devices (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は化合物半導体材料を用い
た発光ダイオードの構造に係わる。FIELD OF THE INVENTION The present invention relates to a structure of a light emitting diode using a compound semiconductor material.
【0002】[0002]
【従来の技術】発光ダイオード(LED)は表示用材
料、光通信用材料として多くの分野で使用されている。
緑から赤色の高輝度の発光を得ることを目的としたAl
GaInP系のLEDでは、P型クラッド層のドーピン
グがしにくく電流が広がりにくい。このため発光領域が
広がらず発光効率が低下する。このようなAlGaIn
P系のLEDでは発光部であるダブルヘテロ層の上に窓
層、あるいは電流拡散層を形成し外部への光取り出し効
率を向上させている。2. Description of the Related Art Light emitting diodes (LEDs) are used in many fields as display materials and optical communication materials.
Al for the purpose of obtaining high brightness light emission from green to red
In a GaInP-based LED, it is difficult to dope the P-type cladding layer and it is difficult for the current to spread. Therefore, the light emitting region is not expanded and the light emitting efficiency is reduced. Such AlGaIn
In the P-based LED, a window layer or a current diffusion layer is formed on the double hetero layer that is the light emitting portion to improve the light extraction efficiency to the outside.
【0003】このようなLEDの作製プロセスにおい
て、従来の技術では半導体基板上へ作製した発光ダイオ
ードの素子分離工程においてはダイシングまたはメサエ
ッチによる場合が多い。メサエッチにより素子分離を行
うと発光ダイオード表面へ行くほどチップの径が小さく
なり図3のような構造となる。また従来のダイシングに
よる素子分離では、ダイシング後に側面ダメージを取り
除くため、側面を一部エッチオフしている。しかしこの
ようにして作製された発光ダイオードのダブルヘテロ層
はその上下方の層の幅はほとんど同じであり、図2のよ
うな構造となる。In the manufacturing process of such an LED, in the conventional technique, dicing or mesa etching is often used in the element isolation process of a light emitting diode manufactured on a semiconductor substrate. When elements are separated by mesa etching, the diameter of the chip becomes smaller toward the surface of the light emitting diode, resulting in the structure shown in FIG. Further, in the conventional element isolation by dicing, a part of the side surface is etched off in order to remove the side surface damage after dicing. However, in the double hetero layer of the light emitting diode thus manufactured, the widths of the upper and lower layers are almost the same, and the structure is as shown in FIG.
【0004】[0004]
【発明が解決しようとする課題】このような構造では発
光ダイオードのチップをモールドし製品とするまでのプ
ロセスにおいて、ダブルヘテロ層の側面が外部に接触し
やすく、ダブルヘテロ層が再度ダメージを受けやすい。
このことはダブルヘテロ層へのストレスや破損の原因と
なり、輝度低下や信頼性の低下の原因となり問題であ
る。In such a structure, the side surface of the double hetero layer is likely to come into contact with the outside and the double hetero layer is easily damaged again in the process of molding the light emitting diode chip into a product. .
This causes stress and damage to the double hetero layer, and causes problems such as reduced brightness and reduced reliability.
【0005】本発明は上記の課題を解決し、発光ダイオ
ードのチップを製品にするまでのプロセスにおいて、ダ
ブルヘテロ層へのダメージを受けにくく、本来の輝度か
らの輝度低下や信頼性の低下が少なく、輝度や信頼性の
ばらつきの少ない発光ダイオードを提供することを目的
する。The present invention solves the above-mentioned problems and is less susceptible to damage to the double hetero layer in the process of producing a light emitting diode chip into a product, and there is little decrease in brightness from the original brightness and deterioration in reliability. Another object of the present invention is to provide a light emitting diode with less variation in brightness and reliability.
【0006】[0006]
【課題を解決するための手段】本発明はダイシングによ
る素子分離後のエッチングにおいて、V族元素がAs系
かP系かによりエッチングレートが異なることに注目
し、ダブルヘテロ層をその上下方の層よりもエッチング
量を多くし、ダブルヘテロ層の幅を小さくした。As系
のエッチングレートがP系のエッチングレートより大き
いエッチャントとしてH2 SO4 +H2 O2 +H2 O
系、NH3 +H2 O2 +H2 O系エッチャント等があ
る。また、P系のエッチングレートがAs系のエッチン
グレートより大きいエッチャントとしてHCl+H2 O
2 +H2 O系エッチャントがある。このようなエッチャ
ントの一方または両方を組み合わせてエッチングを行
い、ダブルヘテロ層のエッチング量をその上下方の層よ
りも多くし、断面構造で見た場合ダブルヘテロ層の幅を
上下の層の幅より小さくしたことを特徴とする。すなわ
ち透視した場合ダブルヘテロ層の端面は上下の層の端面
よりひとまわり小さく、ダブルヘテロ層の面積は上下の
層の面積より小さくなっていることを特徴とする。The present invention focuses on the fact that the etching rate after element isolation by dicing is different depending on whether the group V element is an As-based or P-based element. The width of the double hetero layer was reduced by increasing the etching amount. H 2 SO 4 + H 2 O 2 + H 2 O is used as an etchant with an As-based etching rate higher than the P-based etching rate.
System, NH 3 + H 2 O 2 + H 2 O type etchant and the like. Further, HCl + H 2 O is used as an etchant having a P-based etching rate higher than the As-based etching rate.
There are 2 + H 2 O type etchants. Etching is performed by combining one or both of such etchants, and the etching amount of the double hetero layer is made larger than that of the upper and lower layers. It is characterized by being made smaller. That is, the end surface of the double hetero layer is slightly smaller than the end surfaces of the upper and lower layers when seen through, and the area of the double hetero layer is smaller than the area of the upper and lower layers.
【0007】[0007]
【作用】本発明によれば発光ダイオードのチップを製品
の発光ダイオードにするまでのプロセスにおいて活性層
へのダメージを受けにくく、ダメージ有無による輝度の
低下やばらつきが少なく、信頼性の高い発光ダイオード
の作製が可能になる。According to the present invention, in the process of making a light emitting diode chip into a light emitting diode of a product, the active layer is less likely to be damaged, and the decrease or variation in brightness due to the presence or absence of damage is small, and the reliability of the light emitting diode is high. Can be manufactured.
【0008】[0008]
【実施例】図1は本発明の実施にかかわる発光ダイオー
ドの概略構造を示す断面図である。すなわちGaAs基
板上にn型GaAsバッファ層を介して、n型半導体多
層膜反射鏡を持ち、さらにn型クラッド層として(Al
0.7 Ga0.3 )0.5 In0. 5 P0.5 、活性層としてアン
ドープの(Al0.2 Ga0.8 )0.5 In0.5 P、p型ク
ラッド層として(Al0.7 Ga0.3 )0.5 In0.5 Pを
順に積層してダブルへテロ構造の発光部を形成し、更に
p型AlGaAs窓層、p型AlGaInPエッチング
ストップ層として(Al0.7 Ga0.3 )0.5 In0.5
P、p型GaAsコンタクト層を積層したものである。1 is a sectional view showing a schematic structure of a light emitting diode according to an embodiment of the present invention. That is, an n-type semiconductor multilayer film reflection mirror is provided on an GaAs substrate via an n-type GaAs buffer layer, and an n-type clad layer (Al
0.7 Ga 0.3) 0.5 In 0. 5 P 0.5, undoped as an active layer (Al 0.2 Ga 0.8) 0.5 In 0.5 P, a p-type cladding layer (Al 0.7 Ga 0.3) to double by laminating a 0.5 an In 0.5 P in order A light emitting portion having a terror structure is formed, and a p-type AlGaAs window layer and a p-type AlGaInP etching stop layer are formed as (Al 0.7 Ga 0.3 ) 0.5 In 0.5.
It is a stack of P and p type GaAs contact layers.
【0009】また層厚はn型GaAsバッファ層0.5
μm、n型半導体多層膜反射鏡2.4μm、n型クラッ
ド層1.0μm、アンドープ活性層0.5μm、p型ク
ラッド層1.0μm、p型AlGaAs窓層4.0μ
m、p型AlGaInPエッチングストップ層0.05
μm、p型GaAsコンタクト層0.3μmである。The layer thickness is n-type GaAs buffer layer 0.5.
μm, n-type semiconductor multilayer film reflecting mirror 2.4 μm, n-type clad layer 1.0 μm, undoped active layer 0.5 μm, p-type clad layer 1.0 μm, p-type AlGaAs window layer 4.0 μm
m, p-type AlGaInP etching stop layer 0.05
μm, p-type GaAs contact layer 0.3 μm.
【0010】上記コンタクト層上にAuBeからなるp
側電極を形成し、また基板の下にAuGeからなるn側
電極が形成されている。On the contact layer, p made of AuBe
A side electrode is formed, and an n-side electrode made of AuGe is formed under the substrate.
【0011】以後に基板からダイサーにより全ダイスし
た後の発光ダイオードチップのエッチング方法について
述べる。まず窓層や反射層のAs系の層の側面ダメージ
除去を目的とし、40℃のH2 SO4 :H2 O2 :H2
O=3:1:1のエッチング液で15秒エッチングを行
う。次にダブルヘテロ層のP系の層の側面ダメージ除去
を目的として、30℃のHCl:H2 O=6:4のエッ
チング液で3分エッチングを行った。上記エッチングの
結果、活性層を含むダブルヘテロ層がその上下方の層よ
りも3μm小さい幅となる構造が得られた。Hereinafter, a method of etching the light emitting diode chip after all dicing from the substrate with a dicer will be described. First, in order to remove the side surface damage of the As-based layer such as the window layer and the reflection layer, H 2 SO 4 : H 2 O 2 : H 2 at 40 ° C.
Etching is performed for 15 seconds with an etching solution of O = 3: 1: 1. Next, etching was performed for 3 minutes with an etching solution of HCl: H 2 O = 6: 4 at 30 ° C. for the purpose of removing the side damage of the P-based layer of the double hetero layer. As a result of the above etching, a structure was obtained in which the width of the double hetero layer including the active layer was 3 μm smaller than the upper and lower layers.
【0012】上記方法により得られた発光ダイオードチ
ップをマウントしモールドすることにより発光ダイオー
ドを作製した。同一ウェーハの同一位置について、上記
方法と従来の方法で発光ダイオードを作製し、積分球を
用いて輝度測定を実施した。その輝度とばらつきは表1
の通りで、本発明により得られた発光ダイオードは従来
の技術により得られた発光ダイオードに比べ、輝度のば
らつきが少ない結果が得られた。これは発光ダイオード
チップをモールドするまでのハンドリング中にいくつか
のチップの活性層あるいはダブルヘテロ層にダメージが
入り、輝度が劣化したためと考えられる。A light emitting diode was manufactured by mounting and molding the light emitting diode chip obtained by the above method. At the same position on the same wafer, a light emitting diode was manufactured by the above method and a conventional method, and the luminance was measured using an integrating sphere. The brightness and variations are shown in Table 1.
As described above, the light emitting diode obtained by the present invention has less variation in luminance than the light emitting diode obtained by the conventional technique. It is considered that this is because the active layer or the double hetero layer of some chips was damaged during the handling until the light emitting diode chips were molded, and the brightness was deteriorated.
【0013】[0013]
【表1】 [Table 1]
【0014】上記実施例においてはAlGaInP系ダ
ブルヘテロ構造エピタキシャル基板を用いて説明した。
しかし本実施例で示したダブルヘテロ層の下の反射層は
無くても良い。またそのダブルヘテロ層はAlGaIn
P系の材料だけでなく、その他の物質系でも良くその上
下方との、適切なエッチング液と時間と温度を選択し、
ダブルヘテロ層の幅がその上下方の層よりも小さい構造
となれば良い。The above embodiments have been described using the AlGaInP-based double heterostructure epitaxial substrate.
However, the reflective layer below the double hetero layer shown in this embodiment may be omitted. The double hetero layer is made of AlGaIn.
Not only the P-based material but also other substance-based materials may be selected, and the appropriate etching solution and time and temperature for the upper and lower sides may be selected.
The width of the double hetero layer may be smaller than that of the upper and lower layers.
【0015】[0015]
【発明の効果】以上説明したように本発明よれば発光ダ
イオードのチップを製品にするまでのプロセスにおい
て、活性層へのダメージを受けにくく、ダメージ有無に
よる輝度のばらつきが少なく、信頼性の高い発光ダイオ
ードの作製が可能となる。As described above, according to the present invention, in the process of manufacturing a light emitting diode chip into a product, the active layer is less likely to be damaged, there is little variation in luminance depending on the presence or absence of damage, and highly reliable light emission is achieved. It becomes possible to fabricate a diode.
【図1】本発明による発光ダイオードの断面図。FIG. 1 is a sectional view of a light emitting diode according to the present invention.
【図2】ダイシングにより素子分離した従来の構造の発
光ダイオードの断面図。FIG. 2 is a sectional view of a light emitting diode having a conventional structure in which elements are separated by dicing.
【図3】メサエッチングにより素子分離した従来の構造
の発光ダイオードの断面図。FIG. 3 is a cross-sectional view of a light emitting diode having a conventional structure in which elements are separated by mesa etching.
1 電極 2 p型GaAsコンタクト層 3 p型AlGaInPエッチングストップ層 4 p型AlGaAs窓層 5 p型クラッド層 6 活性層 7 n型クラッド層 8 半導体多層膜反射鏡 9 n型GaAsバッファ層 10 n型GaAs基板 11 電極 DESCRIPTION OF SYMBOLS 1 electrode 2 p-type GaAs contact layer 3 p-type AlGaInP etching stop layer 4 p-type AlGaAs window layer 5 p-type clad layer 6 active layer 7 n-type clad layer 8 semiconductor multilayer film reflective mirror 9 n-type GaAs buffer layer 10 n-type GaAs Substrate 11 electrode
Claims (3)
ッド層で挟んだダブルヘテロ構造を有する発光ダイオー
ドであって、ダブルヘテロ層の幅がその他の層の幅より
も小さく、かつダブルヘテロ層端面がその他の層の端面
よりも引込んだ構造であることを特徴とするダブルヘテ
ロ構造の発光ダイオード。1. A light emitting diode having a double hetero structure in which an active layer formed on a semiconductor substrate is sandwiched by clad layers, wherein the width of the double hetero layer is smaller than the width of other layers and the double hetero layer. A light emitting diode having a double hetero structure, characterized in that the end face has a structure retracted from the end faces of other layers.
料からなりその上方の層の1つがAsを含む層からなる
ことを特徴とする請求項1記載のダブルヘテロ構造の発
光ダイオード。2. The light emitting diode having a double hetero structure according to claim 1, wherein the double hetero layer is made of an AlGaInP-based material, and one of the layers above the double hetero layer is a layer containing As.
他の層の幅よりも5μm 以上小さいことを特徴とする請
求項1又は請求項2記載のダブルヘテロ構造の発光ダイ
オード。3. The double-heterostructure light emitting diode according to claim 1, wherein the width of the double hetero layer is smaller than the width of other layers above and below it by 5 μm or more.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18601094A JP3470401B2 (en) | 1994-08-08 | 1994-08-08 | Light emitting diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18601094A JP3470401B2 (en) | 1994-08-08 | 1994-08-08 | Light emitting diode |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0851233A true JPH0851233A (en) | 1996-02-20 |
JP3470401B2 JP3470401B2 (en) | 2003-11-25 |
Family
ID=16180802
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18601094A Expired - Fee Related JP3470401B2 (en) | 1994-08-08 | 1994-08-08 | Light emitting diode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3470401B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014207987A1 (en) * | 2013-06-26 | 2014-12-31 | 信越半導体株式会社 | Light-emitting element and method for manufacturing light-emitting element |
-
1994
- 1994-08-08 JP JP18601094A patent/JP3470401B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014207987A1 (en) * | 2013-06-26 | 2014-12-31 | 信越半導体株式会社 | Light-emitting element and method for manufacturing light-emitting element |
JP2015012028A (en) * | 2013-06-26 | 2015-01-19 | 信越半導体株式会社 | Light-emitting element, and method of manufacturing the same |
CN105283970A (en) * | 2013-06-26 | 2016-01-27 | 信越半导体株式会社 | Light-emitting element and method for manufacturing light-emitting element |
Also Published As
Publication number | Publication date |
---|---|
JP3470401B2 (en) | 2003-11-25 |
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