JPH0846889A - High image quality television receiver with two-screen display function - Google Patents

Abstract

PURPOSE:To provide the high image quality television receiver with 2-pattern display function in which the image quality of a displayed image is high independently of a master screen or a slave screen. CONSTITUTION:A video signal processed by an antenna 401, a tuner 405 and a detection circuit 406 is given to a synchronizing separator circuit 407, in which a synchronizing signal is separated and from which a horizontal synchronizing signal having a double frequency of that of the synchronizing signal is generated. A deflection circuit 502 drives the scanning system by the synchronizing signal. A scanning line conversion circuit 501 is provided with a means compressing an image to 1/2 in the horizontal direction, a means storing the video signal and compressing the image to 1/2 in the horizontal direction, and a means switching an image outputted from both the means onto the same screen and two image screens are displayed on a cathode-ray tube simultaneously via a video processing circuit 403.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver capable of simultaneously displaying a moving picture and a still picture on one screen.

[0002]

2. Description of the Related Art In recent years, in order to make effective use of a CRT screen in a television receiver, a so-called small screen insertion (PinP) TV, which reduces and projects other TV programs on a part of the original TV screen, is announced. (See Japanese Patent Laid-Open No. 54-98116). The concept of this PinP (picture-in-picture) will be briefly described below with reference to FIGS.

FIG. 8 is a conceptual diagram of a PinP screen.
Is a television receiver, 102 is a cathode ray tube, 103 is a main screen portion, 104 is a small screen portion into which another program screen is reduced and inserted, and the main screen and the small screen are in a format in which they can be independently selected. ing. FIG. 9 shows an example of a small screen insertion method. I is the small screen before reduction, and II is the parent screen in which the small screen is inserted. If the screen reduction ratio is (scan period after reduction) / (scan period of original signal), the screen reduction ratio of a small screen is 1 in the horizontal and vertical directions.
When set to / 3, the number of scanning lines from the screen of the small screen I to 1
This is extracted, and the horizontal period is time-compressed to 1/3 to synchronize with the main screen and then inserted into the main screen. Scan line-shows a part of the scan line before and after reduction.

FIG. 10 shows a state of inserting a small screen on a time axis. I is the video signal of the small screen before reduction, and II is the video signal of the parent screen in which the small screen is inserted. From the video signal I of the small screen, as shown in FIG. 9, one scanning line is extracted for every three lines and an analog or digital field memory III is extracted.
, And read out using the triple clock at the small screen insertion position (thick line part) of the video signal II of the main screen,
It can be a two-screen television signal. At this time, the field memory III requires A and B2 fields. That is, when reading the memory A, the next field is written to the memory B, and when reading the memory B, the next field is written to the memory A.

FIG. 11 shows the configuration of a conventional PinP television. In the figure, 401 is an antenna, 402 is a small screen insertion circuit, 403 is a video processing circuit, 404 is a cathode ray tube, 405 is a main screen tuner, 406 is an IF / video detection circuit, 407 is a sync separation circuit, and 408 is a small screen. Tuner, 409 IF / video detection circuit, 410 sync separation circuit, 411, 412 field memories A, B, 41
Reference numeral 3 is a write clock generation circuit, and 414 is a read clock generation circuit.

Tuner 408, IF / video detection circuit 40
The small-screen video signal obtained in step 9 is written in, for example, the A field memory 411 by the write clock generation circuit 413 which is timed by the sync separation circuit 410. During this period, the video signal of one field before written in the B field memory 412 is the clock of the read clock generation circuit 414 whose insertion timing is determined according to the sync signal separated by the sync separation circuit 407 from the video signal of the parent screen. Is read out and inserted into the video signal of the parent screen by the small screen insertion circuit 402. If the writing to the field memory for the small screen is stopped here, a still image can be obtained.

The child screen of the conventional PinP television described above has a scan line number of, for example, ⅓ and a horizontal period sample number of, for example, 100, so that the image quality is rough and fine characters can be read. There was a drawback that you couldn't. In addition, there is also a problem that it is practically not necessary to simultaneously select and watch programs on other channels, in other words, there is a small demand to watch the programs, and thus the significance of existence in practical use is doubtful.

[0008]

The present invention has been made in view of the above-mentioned conventional technical circumstances, and therefore the object of the present invention is regardless of whether it is a parent screen or a child screen. , To provide a high-definition television receiver with a two-screen display function, which has a high image quality.

[0009]

In order to achieve this object, the present invention has a line memory and a field memory, and when a still image is switched, an image and a moving image stored in the field memory, It is characterized in that it is a television receiver with a two-screen display function that allows both images to be viewed on the same screen with the same size.

[0010]

According to the present invention, by providing the line memory and the field memory, when the still image is switched, the image and the moving image stored in the field memory are
You can see both images on the same screen with the same size.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a block diagram showing the function of the television receiver according to the present invention. In FIG. 1, reference numeral 501 is a scanning line conversion circuit, 502 is a deflection circuit, and the same parts as in FIG. ing.

Next, the operation of the embodiment of the present invention will be described. The video signal processed by the antenna 401, the tuner 405, and the IF / video detection circuit 406 is the sync separation circuit 4
The sync signal is separated by 07, and a horizontal sync signal having a double repetition frequency is generated. The deflection circuit 50 is driven by the horizontal synchronizing signal and the vertical synchronizing signal having twice this frequency.
2 drives the scanning system. The video signal converted by the scanning line conversion circuit 501 is displayed on the cathode ray tube 404 after being subjected to various controls (for example, contrast, hue, saturation, image quality, etc.) by the video processing circuit 403.

Next, the scanning line conversion circuit 501 is shown in FIG.
A detailed block diagram is shown in FIG.

In FIG. 2, reference numeral 601 denotes a luminance signal input terminal,
602 is a field memory, 603 is a switch (S ₁ ), 604 and 605 are line buffer memories, 6
06 is a switch (S ₂ ), 607 is a switch (S ₃ ), 6
Reference numerals 08, 609 and 610 are line memories, 611 is a switch (S ₄ ), 612 is an averager, 613 is a signal multiplexer, 6
14 is a luminance signal output terminal, 615 is a synchronization signal input terminal,
616 is a control circuit, and 617 is a screen changeover switch (S ₅ ).
Is.

First, the luminance signal will be described. First,
When a luminance signal is input to the input terminal 601, the field memory 602 stores an image for one field. Since a new screen is written for each field in the stored screen, the current video and the video stored in the field memory are always shifted by one field. Screen switch 61
When 7 is switched to 2 screens, the field memory 602 is controlled by the control signal output from the control circuit 616, the writing is stopped and only the reading is performed. In the same state, still image information is output to the output of the field memory 602.

This image information is written by selecting one of the line buffer memories 604 and 605 by the switch (S ₁ ) 603. When one line buffer memory (eg 604) is writing, the other line buffer memory (eg 605) is in a read state,
Image information is output by being connected to the switch (S ₂ ) 606. Since this line buffer reads image information at a clock which is four times as fast as writing, the horizontal frequency is 2
If it is displayed on a double television, the image is horizontally compressed to 1/2.

Next, the operation of the line memory in which the other signal is flowing will be described. When a luminance signal is input from the input terminal 601, the switch (S ₃ ) 607 switches every horizontal period and connects the signal to any one of the line memories in the next stage. In the line memory, as shown in FIG. 5, writing (W) is performed at a normal speed and reading (R) is performed at a speed twice as fast as writing. This is repeated by the three line memories at the timings shown in FIG. 5 so that a video signal at twice the speed of communication can be obtained. The switch (S ₄ ) 611 switches the video signal output from the line memory as shown in FIGS. 5A and 5B and outputs two continuous video signals.

The A signal train and the B signal train are always delayed by 1/2 horizontal cycle from the B signal train.

If the A signal sequence and the B signal sequence are averaged by the averaging device 612, a scanning line obtained by newly averaging the upper and lower scanning lines is interpolated between the upper and lower scanning lines as shown in FIG. 5C. An image quality signal can be obtained. Further, if only one of the A signal train and the B signal train is taken out by the averaging device 612, a high-quality signal in which the scanning line is repeated twice can be obtained. Here, when the screen selector switch (S ₅ ) 617 in FIG. 2 is switched to the 2 screen side, three line memories 608, 609, 610 are generated by the control signal output from the control circuit 616.
Halves the amount of video information at the time of writing, and reads at twice the speed of reading.

The situation will be described with reference to FIG. The rectangle in the same figure shows one line memory, and one division in the rectangle shows a cell in which one sample is inserted. FIG. 1A shows the operation of a normal line memory, and video information is written from 1 in order. (B) shows the state of the line memory in the case of two screens, and the video information is sent in order from 1, but the information amount is halved by writing every other video information at the time of writing.

The reading is performed at a speed twice as fast as the head as usual, so that the image information compressed in the horizontal direction by 1/2 can be obtained at the output. Also, by the signal multiplexer 613,
As shown in FIG. 7, by performing an operation of projecting a moving image on the left side and a still image on the right side in the center of the screen, a still image of a desired image as shown in the figure can be viewed at the same time as the moving image. If the screen change switch (S ₅ ) 617 is switched to the normal screen, the screen becomes one screen and a normal moving image can be viewed.

Next, the color difference signal will be described. FIG. 3 is a block diagram showing the processing of the color difference signal of the scanning line conversion circuit 501 in FIG. 1, 620 and 621 are color difference signal input terminals,
622 is a color difference signal multiplexer, 623 is a color difference signal separator, 6
Reference numerals 24 and 625 are color difference signal output terminals. Also, the same parts as those in FIG.

When the color difference signals (RY, BY) are input to the color difference signal input terminals 620 and 621 as shown in FIGS. 4A and 4B, respectively, the color difference signal multiplexer 622 is arranged as shown in FIG. Two color difference signals are dot-sequentially multiplexed.

Here, the color difference signal has half the information amount as compared with the luminance signal, but since the frequency band of the color difference signal is narrower than that of the luminance signal, there is no visual problem.

The color difference signals thus multiplexed are processed in the same manner as the luminance signal and input to the color difference signal separator 623. The color difference signal separator 623 performs an operation reverse to that of the color difference signal multiplexer 622. That is, the color-difference signals multiplexed in a dot-sequential manner are alternately taken out to the outputs of the two systems, so that the separated color-difference signals (RY, B- are output to the color-difference signal output terminals 624 and 625.
Y) is obtained.

When displaying a still image as a monochrome screen, the field memory 602 and switch (S
₁ ) 603, line buffers 604, 605, and switch (S ₂ ) 606 can be removed.

[0027]

According to the present invention, by providing a line memory and a field memory, when switching to a still image, both the image and the moving image stored in the field memory are of the same size on the same screen. There is an effect that you can see the image.

[Brief description of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a block diagram showing a specific example of a scanning line conversion circuit for a luminance signal.

FIG. 3 is a block diagram showing a specific example of a scanning line conversion circuit for color difference signals.

FIG. 4 is a schematic diagram illustrating a method of multiplexing color difference signals.

FIG. 5 is a timing chart showing the operation of the line memory.

FIG. 6 is a schematic diagram for explaining the operation of the line memory when there are two screens.

FIG. 7 is a conceptual diagram of a screen of a dual screen television according to the present invention.

FIG. 8 is a conceptual diagram of a PinP (picture-in-picture) screen.

FIG. 9 is an explanatory diagram for explaining a small screen insertion method.

FIG. 10 is an explanatory diagram for explaining a small screen insertion method.

FIG. 11 is a block diagram showing a conventional small screen insertion television.

[Explanation of symbols]

401 ... Antenna, 403 ... Image processing circuit, 404 ... CRT, 405 ... Tuner, 406 ... IF / video detection circuit, 407 ... Sync separation circuit, 501 ... Scan line conversion circuit, 502 ... Deflection circuit, 601 ... Luminance signal input terminal , 6
02 ... field memory, 603 ... switch (S ₁ ),
604, 605 ... Line buffer, 606 ... Switch (S ₂ ), 607 ... Switch (S ₃ ), 608, 609,
610 ... Line memory, 611 ... Switch (S ₄ ), 6
12 ... Averager, 613 ... Signal multiplexer, 614 ... Luminance signal output terminal, 615 ... Sync signal input terminal, 616 ... Control circuit, 617 ... Screen changeover switch (S ₅ ), 620, 62
1 ... Color difference signal input terminal, 622 ... Color difference signal multiplexer, 62
3 ... Color difference signal separator, 624, 625 ... Color difference signal output terminal

Claims (4)

[Claims] 1. A compression means for compressing an image in half in the horizontal direction, a storage compression means for storing a video signal and capable of compressing the image in half in the horizontal direction, and the storage means on the same screen. High image quality with a dual-screen display function, characterized by having switching means for switching the image output from the compression means and the image output from the storage compression means, and being capable of displaying two screens at the same time. Television receiver. 2. The high-definition television receiver with a dual-screen display function according to claim 1, wherein the compression means compresses and outputs a moving image. Machine. 3. The high-definition television receiver with dual-screen display function according to claim 1, wherein the storage compression means compresses and outputs a still image. Receiving machine. 4. The high-definition television receiver with a dual-screen display function according to claim 1, wherein two color difference signals obtained by Y / C separating the input signals are dot-sequentially multiplexed and then compressed. High-definition television receiver with a dual-screen display function, characterized in that processing is performed by the means and the storage compression means.