JPH0837433A - High frequency power amplifier - Google Patents

Abstract

PURPOSE:To obtain.the high frequency power amplifier in which a drain efficiency is considerably improved. CONSTITUTION:An input side RF terminal 5 connects to a gate 9 of an FET 60 via an input matching line 7. A source 10 of the FET 60 connects to ground. Furthermore, a drain 11 of the FET 60 connects to an output RF terminal 14 via an output matching line 12. An output impedance control circuit 31 provided with a 1st line 16 and a 1st capacitor 17 is connected to a line connecting to the drain 11 of the FET 60. A second harmonic wave input impedance control circuit 32 provided with a grounding use 2nd capacitor 22 and a 2nd lien (21) whose length Ld is longer than nearly a 1/4 wavelength with respect to the basic wave frequency is connected to the line connecting to the gate 9 of the FET 60. Thus, the impedance against harmonics is controlled at the input of a power TR.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio frequency (RF) power amplifier for obtaining high frequency power by using a semiconductor element, such as is mainly used in a transmitting circuit section of a communication device using a microwave band.

[0002]

2. Description of the Related Art In recent years, with the widespread use of communication devices such as mobile phones, there has been an increasing demand for microwave band high frequency power amplifiers. Along with this, there is an increasing demand for high-frequency power amplifiers to operate at low voltage, have high efficiency, and be small and lightweight. Therefore, GaAs devices, which are suitable for lower voltage operation and higher efficiency than silicon devices, tend to be used in high-frequency power amplifiers.

In designing a circuit for a high frequency power amplifier,
If the output circuit of the included switching element, such as a transistor, is designed considering not only the fundamental frequency but also harmonic components, the high-frequency power amplifier will be more efficient than if it is designed considering only the fundamental frequency. It has been reported to work with. For example, "ATh by David M. Snider
eoretical Analysis and Experimental Confirmation o
f the Optimally Loaded and Overdriven RF Power Amp
lifier ", IEEE Trans. on Electron Devices, Vol.ED-1
4, No. 12, pp.851-857 (Dec.1967), in addition to obtaining impedance matching at the fundamental frequency at the output terminal of the transistor included in the high frequency power amplifier, It has been introduced to realize the optimum efficiency condition that the impedance becomes zero with respect to the harmonic component of the frequency. JP-A-58-159002 and JP-A-62-114310 disclose specific circuit configurations for satisfying the above optimum efficiency conditions. Furthermore, Nakayama et al., "UHF band low voltage operation high efficiency and high output FET amplifier", Technical Report (TECHNICAL REPORT OFIEIC)
E.), ED93-170, MW93-127, ICD93-185 (1994-01),
As an example of the specific circuit configuration as described above, GaAs
Output power 3 at a frequency of 935 MHz and a drain voltage of 3.3 V in a two-stage high frequency power amplifier using FETs.
It is reported that 1 dBm and an efficiency of 61.5% were obtained.

Hereinafter, with reference to the drawings, JP-A-58-58
The conventional high frequency power amplifier shown in Japanese Patent No. 159002 will be described.

FIG. 1 is a circuit diagram of a conventional high frequency power amplifier 50. The high-frequency power amplifier 50 is provided on a substrate having a relative permittivity ε _r of a predetermined value, and has a power field effect transistor (hereinafter referred to as FET) 60 and an FET.
The input impedance matching circuit 70 is connected to the input side of the FET 60, and the output impedance matching circuit 80 is connected to the output side of the FET 60. The input impedance matching circuit 70 matches the impedance of the external circuit connected to the input side RF terminal 5 with the internal impedance of the FET 60. Similarly, the output impedance matching circuit 80 matches the impedance of the external circuit connected to the output RF terminal 14 with the internal impedance of the FET 60.

In the input impedance matching circuit 70, the gate 9 of the FET 60 is connected to the input RF terminal 5 via the input DC blocking capacitor 6 and the input matching line 7. The input side matching line 7 is connected to the gate bias voltage supply terminal 1 via the resistor 3 and grounded via the input side matching capacitor 8.

On the other hand, in the output impedance matching circuit 80, the drain 11 of the FET 60 is connected to the output RF terminal 14 via the output DC blocking capacitor 13 and the output matching line 12. The output side matching line 12 is connected to the drain bias voltage supply terminal 2 via the choke coil 4 and is grounded via the output side matching capacitor 15. Furthermore, FE
A first line 16 and a first capacitor 17 are connected in series between a point A of the line connected to the drain 11 of T60 and the ground level.

The source 10 of the FET 60 is directly grounded.

In the configuration described above, the input impedance matching circuit 70 adjusts the length of the input side matching line 7 and the capacitance of the input side matching capacitor 8 to match the input impedance at the fundamental frequency. Designed to take. Similarly, the output impedance matching circuit 80 is designed to match the output impedance at the fundamental frequency by adjusting the length of the output side matching line 12 and the capacitance of the output side matching capacitor 15. In the following, the input impedance for the fundamental wave (frequency f) seen from point B in FIG.
In (f), the output impedance with respect to the fundamental wave seen from the point A is abbreviated as Zout (f).

The length L of the first line 16 connected to the point A
a is a wavelength of which the electrical length corresponds to the fundamental wave frequency f of 1
It is designed to be / 4. As a result, the impedance seen from the point A to the first line 16 becomes infinite with respect to the fundamental wave. On the other hand, the length La designed as described above corresponds to ½ wavelength with respect to the second harmonic having the frequency 2f that is twice that of the fundamental wave and the wavelength of ½. . Therefore, the impedance seen from the point A to the first line 16 is zero for the second harmonic.

As a result, the circuit 31 including the first line 16 and the first capacitor 17 affects the output impedance Zout (2f) for the second harmonic and the output impedance Zout (f) for the fundamental wave. It can be controlled independently without functioning, and functions as an output impedance control circuit for the second harmonic. Hereinafter, this circuit 31 is abbreviated as the Zout (2f) control circuit 31.

In the high frequency power amplifier, when the FET 60 to be used is determined, the optimum values of the impedances Zin (f), Zout (f) and Zout (2f) required to maximize the operation efficiency are generally unambiguous. Is required.

[0013]

[Problems to be Solved by the Invention] As described above,
Using the Zout (2f) control circuit 31 as described above,
Output impedance Zout (2
In the conventional high frequency power amplifier 50 that controls only f), the total efficiency of 61.5% is obtained under the low voltage operation (3.3 V) condition in the two-stage configuration using the GaAs FET. It is difficult to realize high efficiency under the condition of low drain voltage, and the value of total efficiency of 61.5% under the condition of 3.3V operation as described above is almost the highest performance as the conventional high frequency power amplifier using GaAs FET. Is. That is, with the configuration of the conventional technique, it is difficult to achieve higher efficiency.

The present invention has been made to solve the above problems of the prior art, and an object thereof is to provide a high-frequency power amplifier with higher efficiency.

[0015]

A high frequency power amplifier of the present invention comprises a power transistor, an input impedance matching circuit connected to an input of the power transistor,
And an output impedance matching circuit connected to the output of the power transistor, the input impedance matching circuit having an input impedance control circuit for setting an input impedance for a harmonic of a fundamental frequency within a predetermined range. However, the input impedance control circuit is connected to the input of the power transistor, thereby solving the above problem.

In one embodiment, the input impedance control circuit has a resonance point for a harmonic having a frequency lower than the operating frequency band of the power transistor.

In another embodiment, the input impedance control circuit sets the input impedance for the second harmonic to point A (0 + j4Ω) and point B (0 on the Smith chart.
+ J25Ω), point C (5 + j25Ω) and point D (5 + j)
Set within the range surrounded by 4Ω).

In still another embodiment, the input impedance control circuit has a line having an electrical length longer than ¼ of a wavelength corresponding to the fundamental frequency, one end of which is connected in series to the line and the other end of which is connected. Is a capacitor that is grounded,
It has.

In still another embodiment, the input impedance control circuit includes a line having an electrical length longer than ⅛ of a wavelength corresponding to the fundamental frequency and having the other end opened.

In still another embodiment, the input impedance control circuit includes a series resonance circuit, the series resonance circuit includes a line and a capacitor having one end connected in series to the line and the other end grounded. It consists of

In still another embodiment, the output impedance matching circuit has an output impedance control circuit which is connected to the output of the power transistor and sets the output impedance for the harmonic to a predetermined value.

In yet another embodiment, the output impedance matching circuit is configured to set the output impedance for the second harmonic to a value that provides maximum operating efficiency of the power transistor.

The high frequency power amplifier of the present invention comprises a power transistor, an input impedance matching circuit connected to the input of the power transistor, and an output impedance matching circuit connected to the output of the power transistor. The input impedance matching circuit sets the input impedance for harmonics of the fundamental frequency within a predetermined range, thereby solving the above problem.

In one embodiment, the input impedance matching circuit sets the input impedance for the second harmonic to point A (0 + j4Ω) and point B (0 on the Smith chart.
+ J25Ω), point C (5 + j25Ω) and point D (5 + j)
Set within the range surrounded by 4Ω).

In another embodiment, the input impedance matching circuit has a matching line connected to the input of the power transistor, one end connected to a first predetermined position of the matching line, and the other end grounded. A first matching capacitor being connected to one end of the matching line at a second predetermined position,
A second matching capacitor whose other end is grounded, the capacitance value of the first matching capacitor, the capacitance value of the second matching capacitor, the first predetermined position, and the second predetermined position. The position of is selected so that the input impedance for the second harmonic is set within a predetermined range.

In still another embodiment, the output impedance matching circuit has an output impedance control circuit which is connected to the output of the power transistor and sets the output impedance for the harmonic to a predetermined value.

In yet another embodiment, the output impedance matching circuit is configured to set the output impedance for the second harmonic to a value that provides maximum operating efficiency of the power transistor.

[0028]

In the high frequency power amplifier of the present invention defined in claim 1, the input impedance matching circuit is provided with an input impedance control circuit for controlling the input impedance with respect to the harmonic. This controls the input impedance for harmonics of the fundamental frequency. By this control, the voltage waveform at the gate end of the power transistor included in the high frequency power amplifier is shaped from a sine wave shape to a shape close to a trapezoidal wave. By making the gate voltage waveform close to a trapezoidal wave, the voltage / current switching at the drain end is promoted, and the time when current and voltage are simultaneously generated at the drain end is shortened. As a result, the power dissipated as heat inside the power transistor is reduced, and the efficiency of conversion into radio frequency (RF) power is improved. as a result,
The efficiency of the high frequency power amplifier is dramatically improved.

The input impedance control circuit according to claim 2
As defined in 1), the power transistor has a resonance point with respect to a harmonic having a frequency lower than the operating frequency band.

Alternatively, the input impedance control circuit sets the input impedance for the second harmonic wave.
Set within the range specified in. As a result, the phase angle of the input impedance with respect to the second harmonic is 130 ° to 17 °.
The impedance is controlled to be 0 °, and the input impedance for the second harmonic is set in the inductor region.

The input impedance control circuit having the above-mentioned operation is configured to have the configuration defined in any one of claims 4 to 6, for example.

On the other hand, in the high frequency power amplifier of the present invention defined in claim 9, the input impedance matching circuit is appropriately configured without using the input impedance control circuit as described above. The same operation as the high-frequency power amplifier defined in 1) is obtained.

In this case, the input impedance matching circuit sets the input impedance for the second harmonic wave.
Set to the range specified as 0. As a result, the phase angle of the input impedance with respect to the second harmonic is 130 ° to 1
The impedance is controlled to be 70 °, and the input impedance for the second harmonic is set in the inductor area.

The input impedance matching circuit having the above-mentioned action has a matching line connected to the input of the power transistor and a first predetermined position of the matching line as defined in, for example, claim 11. And a grounded first matching capacitor and a second matching capacitor connected to a second predetermined position of the matching line and grounded. Then, by controlling the capacitance value of the first matching capacitor, the capacitance value of the second matching capacitor, the first predetermined position and the second predetermined position, the input impedance for the second harmonic is within a predetermined range. Set to.

The output impedance control circuit defined in claims 7 and 12 controls the output impedance for the second harmonic and sets it to a predetermined value. As a result, more efficient output impedance matching is achieved, and the operating efficiency of the high frequency power amplifier is further improved.

Alternatively, as defined in claims 8 and 13, the output impedance control circuit is configured such that the output impedance for the second harmonic is set to a value that provides the maximum operating efficiency of the power transistor.
This improves the operating efficiency of the high frequency power amplifier.

[0037]

Embodiments of the high frequency power amplifier of the present invention will be described below with reference to the drawings. In the following description, the same reference numerals will be given to parts equivalent to those in the drawings described before.

(Embodiment 1) FIG. 2 is a circuit diagram of a high frequency power amplifier 100 according to a first embodiment of the present invention.

The high frequency power amplifier 100 is provided on a substrate having a relative permittivity ε _r of a predetermined value, and the FET 6
0, an input impedance matching circuit 170 connected to the input side of the FET 60, and an output impedance matching circuit 80 connected to the output side of the FET 60. The high frequency power amplifier 100 is different in the configuration of the input impedance matching circuit 170 from the configuration of the conventional high frequency power amplifier described above with reference to FIG.

Specifically, at a point B of the line connected to the gate 9 of the FET 60, a second line 21 having a length Ld and a second capacitor 22 for grounding the second line 21 are connected in series. Has been done. If the length Ld of the second line 21 is designed so that its electrical length corresponds to approximately ¼ wavelength with respect to the fundamental wave frequency, the impedance seen from the point B to the second line 21 is the fundamental wave. Is infinite to. on the other hand,
Since the length Ld designed as described above corresponds to a half wavelength for the second harmonic having a half wavelength of the fundamental wave, the second line 21 is seen from the point B. The impedance is almost zero for the second harmonic. As a result, the circuit 3 including the second line 21 and the second capacitor 22 is provided.
2 is the input impedance Zin for the second harmonic
(2f) is the input impedance Zin for the fundamental wave
It can be controlled independently without affecting (f), and functions as an input impedance control circuit for the second harmonic. In the following, this circuit 32 is referred to as Zin (2
f) Abbreviated as control circuit 32.

As the FET 60 used in the high frequency power amplifier 100, for example, a GaAs MESFET can be used. Such a GaAs MESFET
Is, for example, after ion-implanting silicon on a semi-insulating GaAs substrate, annealing is performed to form a channel,
It can be formed by recessing the channel. The parameters of the FET 60 are typically total gate width (Wg) = 12 mm, saturation current (Idss) =
2.5 A, gate-source breakdown voltage of 10 V or higher, and gate-drain breakdown voltage of 20 V or higher.

Impedances Zin required to maximize the operating efficiency of the FET 60 at the fundamental frequency.
The optimum values of (f), Zout (f) and Zout (2f) are uniquely obtained. For example, the fundamental frequency f
= 950 MHz, drain voltage 3.5 V, input power 20
Under the condition of dBm, the length Ld of the second line 21 is
On the substrate whose electric length is relative permittivity (ε _r ) = 10, Ld = corresponding to approximately ¼ wavelength for a frequency of 950 MHz
When adjusted to 30 mm, the optimum value of each impedance is Zin (f) = 4 + j12Ω, Zout, respectively.
(F) = 6 + j1Ω, Zout (2f) = 0.5 + j1
It is 3Ω. Optimal values are plotted on the Smith chart shown in FIG.

Next, in order to investigate the region of the input impedance Zin (2f) for the second harmonic which provides good drain efficiency, the output of the high frequency power amplifier 100 with the change in the length Ld of the second line 21. The change in characteristics was investigated. Specifically, the length Ld of the second line 21 is changed from 28 mm to 35 mm on a substrate having a relative permittivity (ε _r ) = 10 to input impedance Zi for the second harmonic.
The change in n (2f) was measured. FIG. 4 is a Smith chart showing the measurement results.

As shown in FIG. 4, the input impedance Zin (2f) for the second harmonic is centered on the short-circuit point S (0 + j0Ω) on the Smith chart, and the point G (1.5 + j).
25Ω) to point I (1.5-j25Ω).
In this way, if the length Ld of the second line 21 is changed, the input impedance Zin (2f) for the second harmonic is changed to a Smith chart without changing the input impedance Zin (f) for the fundamental wave. It can be changed so as to draw an arc centered on the short-circuit point S (= 0 + j0Ω).

FIG. 5 shows the phase angle of the input impedance Zin (2f) with respect to the second harmonic and the high frequency power amplifier 10.
The relationship with the output characteristics of 0 (drain efficiency and output power) is shown. Similarly to the above, the length Ld of the second line 21 is set to 28
The input impedance Zin (2f) for the second harmonic viewed from the point B was changed as shown in FIG. The measurement is the fundamental frequency 950
It was performed under the conditions of MHz, drain voltage 3.5 V, and input power 20 dBm.

From this, when the phase angle of the input impedance Zin (2f) with respect to the second harmonic is 160 °, that is, Zin (2f) = 0.5 + j9Ω, the output power 3
Very good characteristics of 2.5 dBm and a drain efficiency of 75% were obtained. This characteristic is an improvement of 10% in terms of drain efficiency as compared with the conventional technique. Further, the phase angle of the input impedance Zin (2f) with respect to the second harmonic is 130 ° to 170 °, that is, Zin (2f) =
In the range of 0 + j4Ω (point A) to 1.5 + j25Ω (point G), the high-frequency power amplifier 100 had a good drain efficiency of 70% or more.

However, the input impedance Zin (2f) for the second harmonic is in the capacitive region H (0.
5-j9Ω) and point I (1.5-j25Ω), the output characteristics are worse than the measurement results of the prior art. further,
Input impedance Zin (2f) for the second harmonic
At the short-circuit point S where is zero (0 + j0Ω), the output characteristics are extremely deteriorated.

As a result of further detailed examination, the input impedance Zin (2f) for the second harmonic is shown in FIG.
Point A (0 + j4Ω), point B on the Smith chart
(0 + j25Ω), point C (5 + j25Ω) and point D (5
+ J4Ω), the high frequency power amplifier 100 sets the fundamental wave frequency to 950 MHz, the drain voltage to 3.5 V, and the input power to 20.
Drain efficiency better than that of the conventional technology under the condition of dBm 6
It was clarified that a good operating characteristic of 5% or more was exhibited. The above range means that the input impedance Zin (2f) for the second harmonic is in the inductor region.

In the prior art, when the output impedance is to be matched, the output impedance Zout (2f) for the second harmonic is usually set to zero (= 0 + j0) and the short circuit condition is obtained for the second harmonic. To design.

Furthermore, JP-A-7-22872 (EP
-A-547871 and USP-5,347,229) provides a power amplifier using a heterojunction bipolar transistor (HBT) and having resonant circuits for harmonics at both the input and output. In the above document, the impedance for the second harmonic of the input circuit is zero (phase angle: +/− 180 °) and the impedance for the third harmonic is open (phase angle:
It is reported that high efficiency can be realized when the angle becomes 0 °). Furthermore, the termination condition of the third harmonic in the input circuit does not affect the operating characteristics of the power amplifier so much. That is, in the above-mentioned document which discloses providing an impedance matching circuit on the input side,
It is stated that high efficiency of the high frequency power amplifier is achieved when the input impedance Zin (2f) for the second harmonic becomes zero (0 + j0) and the short-circuit condition is obtained.

As described above, in the prior art, in order to improve the efficiency of the high frequency power amplifier, the input impedance Zin (2f) and the output impedance Zout (2f) for the second harmonic are set to zero. It was common sense.

However, as described above, as a result of the detailed study by the inventors, when the short-circuit condition of the input impedance Zin (2f) for the second harmonic is achieved, that is, when the phase angle is Zin (2f) = 0 + j0Ω. It was revealed that the output power and the efficiency are extremely deteriorated under the condition that the angle is 180 °, and the operation characteristics are extremely seriously affected. That is, the input impedance Zin (2f) for the second harmonic is the fundamental frequency, that is, the FET
The above Z which becomes zero at the center frequency of the 60 operating frequency band
In the case of in (2f) = 0 + j0Ω, the operating characteristics are extremely deteriorated on the lower frequency side than the center frequency.

Therefore, in order to obtain good operating characteristics in the entire operating frequency band, the input impedance Zin (2f) for the second harmonic should not become zero even at the lowest frequency applied to the high frequency power amplifier. In addition, it is necessary to set the input impedance Zin (2f) for the second harmonic in the inductor area in advance.
This means that Zin connected to the input side of FET60
(2f) Control circuit (input impedance control circuit) 32
It can be realized by setting the resonance frequency of (1) to a value lower than the operating frequency.

For comparison, in the high frequency power amplifier 100 of this embodiment shown in FIG. 2, the above-mentioned maximum performance (output 3
Zin (2) with 2.5 dBm and an efficiency of 75% was obtained.
f) = 0.5 + j9Ω from the configuration corresponding to Zin (2
f) The operation characteristics of the configuration with the control circuit 32 removed were evaluated. Even if the Zin (2f) control circuit 32 is removed, the input impedance Zin (f) for the fundamental wave does not change, but the input impedance Z for the second harmonic is Z.
in (2f) changes and Zin (2f) = 45-j1
It became 00Ω. The characteristics of the high frequency power amplifier at this time are
Under the conditions of a fundamental wave frequency of 950 MHz, a drain voltage of 3.5 V, and an input power of 20 dBm, the output power was 31.5 dBm and the drain efficiency was 65% (shown as "conventional example" in FIG. 5). As described above, in the high frequency power amplifier 100 of this embodiment including the Zin (2f) control circuit 32,
Under the same conditions, operating characteristics with an output power of 32.5 dBm and a drain efficiency of 75% are obtained. Also from this result, it is possible to use the Zin (2f) control circuit 32 as in the present embodiment.
It was confirmed that setting the input impedance Zin (2f) for the second harmonic to a predetermined impedance greatly contributed to the improvement of the operating characteristics.

FIG. 7 is an analysis result by a high frequency simulator showing the relationship between the phase angle of the input impedance Zin (2f) with respect to the second harmonic and the output characteristic (drain efficiency and output power). With the drain voltage Vd = 3.5 V and the fundamental frequency f = 950 MHz, the input impedance Zin (2f) for the second harmonic was changed so as to draw an arc along the outer circumference of the Smith chart as shown in FIG. . Input / output impedance Zin for the fundamental wave
The output impedance Zout (2f) for (f), Zout (f), and the second harmonic is set to the constant values shown in FIG. 3, respectively.

As shown in FIG. 7, a result that was in good agreement with the above-mentioned actual measurement result was also confirmed by simulation. That is, when the phase angle of the input impedance Zin (2f) with respect to the second harmonic is 160 °, the output power Pout = 31.5 dBm and the drain efficiency = 76%.
That is, good characteristics are obtained. On the other hand, when the input impedance Zin (2f) for the second harmonic is zero and the phase angle is 180 °, that is, when the short-circuit condition of the input impedance Zin (2f) for the second harmonic is achieved, the output power is It was also confirmed by simulation that both the drain efficiency and the drain efficiency deteriorate and the operating characteristics deteriorate extremely.

The following is a description of the results of studies by the inventor regarding each of the mechanism of high efficiency and the cause of the extreme deterioration of the operating characteristics under the condition that the input impedance Zin (2f) for the second harmonic becomes zero.

The mechanism for improving the efficiency will be described with reference to the voltage / current waveforms at the gate end shown in FIGS. 8 (a) and 8 (b).

FIG. 8 (a) is a voltage-current waveform when the input impedance Zin (2f) for the second harmonic is optimally controlled, and FIG. 8 (b) is the input impedance Zin (for the second harmonic. It is a voltage-current waveform when 2f) is not controlled at all. Specifically, FIG. 8 (a)
Is for Zin (2f) = 0.5 + j9Ω, and FIG. 8B is for Zin (2f) = 45−j100Ω. In either case, the input power is constant at 20 dBm.

From this, when the input impedance Zin (2f) for the second harmonic is not controlled (see FIG. 8).
In FIG. 8B, it can be seen that the voltage waveform at the gate end, which is a sine wave, is close to a trapezoidal wave as shown in FIG. 8A by performing appropriate control. By making the gate voltage waveform close to a trapezoidal wave, the voltage / current switching at the drain end is promoted, and the time when current and voltage are simultaneously generated at the drain end is shortened. As a result, the power dissipated as heat inside the FET is reduced, and the efficiency of conversion into RF power is improved.

On the other hand, the cause of the deterioration of the operating characteristics is shown in FIG.
Will be described with reference to.

FIG. 8C shows a voltage / current waveform at the gate end when the input impedance Zin (2f) for the second harmonic becomes zero. In this case, the voltage / current waveform is disturbed even though the input power is constant.
Furthermore, the voltage amplitude is smaller. With such a low gate voltage, the FET included in the high frequency power amplifier cannot be driven sufficiently. As a result, under the condition that the input impedance Zin (2f) for the second harmonic is zero, both the output voltage and the efficiency are significantly deteriorated.

Table 1 shows the operating characteristics of several high frequency power amplifiers α, β and γ obtained according to this embodiment. Each high-frequency power amplifier α, β, γ is Zin (2f)
The control circuit sets the input impedance Zin (2f) for the second harmonic within the values or ranges shown in Table 1.

For comparison, Table 1 shows the operating characteristics of the high frequency power amplifier ε set to the input impedance Zin (2f) = 0 + j0Ω for the second harmonic and the control of the input impedance Zin (2f) for the second harmonic. The measurement results of the operating characteristics of the conventional high-frequency power amplifier that does not perform are also shown together.

In each of the high-frequency power amplifiers, the input / output impedance for the fundamental frequency and the output impedance for the second harmonic are the optimum values shown in FIG. 3, that is, Zin (f) = 4 + j12Ω, Zout.
(F) = 6 + j1Ω and Zout (2f) = 0.5 + j
It is designed to be 13Ω. In addition, the measurement of the operating characteristics was performed with a fundamental frequency of 950 MHz and a drain voltage of 3.5.
It was performed under the conditions of V and input power of 20 dBm. Also,
A substrate having a relative permittivity ε _r = 10 is used.

As is clear from Table 1, the high frequency power amplifier α constructed according to this embodiment for controlling the input impedance Zin (2f) for the second harmonic,
With β and γ, the operating characteristics are improved as compared with the conventional example in which control is not performed.

[0067]

[Table 1]

As described above, in the high frequency power amplifier 100 of the present embodiment, the Zin (2f) control circuit 32 is added to the point B of the line connected to the gate 10 of the FET 60, and the input impedance Zin for the second harmonic is added. (2f) is set within a predetermined range. As a result, the operating efficiency of the high-frequency power amplifier 100 is improved by up to 10% in drain efficiency as compared with the conventional one, and a drain efficiency of 75% is obtained.

However, under the condition that the input impedance Zin (2f) for the second harmonic is zero (phase angle 180 °), both the output power and the efficiency are extremely deteriorated, resulting in a result inferior to the prior art. . Therefore, at the operating frequency, the input impedance Zi for the second harmonic is
It is important to properly design the Zin (2f) control circuit (input impedance control circuit) 32 included in the input impedance matching circuit 70 so that n (2f) does not become zero.

Input impedance Z for the second harmonic
In order to set in (2f) to an appropriate value, the length Ld of the second line 21 and / or the second capacitor included in the Zin (2f) control circuit 32 is set for a predetermined operating frequency value. The capacity of 22 may be set appropriately. Specifically, the length Ld of the second line 21 is set so that its electrical length is longer than 1/4 of the wavelength corresponding to the fundamental frequency. Then, the set length Ld of the second line 21 is set.
Based on the input impedance Z for the second harmonic
The capacitance of the second capacitor 22 is set so that in (2f) is included in the hatched area shown in FIG. For example, when a substrate having a fundamental frequency f = 950 MHz and ε _r = 10 is used, the length Ld of the second line 21 is set to 30 mm, which is longer than 30 mm which is ¼ of the wavelength corresponding to the fundamental frequency. It may be set in the range of 5 mm to 35 mm and the capacitance of the second capacitor 22 may be set in the range of 50 pF to 1000 pF.

(Second Embodiment) In the high frequency power amplifier 100 of the first embodiment, the input impedance Z with respect to the second harmonic is given.
A short stub type Zin (2f) control circuit (input impedance control circuit) 32 is adopted as a means for making in (2f) a predetermined impedance. On the other hand, the high frequency power amplifier 200 of this embodiment described below employs an open stub type Zin (2f) control circuit (input impedance control circuit).

FIG. 9 shows a high frequency power amplifier 20 of this embodiment.
It is a circuit diagram of 0. The high frequency power amplifier 200 is an FET
60, an input impedance matching circuit 270 connected to the input side of the FET 60, and an output impedance matching circuit 80 connected to the output side of the FET 60. The high-frequency power amplifier 200 is different from the high-frequency power amplifier 100 of the first embodiment described above with reference to FIG. 2 in the configuration of the input impedance matching circuit 270.

Specifically, the point B of the high-frequency power amplifier 200 is connected to the third line 23 having one open end, and this line 23 is made to function as the Zin (2f) control circuit 33. The length Le of the third line 23 is set so that its electrical length is slightly longer than approximately 1/8 of the wavelength corresponding to the fundamental frequency. The other circuit configuration is the same as that of the high frequency power amplifier 100 of the first embodiment including the FET 60 to be used, and the same components are designated by the same reference numerals, and thus detailed description thereof will be omitted here. .
Moreover, each impedance Zin (f), Zout (f)
And Zout (2f) are set to the same values as shown in FIG.

Similar to the first embodiment, the fundamental wave frequency f =
The evaluation was performed at 950 MHz. The length Le of the third line 23 is set to be longer than 15 mm, which corresponds to approximately 1/8 of the wavelength with respect to the fundamental wave frequency of 950 MHz on the substrate whose electrical length is ε _r = 10, and the input for the second harmonic wave is set. Impedance Zin (2f) = 0.5 + j9Ω. At this time, the characteristics of the high frequency power amplifier 200 are an output power of 32.5 dBm and a drain efficiency of 75% under the conditions of a fundamental wave frequency of 950 MHz, a drain voltage of 3.5 V and an input power of 20 dBm. This is the amplifier α shown in Table 1.
It had the same characteristics as.

Next, the length Le of the third line 23 is set to 13 m.
When changing from m to 20 mm, the input impedance Zin (2f) for the second harmonic fluctuated in a large arc around the short-circuit point S on the Smith chart, almost in the same manner as the case shown in FIG. . The area S where the input impedance Zin (2f) for the second harmonic is shown in Table 1
Characteristics of the high frequency power amplifier 200 were the same as those of the high frequency power amplifier β shown in Table 1.

As a result of further detailed examination, Example 2
Also in the high frequency power amplifier 200 of No. 2, if the value of the input impedance Zin (2f) for the second harmonic is set to each value or range shown in Table 1, the corresponding values are obtained in Table 1.
It has been clarified that the same operating characteristics as the high frequency power amplifiers α, β and γ shown in FIG.

As described above, in the high frequency power amplifier 200 of the present embodiment, the open stub type Zin (2f) control circuit (input impedance control circuit) 33 is replaced by the point B in place of the short stub type used in the first embodiment. Connected to. Then, for the value of the predetermined operating frequency, Zin
(2f) The length Le of the third line 23 included in the control circuit 33 is set to 1 at a wavelength whose electrical length corresponds to the fundamental frequency.
The input impedance Zin (2f) for the second harmonic is set to be longer than / 8 so as to be included in the shaded area shown in FIG. As a result, the same performance as that of the first embodiment can be obtained. Specifically, when the substrate having the fundamental frequency f = 950 MHz and the relative permittivity ε _r = 10 is used, the length Le of the third line 23 is
The electrical length may be set in the range of 15.5 mm to 20 mm, which is longer than 15 mm, which is equal to 1/4 of the wavelength corresponding to the fundamental frequency.

(Embodiment 3) In the high frequency power amplifier 300 of this embodiment described below, the short stub system of Embodiment 1 is used as means for setting the input impedance Zin (2f) for the second harmonic within a predetermined range. Zin (2
f) Instead of the control circuit (input impedance control circuit) 32 or the open stub type Zin (2f) control circuit (input impedance control circuit) 33 of the second embodiment,
An LC series resonance type Zin (2f) control circuit (input impedance control circuit) is adopted.

FIG. 10 shows the high frequency power amplifier 3 of this embodiment.
It is a circuit diagram of 00. The high frequency power amplifier 300 is FE
T60, an input impedance matching circuit 370 connected to the input side of the FET 60, and an output impedance matching circuit 80 connected to the output side of the FET 60.
The high frequency power amplifier 300 is different from the high frequency power amplifier 100 of the first embodiment described above with reference to FIG.
The configuration of the input impedance matching circuit 370 is different.

Specifically, the point B of the high-frequency power amplifier 300 has a fourth line 24 and one or two of which one end is grounded.
A fourth capacitor 25 having a capacitance value of about pF is connected. The length Lf of the fourth line 24 is about 1/16 of the wavelength with respect to the fundamental wave frequency on a substrate whose electrical length is ε _r = 10, and the impedance seen from the point B to the fourth line 25 is It is almost zero for the second harmonic.
On the other hand, the above capacitance value of the fourth capacitor 25 is smaller than the capacitance value of the second capacitor 22 included in the Zin (2f) control circuit 32 of the first embodiment, and is not short-circuited with respect to the second harmonic. Is set to any value. As a result, the circuit 3 including the fourth line 24 and the fourth capacitor 25
4 is set to resonate in series with the second harmonic. In the high frequency power amplifier 300, this circuit 34 is
It functions as the in (2f) control circuit 34. The other circuit configuration is the same as that of the high-frequency power amplifier 100 of the first embodiment including the FET 60 to be used, and the same components are designated by the same reference numerals, and thus detailed description thereof will be omitted here. In addition, each impedance Zin
(F), Zout (f) and Zout (2f) are set to the same values as shown in FIG. 3, respectively.

Similar to the first embodiment, the fundamental wave frequency f =
The evaluation was performed at 950 MHz. The length Lf of the fourth line 24 was 10 mm, the capacitance of the fourth capacitor 25 was 1.2 pF, and the input impedance Zin (2f) = 0.5 + j9Ω for the second harmonic. Further, the relative permittivity ε _r of the substrate is 10. At this time, the characteristics of the high frequency power amplifier 300 are an output power of 32.5 dBm and a drain efficiency of 75% under the conditions of a fundamental wave frequency of 950 MHz, a drain voltage of 3.5 V and an input power of 20 dBm. This had the same characteristics as the amplifier α shown in Table 1.

Next, the capacitance of the fourth capacitor 25 is set to 1.
The length Lf of the fourth line 24 is kept constant at 2 pF.
When is changed from 7.5 mm to 14.5 mm, the input impedance Zin (2f) for the second harmonic is largely arced around the short-circuit point S on the Smith chart, as in the case shown in FIG. It changed and drew. When the input impedance Zin (2f) for the second harmonic was in the region S shown in Table 1, the characteristics of the high frequency power amplifier 300 were the same as those of the high frequency power amplifier β shown in Table 1.

As a result of further detailed examination, Example 3
Also in the high frequency power amplifier 300, if the value of the input impedance Zin (2f) with respect to the second harmonic is set to each value or range shown in Table 1, the corresponding table 1 is obtained.
It has been clarified that the same operating characteristics as the high frequency power amplifiers α, β and γ shown in FIG.

As described above, in this embodiment, the LC series resonance type Zin (2f) control circuit (input impedance control circuit) 34 is connected to the point B. Then, the length Lf of the fourth line 24 and / or the capacitance of the fourth capacitor 25 included in the Zin (2f) control circuit 34 are appropriately set with respect to the value of the predetermined operating frequency. As a result, the input impedance Zin (2
By setting f) so that it is included in the shaded area shown in FIG. 6, the same performance as that of the first embodiment can be obtained.
Specifically, on a substrate with ε _r = 10, the fundamental frequency f =
In the case of 950 MHz, the length Lf of the fourth line 24 may be set in the range of 10 mm to 13 mm, and the capacitance of the fourth capacitor 25 may be set in the range of 1.2 pF to 1.3 pF.

(Fourth Embodiment) In the high frequency power amplifier 400 of the present embodiment, the input impedance Zin for the fundamental wave is obtained.
In controlling the input impedance Zin (2f) for the second harmonic while keeping (f) at a constant value, the Zin (2f) control circuit (input impedance control circuit) used in the above-described embodiments is used. Do not control.

FIG. 11 shows the high frequency power amplifier 4 of this embodiment.
It is a circuit diagram of 00. The high frequency power amplifier 400 is FE
T60, an input impedance matching circuit 470 connected to the input side of the FET 60, and an output impedance matching circuit 80 connected to the output side of the FET 60.
The high-frequency power amplifier 400 is different from the high-frequency power amplifier 100 of the first embodiment described above with reference to FIG.
The configuration of the input impedance matching circuit 470 is different.

Specifically, the Zin (2f) control circuit is not connected to the point B of the high frequency power amplifier 400.
On the other hand, in addition to the input side matching capacitor 8, the second input side matching capacitor 27 is provided on the input side matching line 7.
Is connected. As shown in FIG. 11, the input side matching capacitors 8 and 27 are respectively connected to Lg + L from one end of the input side matching line 7 close to the FET 60.
It is connected to the positions of h and Lg. In the high frequency power amplifier 400, the capacitance value Cin of the input side matching capacitor 8 is
The capacitance value Cin of the first and second input side matching capacitors 27
2, and the lengths Lg and Lh that determine the connection positions of the capacitors 8 and 27 are appropriately adjusted to adjust the input impedance Zin (2f) for the second harmonic. The other circuit configuration is the same as that of the high frequency power amplifier 100 of the first embodiment including the FET 60 used,
The same components are denoted by the same reference numerals, and a detailed description thereof will not be repeated. Further, each impedance Zin (f), Zout (f) and Zout (2f)
Are set to the values shown in FIG. 3, respectively.

Similar to the first embodiment, the fundamental wave frequency f =
The evaluation was performed at 950 MHz. The values of the above-mentioned parameters are Cin1 = 6pF and Cin2 = 5p, respectively.
When F, Lg = 6 mm and Lh = 5 mm, the input impedance Zin (2
f) = 0.5 + j9Ω. Relative permittivity of substrate ε _r = 1
0. At this time, the characteristics of the high frequency power amplifier 400 are that the fundamental wave frequency is 950 MHz and the drain voltage is 3.5.
Output power 32.5d under the condition of V and input power 20dBm
Bm and drain efficiency are 75%. This had the same characteristics as the amplifier α shown in Table 1.

As a result of further detailed examination, Example 4
Also in the high frequency power amplifier 400 of No. 2, if the value of the input impedance Zin (2f) for the second harmonic is set to each value or range shown in Table 1, the corresponding values are obtained in Table 1.
It has been clarified that the same operating characteristics as the high frequency power amplifiers α, β and γ shown in FIG.

As described above, in this embodiment, Zin (2
f) Control the input impedance Zin (2f) for the second harmonic without using a control circuit. Therefore, the capacitance values Cin1 and Ci of the input side matching capacitors 8 and 27 are
n2 and the lengths Lg and Lh that determine the connection positions of the capacitors 8 and 27 to the input side matching line 7 are appropriately set. As a result, by setting the input impedance Zin (2f) for the second harmonic so that it is included in the shaded area shown in FIG. 6, the same performance as that of the first embodiment can be obtained.

(Fifth Embodiment) In the high frequency power amplifier 500 of the present embodiment, the output impedance Zou for the fundamental wave is obtained.
In controlling the output impedance Zout (2f) for the second harmonic while keeping t (f) at a value that provides maximum efficiency, Zo used in the above-described embodiments is used.
ut (2f) control circuit (output impedance control circuit)
Do not use

FIG. 12 shows the high frequency power amplifier 5 of this embodiment.
It is a circuit diagram of 00. The high frequency power amplifier 500 is FE
T60, an input impedance matching circuit 170 connected to the input side of the FET 60, and an output impedance matching circuit 580 connected to the output side of the FET 60.

The high frequency power amplifier 500 is different in the configuration of the output impedance matching circuit 580 from the configuration of the high frequency power amplifier 100 of the first embodiment described above with reference to FIG. On the other hand, the FET 60 and the input impedance matching circuit 170 are the same as those of the high-frequency power amplifier 100 of the first embodiment, and the same reference numerals are given to the same constituents, and thus detailed description thereof will be omitted here.

At the point B of the high-frequency power amplifier 500, the first
High frequency power amplifier 100 in the embodiment (see FIG. 2)
A short stub type Zin (2f) control circuit 32 similar to the above is connected. On the other hand, in addition to the output side matching capacitor 15, the second output side matching capacitor 28 is connected to the output side matching line 12. The output side matching capacitors 15 and 28 are, as shown in FIG.
Are connected to the positions of Li + Lj and Li respectively from one end close to. In the high-frequency power amplifier 500, the capacitance value Cout1 of the output side matching capacitor 15, the capacitance value Cout2 of the second output side matching capacitor 28, and the lengths Li and Lj that determine the connection positions of the respective capacitors 15 and 28 are set. The output impedance Zout (f) for the fundamental wave and the output impedance Zout (2f) for the second harmonic are adjusted appropriately. Specifically, the value of each parameter is set to Cout1 = 1p.
F, Cout2 = 6 pF, Li = 5.5 mm and Lj =
By setting the distance to 2 mm, the impedance seen from the point A gives maximum efficiency at the fundamental frequency of 950 MHz Zout (f) = 6 + j1Ω and Zout (2f) =
0.5 + j13Ω. Where the relative permittivity of the substrate ε _r
Is 10. These impedances have the same values as in FIG.

Similar to the first embodiment, the fundamental wave frequency f =
At 950 MHz, the length Ld of the first line 21 and the capacitance value of the first capacitor 22 included in the Zin (2f) control circuit 32 are appropriately set to adjust the input impedance, and Zin (f) = 4 + j12Ω and Zin (2
f) = 0.5 + j9Ω. At this time, the characteristics of the high frequency power amplifier 500 are an output power of 32.5 dBm and a drain efficiency of 75% under the conditions of a fundamental wave frequency of 950 MHz, a drain voltage of 3.5 V and an input power of 20 dBm. This had the same characteristics as the amplifier α shown in Table 1.

As a result of further detailed examination, Example 5
Also in the high frequency power amplifier 500 of FIG. 3, if the value of the input impedance Zin (2f) for the second harmonic is set to each value or range shown in Table 1, the corresponding values are obtained in Table 1.
It has been clarified that the same operating characteristics as the high frequency power amplifiers α, β and γ shown in FIG.

As described above, according to this embodiment, the Zin (2f) control circuit 32 similar to that of the first embodiment is used to realize
It has been clarified that the Zout (2f) control circuit may not be used when the input impedance Zin (2f) for the second harmonic is set to the optimum value. Also in this case, the length Ld of the second line 21 and / or the capacity of the second capacitor 22 included in the Zin (2f) control circuit 32 are appropriately controlled to input impedance Zin ( By setting 2f) so as to be included in the shaded area shown in FIG. 6, the same performance as that of the first embodiment can be obtained.

(Embodiment 6) FIG. 13 shows a circuit diagram of a high frequency power amplifier 600 of a sixth embodiment. The high frequency power amplifier circuit 600 has an input impedance matching circuit 2 having the same configuration as the high frequency power amplifier circuit 200 according to the second embodiment.
70, and the high frequency power amplifier circuit 500 according to the fifth embodiment
The output impedance matching circuit 580 having the same configuration as the above is provided.

The high-frequency power amplifier 600 is operated in Zout at which the operating efficiency is maximized at the fundamental frequency of 950 MHz.
(F) = 6 + j1Ω, Zout (2f) = 0.5 + j1
It is designed so that 3Ω and Zin (f) = 4 + j12Ω are obtained, and Zin including the third line 23 as in the second embodiment.
(2f) The control circuit 33 was adjusted to change the input impedance Zin (2f) for the second harmonic. As a result, also in the high frequency power amplifier 600, the value of the input impedance Zin (2f) for the second harmonic is shown in Table 1.
It has been clarified that the operating characteristics similar to those of the high frequency power amplifiers α, β and γ shown in Table 1 can be obtained correspondingly by setting the values or ranges shown in the above.

As described above, the high frequency power amplifier 6 of this embodiment is
Also in the configuration of 00, Zin (2
f) Length Le of the third line 23 included in the control circuit 33
The electrical length is 1/8 of the wavelength corresponding to the fundamental frequency.
The input impedance Zin (2f) for the second harmonic is set to be longer, so that it is included in the hatched area shown in FIG. As a result, the same performance as that of the first embodiment can be obtained.

(Embodiment 7) FIG. 14 is a circuit diagram of a high frequency power amplifier 700 according to a seventh embodiment. This high frequency power amplifier circuit 700 has an input impedance matching circuit 3 having the same configuration as the high frequency power amplifier circuit 300 of the third embodiment.
70, and the high frequency power amplifier circuit 500 according to the fifth embodiment
The output impedance matching circuit 580 having the same configuration as the above is provided.

The high frequency power amplifier 700 is operated in Zout at which the operating efficiency is maximized at the fundamental frequency of 950 MHz.
(F) = 6 + j1Ω, Zout (2f) = 0.5 + j1
3 Ω, Zin (f) = 4 + j12 Ω is designed to be obtained, and the length Lf of the fourth line 24 and the fourth capacitor 2 included in the Zin (2f) control circuit are similar to those in the third embodiment.
The capacitance value of No. 5 was set to an appropriate value and the input impedance Zin (2f) for the second harmonic was changed. As a result, also in the high frequency power amplifier 700, the value of the input impedance Zin (2f) for the second harmonic is shown in Table 1.
It has been clarified that the operating characteristics similar to those of the high frequency power amplifiers α, β and γ shown in Table 1 can be obtained correspondingly by setting the values or ranges shown in the above.

Thus, the high frequency power amplifier 7 of this embodiment is
Also in the configuration of 00, Zin (2
f) Length Lf of the fourth line 24 included in the control circuit 34
And / or the capacitance of the fourth capacitor 25 is set appropriately. By setting the input impedance Zin (2f) for the second harmonic so that it is included in the shaded area shown in FIG. 6, the same performance as that of the first embodiment can be obtained.

(Embodiment 8) FIG. 15 is a circuit diagram of a high frequency power amplifier 800 of the eighth embodiment. This high frequency power amplifier circuit 800 has an input impedance matching circuit 4 having the same configuration as the high frequency power amplifier circuit 400 in the fourth embodiment.
70, and the high frequency power amplifier circuit 500 according to the fifth embodiment
The output impedance matching circuit 580 having the same configuration as the above is provided.

The high frequency power amplifier 800 is set to Zout (f) where the efficiency is maximized for the fundamental frequency of 950 MHz.
= 6 + j1Ω, Zout (2f) = 0.5 + j13Ω,
Design to obtain Zin (f) = 4 + j12Ω,
Similar to the fourth embodiment, the capacitance value C of the input side matching capacitor 8
in1, the capacitance value C of the second input side matching capacitor 27
in2, and lengths Lg and Lh indicating connection points between them
By adjusting the input impedance Z for the second harmonic
in (2f) was changed. As a result, also in the high frequency power amplifier 800, if the value of the input impedance Zin (2f) for the second harmonic is set to each value or range shown in Table 1, each high frequency power shown in Table 1 is correspondingly set. It has been clarified that operating characteristics similar to those of the amplifiers α, β and γ can be obtained.

In this way, the high frequency power amplifier 8 of this embodiment is
Also in the configuration of 00, Zin (2
f) Control the input impedance Zin (2f) for the second harmonic without using a control circuit. Therefore, the capacitance values Cin1 and Ci of the input side matching capacitors 8 and 27 are
n2 and the lengths Lg and Lh that determine the connection positions of the capacitors 8 and 27 to the input side matching line 7 are appropriately set. As a result, by setting the input impedance Zin (2f) for the second harmonic so that it is included in the shaded area shown in FIG. 6, the same performance as that of the first embodiment can be obtained.

As shown in FIG. 6, the range of the input impedance Zin (2f) for the second harmonic in which the drain efficiency is higher than that of the conventional high frequency power amplifier is point A (0 + j4Ω), point on the Smith chart, as shown in FIG. B (0 + j25
Ω), point C (5 + j25Ω), and point D (5 + j4Ω).

[0108]

As described above, in the high frequency power amplifier of the present invention, by setting the input impedance for the second harmonic within a predetermined range, a high efficiency high frequency power amplifier as compared with the conventional one is realized. .

In the high frequency power amplifier of the present invention defined in claim 1 of the present invention, in the input impedance matching circuit,
An input impedance control circuit for controlling the input impedance with respect to harmonics is provided. This controls the input impedance for harmonics of the fundamental frequency.
By this control, the voltage waveform at the gate end of the power transistor included in the high frequency power amplifier is shaped from a sine wave shape to a shape close to a trapezoidal wave. By making the gate voltage waveform close to a trapezoidal wave, the voltage / current switching at the drain end is promoted, and the time when current and voltage are simultaneously generated at the drain end is shortened. As a result, the power dissipated as heat inside the power transistor is reduced, and the efficiency of conversion into radio frequency (RF) power is improved. As a result, the efficiency of the high frequency power amplifier is dramatically improved. Specifically, as a result of trial manufacture and evaluation of a high frequency power amplifier using a GaAs FET, in a low voltage operation with a drain voltage of 3.5 V, for example, a conventional high frequency power amplifier with an output power of 32.5 dBm and a drain efficiency of 75% is leap forward. Performance exceeding that has been achieved. This is an improvement in drain efficiency of up to 10% compared to the prior art.

The input impedance control circuit according to claim 2
As defined in 1), the power transistor has a resonance point with respect to a harmonic having a frequency lower than the operating frequency band.

Alternatively, the input impedance control circuit sets the input impedance for the second harmonic wave.
Set within the range specified in. As a result, the phase angle of the input impedance with respect to the second harmonic is 130 ° to 17 °.
The impedance is controlled to be 0 °, and the input impedance for the second harmonic is set in the inductor region.

The input impedance control circuit having the above-mentioned function is configured to have the structure defined in any one of claims 4 to 6, for example.

On the other hand, according to the high frequency power amplifier of the present invention defined in claim 9, the input impedance matching circuit is appropriately configured without using the above-mentioned input impedance control circuit. It obtains the same function as the high frequency power amplifier defined in.

In that case, the input impedance matching circuit sets the input impedance for the second harmonic wave.
Set to the range specified as 0. As a result, the phase angle of the input impedance with respect to the second harmonic is 130 ° to 1
The impedance is controlled to be 70 °, and the input impedance for the second harmonic is set in the inductor area.

The input impedance matching circuit having the above-mentioned operation has, for example, as defined in claim 11, a matching line connected to the input of the power transistor and a first predetermined position of the matching line. And a second matching capacitor connected to and grounded and a second matching capacitor connected to a second predetermined position of the matching line and grounded. Then, by controlling the capacitance value of the first matching capacitor, the capacitance value of the second matching capacitor, the first predetermined position and the second predetermined position, the input impedance for the second harmonic is within a predetermined range. Set to.

The output impedance control circuit defined in claims 7 and 12 controls the output impedance for the second harmonic and sets it to a predetermined value. As a result, more efficient output impedance matching is achieved, and the operating efficiency of the high frequency power amplifier is further improved.

Alternatively, as defined in claims 8 and 13, the output impedance control circuit is configured such that the output impedance for the second harmonic is set to a value that brings about the maximum operating efficiency of the power transistor.
This improves the operating efficiency of the high frequency power amplifier.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a conventional high frequency power amplifier.

FIG. 2 is a circuit diagram showing a configuration of a high frequency power amplifier according to a first embodiment of the present invention.

3] Zin (f) and Zo of the high frequency power amplifier of FIG.
It is a Smith chart figure which shows the optimal value of ut (f) and Zout (2f).

4 is a Smith chart showing changes in Zin (2f) when the length Ld of the second line included in the high-frequency power amplifier in FIG. 2 is changed.

5 is a diagram showing output characteristics of the high frequency power amplifier when the length Ld of the second line included in the high frequency power amplifier of FIG. 2 is changed.

FIG. 6 shows Zin (2 in the high-frequency power amplifier of the present invention.
It is a Smith chart figure which shows the preferable range of f).

FIG. 7 is a diagram showing a simulation result regarding a relationship between a phase angle of Zin (2f) and an output characteristic of a high frequency power amplifier.

8 (a) to 8 (c) are diagrams showing voltage / current waveforms at a gate terminal of an FET included in the high-frequency power amplifier of the present invention.

FIG. 9 is a circuit diagram showing a configuration of a high frequency power amplifier according to a second embodiment of the present invention.

FIG. 10 is a circuit diagram showing a configuration of a high frequency power amplifier according to a third embodiment of the present invention.

FIG. 11 is a circuit diagram showing a configuration of a high frequency power amplifier according to a fourth embodiment of the present invention.

FIG. 12 is a circuit diagram showing a configuration of a high frequency power amplifier according to a fifth embodiment of the present invention.

FIG. 13 is a circuit diagram showing a configuration of a high frequency power amplifier according to a sixth embodiment of the present invention.

FIG. 14 is a circuit diagram showing a configuration of a high frequency power amplifier according to a seventh embodiment of the present invention.

FIG. 15 is a circuit diagram showing a configuration of a high frequency power amplifier according to an eighth embodiment of the present invention.

[Explanation of symbols]

1 gate bias voltage supply terminal 2 drain bias voltage supply terminal 3 resistance 4 choke coil 5 input side RF terminal 6 input side DC blocking capacitor 7 input side matching line 8 input side matching capacitor 9 FET gate 10 FET source 11 FET Drain 12 Output-side matching line 13 Output-side DC blocking capacitor 14 Output-side RF terminal 15 Output-side matching capacitor 16 First line 17 First capacitor 21 Second line 22 Second capacitor 23 Third line 24 Fourth Line 25 Fourth Capacitor 27 Second Input-Side Matching Capacitor 28 Second Output-Side Matching Capacitor 31 Zout (2f) Control Circuit (Output Impedance Control Circuit) 32, 33, 34 Zin (2f) Control circuit (input impedance control circuit) 50, 100, 2 00, 300, 400, 500, 60
0, 700, 800 RF power amplifier 60 FET 70, 170, 270, 370, 470 Input impedance matching circuit 80, 580 Output impedance matching circuit

Claims (13)

[Claims] 1. An input impedance matching circuit, comprising: a power transistor; an input impedance matching circuit connected to an input of the power transistor; and an output impedance matching circuit connected to an output of the power transistor. The matching circuit has an input impedance control circuit that sets an input impedance for harmonics of the fundamental frequency within a predetermined range, and the input impedance control circuit is a high frequency power amplifier connected to the input of the power transistor. . 2. The high frequency power amplifier according to claim 1, wherein the input impedance control circuit has a resonance point for a harmonic having a frequency lower than an operating frequency band of the power transistor. 3. The input impedance control circuit comprises:
The high frequency power according to claim 1, wherein the input impedance for the second harmonic is set within a range surrounded by a point A (0 + j4Ω), a point B (0 + j25Ω), a point C (5 + j25Ω) and a point D (5 + j4Ω) on the Smith chart. amplifier. 4. The input impedance control circuit has a line having an electrical length longer than ¼ of a wavelength corresponding to the fundamental frequency, one end is connected in series to the line, and the other end is grounded. The high frequency power amplifier according to claim 1, further comprising a capacitor. 5. The input impedance control circuit includes a line having an electrical length longer than ⅛ of a wavelength corresponding to the fundamental frequency and having the other end open.
High frequency power amplifier. 6. The input impedance control circuit includes a series resonance circuit, and the series resonance circuit includes a line and a capacitor having one end connected in series to the line and the other end grounded. The high frequency power amplifier according to claim 1. 7. The output impedance matching circuit includes an output impedance control circuit which is connected to the output of the power transistor and sets an output impedance for the harmonic to a predetermined value. High frequency power amplifier. 8. The output impedance matching circuit is 2
7. The high frequency power amplifier according to claim 1, wherein the output impedance with respect to the second harmonic is set to a value that provides the maximum operating efficiency of the power transistor. 9. A power transistor, an input impedance matching circuit connected to an input of the power transistor, and an output impedance matching circuit connected to an output of the power transistor. The matching circuit is a high frequency power amplifier that sets the input impedance for harmonics of the fundamental frequency within a predetermined range. 10. The input impedance matching circuit comprises:
The input impedance for the second harmonic is the point A (0 + j4Ω), the point B (0 + j25Ω) on the Smith chart,
The high frequency power amplifier according to claim 9, wherein the high frequency power amplifier is set within a range surrounded by a point C (5 + j25Ω) and a point D (5 + j4Ω). 11. The input impedance matching circuit comprises a matching line connected to the input of the power transistor, one end of which is connected to a first predetermined position of the matching line and the other end of which is grounded. 1 matching capacitor, and a second matching capacitor having one end connected to a second predetermined position of the matching line and the other end grounded, the capacitance value of the first matching capacitor, The capacitance value of the second matching capacitor, the first predetermined position and the second predetermined position are selected so that the input impedance for the second harmonic is set within a predetermined range. 9. High frequency power amplifier. 12. The output impedance matching circuit comprises:
The high frequency power amplifier according to claim 9, further comprising an output impedance control circuit connected to an output of the power transistor and setting an output impedance for the harmonic to a predetermined value. 13. The output impedance matching circuit comprises:
The high frequency power amplifier according to any one of claims 9 to 11, which is configured to set an output impedance with respect to a second harmonic to a value that provides a maximum operating efficiency of the power transistor.