JPH0837269A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH0837269A JPH0837269A JP6170615A JP17061594A JPH0837269A JP H0837269 A JPH0837269 A JP H0837269A JP 6170615 A JP6170615 A JP 6170615A JP 17061594 A JP17061594 A JP 17061594A JP H0837269 A JPH0837269 A JP H0837269A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- island
- lead
- recess
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/79—Apparatus for Tape Automated Bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は樹脂封止型半導体装置に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device.
【０００２】[0002]
【従来の技術】従来の樹脂封止型半導体装置は、図３に
示すように、吊りピン１で支持されたアイランド２ａの
上にＩＣチップ９を搭載してリードフレームのインナリ
ード６との間をボンディングワイヤ１０により電気的に
接続し、樹脂体７により封止していたが、ＩＣチップ９
の高集積化が進むにつれてリード数も増加し、樹脂封止
時の樹脂の流れによってボンディングワイヤ１０が変形
し、近接する隣のボンディングワイヤやＩＣチップと接
触して短絡したり、ボンディングワイヤが伸びて切断さ
れたりする事故が多くなって来た。2. Description of the Related Art In a conventional resin-sealed semiconductor device, as shown in FIG. 3, an IC chip 9 is mounted on an island 2a supported by suspension pins 1 and is mounted between inner leads 6 of a lead frame. Were electrically connected by a bonding wire 10 and were sealed by a resin body 7.
As the number of leads increases, the number of leads increases, the bonding wire 10 is deformed by the flow of resin at the time of resin encapsulation, and the adjacent bonding wire or IC chip in the vicinity is short-circuited or the bonding wire is extended. There are more and more accidents where people get disconnected.
【０００３】そこで、図４に示すように、サスペンダ４
の上に配列したリードを有するＴＡＢテープのインナリ
ードをＩＣチップ３と接続して形成したＴＡＢデバイス
のアウタリード５をリードフレームのインナリード６に
接続し、ＴＡＢデバイスおよびリードフレームのインナ
リード６を含む領域を樹脂体６で封止することにより、
ボンディングワイヤの接触や断線による事故を防止でき
るようになった。Therefore, as shown in FIG.
The outer lead 5 of the TAB device, which is formed by connecting the inner lead of the TAB tape having the leads arranged above the IC chip 3, is connected to the inner lead 6 of the lead frame, and the inner lead 6 of the TAB device and the lead frame is included. By sealing the area with the resin body 6,
It has become possible to prevent accidents due to contact and disconnection of bonding wires.
【０００４】[0004]
【発明が解決しようとする課題】この従来の樹脂封止型
半導体装置は、ＴＡＢデバイスを用いることによりボン
ディングワイヤで接続する場合に比べて樹脂封止時の樹
脂の流れに対する強度を増加させることはできたが、Ｉ
Ｃチップの集積度がさらに進むとＴＡＢテープのリード
数が増えリードも細くなり、その結果サスペンダが樹脂
の流れによりずれたり変形してリードが接触したり、Ｉ
Ｃチップに加えられた応力でサスペンダとＩＣチップ間
のインナリードに張力が加わり断線するという問題があ
った。This conventional resin-encapsulated semiconductor device is capable of increasing the strength against resin flow during resin encapsulation as compared with the case of connecting with a bonding wire by using a TAB device. I made it, but I
As the integration of the C chip progresses further, the number of leads in the TAB tape increases and the leads also become thinner, and as a result, the suspender is displaced or deformed by the flow of resin and the leads come into contact with each other.
There is a problem that the stress applied to the C chip causes tension to be applied to the inner lead between the suspender and the IC chip, resulting in disconnection.
【０００５】本発明の目的はＴＡＢテープの変形やずれ
によるリードの短絡や断線を防止して信頼性を向上させ
た半導体装置を提供することにある。An object of the present invention is to provide a semiconductor device having improved reliability by preventing lead short circuit or wire breakage due to deformation or displacement of the TAB tape.
【０００６】[0006]
【課題を解決するための手段】本発明の樹脂封止型半導
体装置は、中央部に素子搭載用の凹部を形成したアイラ
ンドあるいはヒートスプレッダと、前記凹部底面に半導
体チップを搭載し且つ前記凹部周囲の平面上にサスペン
ダを接着して固定したＴＡＢデバイスと、前記ＴＡＢデ
バイスのアウタリードと接続して前記アイランドの周囲
あるいは前記ヒートスプレッダの周縁部に配置したリー
ドフレームのインナリードと、前記アイランドあるいは
ヒートスプレッダおよび前記リードフレームのインナリ
ードとを含んで封止した樹脂体とを有する。A resin-sealed semiconductor device of the present invention comprises an island or a heat spreader having a recess for mounting an element in the center, and a semiconductor chip mounted on the bottom of the recess and surrounding the recess. A TAB device in which a suspender is adhered and fixed on a flat surface, an inner lead of a lead frame connected to the outer lead of the TAB device and arranged around the island or in a peripheral portion of the heat spreader, and the island or heat spreader and the lead. And a resin body that encapsulates the inner lead of the frame.
【０００７】[0007]
【実施例】次に、本発明について図面を参照して説明す
る。Next, the present invention will be described with reference to the drawings.
【０００８】図１（ａ），（ｂ）は本発明の第１の実施
例を示す部分切欠平面図およびＡ−Ａ′線断面図であ
る。1 (a) and 1 (b) are a partially cutaway plan view and a sectional view taken along the line AA 'showing a first embodiment of the present invention.
【０００９】図１（ａ），（ｂ）に示すように、中央部
をディンプル加工して素子搭載用の凹部を形成し、且つ
吊りピン１でリードフレームに支持されたアイランド２
の凹部底面にＡｇペースト等を用いてＴＡＢデバイスの
ＩＣチップ３を接着し、アイランド２の凹部周囲の平面
上にＴＡＢデバイスのサスペンダ４を接着固定する。次
に、ＴＡＢデバイスのアウタリード５をリードフレーム
のインナリード６に接続し、アイランド２およびインナ
リード６の一部を含む領域を樹脂体７で封止する。As shown in FIGS. 1 (a) and 1 (b), an island 2 is formed by dimple-processing the central portion to form a recess for mounting an element, and which is supported by a lead frame by a hanging pin 1.
The IC chip 3 of the TAB device is adhered to the bottom surface of the concave portion using Ag paste or the like, and the suspender 4 of the TAB device is adhered and fixed onto the plane around the concave portion of the island 2. Next, the outer lead 5 of the TAB device is connected to the inner lead 6 of the lead frame, and the region including the island 2 and a part of the inner lead 6 is sealed with the resin body 7.
【００１０】ここで、一部のリードフレームのＧＮＤリ
ード６ａをアイランド２に接続しても良く、ＧＮＤ（接
地）配線の抵抗を低減すると共に、アイランド２の吊り
ピンを兼ねさせ、樹脂注入時におけるアイランド２のず
れを低減することができる。Here, the GND lead 6a of a part of the lead frame may be connected to the island 2 to reduce the resistance of the GND (ground) wiring and also serve as the hanging pin of the island 2 so that the resin can be injected during resin injection. The displacement of the island 2 can be reduced.
【００１１】図２（ａ），（ｂ）は本発明の第２の実施
例を示す部分切欠平面図およびＢ−Ｂ′線断面図であ
る。2 (a) and 2 (b) are a partially cutaway plan view and a sectional view taken along the line BB ', showing a second embodiment of the present invention.
【００１２】図２（ａ），（ｂ）に示すように、Ｃｕ板
あるいはＡｌ板等からなり中央部をディンプル加工して
素子搭載用の凹部を形成し、周縁部を絶縁性接着剤又は
絶縁性テープを介してリードフレームのインナリード６
に接着したヒートスプレッダ８の凹部底面にＡｇペース
トを用いてＴＡＢデバイスのＩＣチップ３を接着し、凹
部周囲の平面上にＴＡＢデバイスのサスペンダ４を接着
固定した以外は第１の実施例と同様の構成を有してお
り、放熱性を向上させると共にリードフレームのインナ
リード６のすべてがヒートスプレッタ８の周縁部に接着
されているので樹脂注入時の変形が抑制できる利点があ
る。なお、リードフレームのインナリード６のＧＮＤリ
ードをヒートスプレッダ８に直接接続することもでき
る。As shown in FIGS. 2 (a) and 2 (b), a central portion made of a Cu plate, an Al plate or the like is dimple-processed to form a concave portion for mounting an element, and a peripheral portion is made of an insulating adhesive or an insulating material. Inner lead 6 of lead frame
The same configuration as in the first embodiment except that the IC chip 3 of the TAB device is adhered to the bottom surface of the recess of the heat spreader 8 adhered to the IC chip by using Ag paste, and the suspender 4 of the TAB device is adhered and fixed on the flat surface around the recess. Since the heat dissipation is improved and all the inner leads 6 of the lead frame are adhered to the peripheral edge of the heat spreader 8, there is an advantage that deformation during resin injection can be suppressed. The GND lead of the inner lead 6 of the lead frame can be directly connected to the heat spreader 8.
【００１３】このように、複数のＧＮＤリードをアイラ
ンド又はヒートスプレッダに直接接続させることにより
ＧＮＤ配線の抵抗を４割程度まで低減することができ
る。As described above, the resistance of the GND wiring can be reduced to about 40% by directly connecting the plurality of GND leads to the island or the heat spreader.
【００１４】[0014]
【発明の効果】以上説明したように本発明は、ディンプ
ル加工で凹部を設けたアイランド又はスプレッダの凹部
底面にＴＡＢデバイスのＩＣを搭載し、凹部周辺の平面
上にＴＡＢデバイスのサスペンダを接着し固定すること
により、樹脂封止時の樹脂の流れでＴＡＢテープのサス
ペンダがずれ、断線や短絡が生ずることを防ぐことがで
き、半導体装置の信頼性を向上できるという効果を有す
る。As described above, according to the present invention, the IC of the TAB device is mounted on the bottom surface of the recess of the island or spreader in which the recess is formed by the dimple processing, and the suspender of the TAB device is bonded and fixed on the plane around the recess. By doing so, it is possible to prevent the suspender of the TAB tape from being displaced due to the flow of the resin at the time of resin sealing, and to prevent disconnection or short circuit, and it is possible to improve the reliability of the semiconductor device.
【図１】本発明の第１の実施例を示す部分切欠平面図お
よびＡ−Ａ′線断面図。FIG. 1 is a partially cutaway plan view and a cross-sectional view taken along line AA ′ showing a first embodiment of the present invention.
【図２】本発明の第２の実施例を示す部分切欠平面図お
よびＢ−Ｂ′線断面図。FIG. 2 is a partially cutaway plan view and a cross-sectional view taken along the line BB ′ of the second embodiment of the present invention.
【図３】従来の樹脂封止型半導体装置の第１の例を示す
部分切欠平面図およびＣ−Ｃ′線断面図。FIG. 3 is a partially cutaway plan view and a sectional view taken along the line CC ′ of the first example of a conventional resin-encapsulated semiconductor device.
【図４】従来の樹脂封止型半導体装置の第２の例を示す
部分切欠平面図およびＤ−Ｄ′線断面図。FIG. 4 is a partially cutaway plan view and a sectional view taken along line DD ′ of a second example of a conventional resin-encapsulated semiconductor device.
１ 吊りピン ２，２ａ アイランド ３，９ ＩＣチップ ４ サスペンダ ５ ＴＡＢテープのアウタリード ６ リードフレームのインナリード ７ 樹脂体 ８ ヒートスプレッダ １０ ボンディングワイヤ 1 Hanging Pin 2, 2a Island 3, 9 IC Chip 4 Suspender 5 TAB Tape Outer Lead 6 Lead Frame Inner Lead 7 Resin Body 8 Heat Spreader 10 Bonding Wire
Claims (1)
イランドあるいはヒートスプレッダと、前記凹部底面に
半導体チップを搭載し且つ前記凹部周囲の平面上にサス
ペンダを接着して固定したＴＡＢデバイスと、前記ＴＡ
Ｂデバイスのアウタリードと接続して前記アイランドの
周囲あるいは前記ヒートスプレッダの周縁部に配置した
リードフレームのインナリードと、前記アイランドある
いはヒートスプレッダおよび前記リードフレームのイン
ナリードとを含んで封止した樹脂体とを有することを特
徴とする樹脂封止型半導体装置。1. An island or heat spreader in which a recess for mounting an element is formed in the center, a TAB device in which a semiconductor chip is mounted on the bottom of the recess, and a suspender is adhered and fixed on a plane around the recess, TA
An inner lead of a lead frame connected to the outer lead of the B device and arranged around the island or in the peripheral portion of the heat spreader; and a resin body sealed with the island or the heat spreader and the inner lead of the lead frame. A resin-encapsulated semiconductor device having.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6170615A JPH0837269A (en) | 1994-07-22 | 1994-07-22 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6170615A JPH0837269A (en) | 1994-07-22 | 1994-07-22 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0837269A true JPH0837269A (en) | 1996-02-06 |
Family
ID=15908154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6170615A Pending JPH0837269A (en) | 1994-07-22 | 1994-07-22 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0837269A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05109968A (en) * | 1990-12-10 | 1993-04-30 | Nippon Steel Corp | Composite lead frame with large joint strength |
-
1994
- 1994-07-22 JP JP6170615A patent/JPH0837269A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05109968A (en) * | 1990-12-10 | 1993-04-30 | Nippon Steel Corp | Composite lead frame with large joint strength |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19961210 |