JPH0834579B2 - Digital voice recording / playback device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording / reproducing apparatus for digital audio by a rotary head recording system.

2. Description of the Related Art In recent years, as the LSI technology has advanced, digital processing of audio and video has rapidly progressed, and audio and video equipment capable of recording and reproducing digital signals has been actively developed. Among them, rotary head recording type digital VTRs are being developed for various purposes from commercial use to home use used in broadcasting stations and the like. In addition to improving the performance of commercial VTRs, at least in terms of functionality, the functions that were possible with conventional analog recording VTRs are required to be fully realized.

Among them, the realization of the special playback function is one of the points, and the queuing function at high speed and low speed for searching the editing point that can be easily done by the conventional analog linear recording,
In the case of rotary head type digital recording, complicated processing is required due to technical difficulties. That is, in the jog / shuttle mode, the variable speed reproduction at the reproduction speed corresponding to the rotating operation of the dial is realized with the reproduction sound of the highest quality as possible, and is used for the detailed setting of the editing point. Usually, the speed of low-speed playback is 1/32 (or 1/30, 1/25) from tape speed of ± 1 times to low speed such as ± 1/32 (or 1/30, 1/25) times. , While the high-speed playback is ± 2 times, 4 times,…, 32
Multiples of speeds of 2 are commonly used.

In addition, an auto-tracking (AT) head that moves the head mounted on the carrier of the voltage distortion element such as the piezo element is mounted so that special playback can be performed while keeping the playback screen good, +3 times speed ~ Within the range of about -1 speed, the recording track can be accurately traced and reproduced. In the jog / shuttle mode, the audio signal reproduced using this AT head is interlaced scanning in 1-field units during high-speed reproduction at 1 × speed or higher, and if the audio signal format configuration period is 1 field, for example, 3 In the case of double speed, a signal for one field period is obtained only once in three fields, and signals for the other two fields are missing and are not detected. When this is processed in the same manner as the signal processing at the normal speed, the obtained reproduced sound is a sampled sound obtained by extracting the sound for one field from the three-field period. This is different from the reproduced sound whose frequency pitch has increased in high-speed playback by conventional analog linear recording, but since the recorded content is missing but the pitch has not changed, it is rather easy to understand in the sense of confirming the recorded content. There is no problem in practical use.

On the other hand, in the case of low speed reproduction, since the same recording track is repeatedly traced by the AT head according to the reproduction speed, the reproduction signal obtained is, for example, in the case of 1/4 speed, reproduction in which each field is repeated four times. When the signal becomes a signal and the same processing as the normal speed reproduction processing is performed, the reproduced sound gives a feeling of strangeness.

Therefore, in the case of special reproduction of sound, some processing is required in low speed reproduction, and in 1 / N times low speed reproduction, this is extracted only once from the reproduction signal of one field period repeatedly reproduced N times, The operation is performed by extending the time axis N times to obtain a reproduced sound with a lowered frequency pitch similar to that of conventional analog linear recording.

On the other hand, when recording digital audio on a VTR, the relationship between the sampling frequency and the video signal becomes a problem. For example, 48kHz and N, which are commonly used as standard sampling frequencies.
It is not an integer ratio with the field frequency of TSC television system 60 / 1.001Hz. Therefore, in the case of a recording / reproducing apparatus that samples at a frequency of 48 kHz and records together with a video signal in units of 1 field, the number of audio samples contained in each field is not constant, and for example, 4004 samples / 5 fields are used as a period. 801, in order to the field
An operation of allocating 801,801,801,800 samples is required, and this field sequence is called a leap field sequence. In an actual recording / playback device, 80
A flag for identifying only the field of 0 samples is recorded together with the time-axis-compressed digitally encoded audio signal in an area other than the data area, and during playback, the audio signal is seamlessly based on the detection result of this flag. It is extended to the time axis of the original 48kHz sampling voice so that it is continuous.

On the other hand, in the case of the PAL system, since the field frequency is 50 Hz, each field has a fixed number of samples of 960 samples, and the above-mentioned problem does not occur.

When the low-speed reproduction described above is performed using a format in which the number of samples in a unit period of signal processing is not constant, as in the example of the NTSC system described above, the following problems occur.

It is a human being who operates the dial in the jog / shuttle mode, and its movement is extremely irregular and arbitrary. Therefore, it is not possible to predict a forward or backward direction change or a rapid speed change. Further, the more abruptly the change is, the larger the gap between the control command obtained from the movement of the dial, the servo detection signal of the tape running control, and the actually obtained reproduction signal becomes in terms of followability. Eventually, signal processing control according to the reproduced signal actually obtained is required.

During playback, it is generally necessary to perform a read operation while expanding the time axis according to the original audio time series from a memory in units of one field, but in the case of the NTSC method described above, read address control according to the number of samples is possible. is necessary. That is, it is necessary to supply read addresses corresponding to 801 48 kHz samples in the first field to the fourth field and 800 samples in the fifth field. Writing to this field memory is performed based on a reproduction signal, and reading is performed continuously and continuously with a series of sampling clocks divided from a crystal oscillator. Therefore, as for the time relationship between writing and reading, as long as the tape running servo control is normally performed, both of them maintain a constant phase in time, and even if there is jitter of tape running, due to timing overlap, It is set so that memory overflow or underflow does not occur. When playing at normal speed, the above-mentioned leap field arrives once every five times, but the memory read timing moves only in the relevant field, correspondingly by a reduction of one sample, and in a 5-field cycle. In this case, the phase relationship between writing and reading is maintained as it is, and normal reading is performed.

However, as described above, in the low-speed playback mode,
The same field is repeatedly reproduced, and the number of repetitions is arbitrary. When moving slowly between the forward and reverse directions, a stationary state is interposed between them.
In other words, the intervals at which the leap fields arrive are completely arbitrary, and only the leap fields may be continuously reproduced, or vice versa. Therefore, if read control of the reproduction field memory is performed by relying on the leap field identification flag, a shift may occur with respect to the write timing. Particularly, when the normal speed reproduction and the low speed reproduction are continuously performed, the timing error is accumulated, and if the time difference of the read / write timing exceeds the limit and overlaps, the reproduction may be impossible thereafter. .

An object of the present invention is to solve the above problems and provide a good reproduced sound in low speed reproduction of sound using a format of a leap field structure.

Means for Solving the Problems A VTR device for recording / reproducing a digitally encoded audio signal together with a video signal, wherein the audio signal is divided into a plurality of blocks in one screen unit of the video signal, When the sampling signal period for performing the digital encoding of is not an integer ratio with the period of one screen unit of the video signal and is an integer ratio with the period of a plurality of screen units of the video signal, one screen unit of the video signal The number of audio signal samples included in the period of is set to a value that changes periodically, and sample number identification information corresponding to the number of audio signal samples and number information sequentially added for each period of one screen unit of the video signal are included. Information generation means to be inserted in the recording signal for each block, and the period reproduced in each screen unit period of the video signal from the number information in the reproduction signal during reproduction. It comprises a discriminating means for discriminating between return and update, a gate means for gated the sample number discriminating information by the discriminative output, and an initializing means for initializing a read address counter of the reproducing side memory by the output of the gate means. .

Operation With the above configuration, in the present invention, it is detected whether a new audio signal arrives or the same signal is repeated by using the detection result of the number information in the period of one screen unit of the video signal obtained from the reproduced signal, and this is detected. It is used as the update information for one screen unit period of the video signal, and when the update information is detected, the read address counter of the playback memory is initialized based on the sample number information, and low-speed playback or static where the update information is not detected In this state, the read address counter operates in a predetermined internal cycle to control the timing of the number of samples of the reproduced audio signal.

Embodiment FIG. 1 is a block diagram of a digital voice recording / reproducing apparatus according to an embodiment of the present invention.

In the figure, 1 is an input terminal of an analog audio signal, 2
Is an AD converter for multiple audio channels, and 3 is a multiplexer that time-divisions the input signals of multiple channels.
Abbreviated as MUX, 4 is a recording side field memory having a two-page configuration, and 5 is an MU that performs address multiplexing of the field memory
X and 6 are write address counters for writing the digitized voice signal in the field memory 4, and 7 is an ECC for supplying read and write addresses to the field memory 4 to generate an error correction code (ECC) corresponding to the voice signal. An address counter, 8 is a read address counter that supplies a read address from the field memory 4, 9 is an ECC generation circuit that generates an error correction code (ECC) that performs error detection and error correction of a voice signal, 10 is a block number, Identification information (ID such as segment number, field number, leap field flag and video / audio identification flag)
ID generation circuit for generating a code), 11 is a MUX for adding an ID code to audio data, 12 is a modulation circuit for converting into a code format suitable for a recording medium, and 13 is a recording for driving a recording head. A recording circuit for converting into a signal format, and 14 is a recording signal output terminal.

On the playback side, 15 is a playback signal input terminal, 16 is a playback circuit that amplifies, equalizes, and pulses the playback signal, 17 is a demodulation circuit that demodulates the modulation performed by the modulation circuit 12, and 18 is a recording ID decoder that detects the ID code added on the side,
Reference numeral 19 is an update flag generation circuit that compares field number information in the ID code between the preceding and subsequent fields to generate a field update flag, 20 is an AND gate (AND), and 21 is 2-3.
Reproduction side field memory of page configuration, 22 MUX for address multiplexing the field memory 21, 23 is a write address counter for supplying the write address of the reproduction signal to the field memory 21, 24 is a field memory for performing error correction operation An ECC address counter that supplies the read and write addresses to 21, 21 is a field memory 21
From the read address counter for reading the audio signal according to the audio time series, 26 is an error correction circuit that corrects the error part in the reproduced signal, and 27 is the average of the audio samples before and after the error correction causes uncorrection. A correction circuit for performing a correction operation by value interpolation, 28 is a special reproduction memory that stores a reproduced audio signal in several field sections during low speed reproduction, and 29 is an address supply to the special reproduction memory 28 according to the reproduction speed during low speed reproduction. Jog memory controller, 30
An interpolation filter composed of DSP etc. that can change the number of interpolation samples and cutoff frequency according to the playback speed, 31 is a MUX that selects playback signals in normal speed and low speed playback, 32 is a multi-channel DA converter, 33 is audio This is a signal output terminal.

FIG. 2 is a block diagram of a block signal format and an ID code used in an embodiment of the present invention. As the signal configuration used here, the audio is divided into a plurality of blocks in units of one field of the video signal, the time axis is compressed into an area separated from the video signal, and the head drum is rotated at a high speed to obtain a plurality of segments. The case of recording separately is shown.

In the figure, 34 is a block synchronization code (SYNC), and 35 is an ID code (ID) which is identification information added to each block.
Similarly, 0) and 36 are ID codes (ID1), 37 is digitally encoded audio data (DATA), and 38 is DATA in block units.
It is an error correction code (ECC) generated for 37.

Further, the same figure shows a detailed configuration example of the ID codes 35 and 36.
ID0 and ID1 are block addresses (b8 to b0: 9 bits) indicating a block number in one field in 8-bit units, and segment numbers (S2 to S0: 3 bits) when one field is divided and recorded in a plurality of segments, Field number added in order to each field (f1 to f0: 2 bits), Leap field flag (LF: 1 bit) added to identify the field when the number of samples in one field is different from other fields ), A V / A flag (V / AF: 1 bit) for identifying the video signal portion and the audio signal portion.

Turning now to the operation description, the analog audio signals of a plurality of channels input from the input terminal 1 shown in FIG. 1 are converted into digital codes by the AD converter 2, and after the MUX 3 multiplexes the plurality of channels. , Is temporarily written in the recording side field memory 4 in units of one field in accordance with the audio signal time series. The write address at that time is supplied from the write address counter 6 via the MUX 5. The field memory 4 usually has a two-page structure, and while the audio signal is continuously written in one memory, read and write addresses for generating an error correction code (ECC) are written in the other memory. EC supply
It is performed from the C address counter 7 via the MUX 5. The error correction code is generated when the audio signal read from the field memory 4 is in the ECC in a sequence different from the writing time series.
The ECC generated by being input to the generation circuit 9 is written in the field memory 4 again. After the generation of the error correction code is completed, the time axis compressed audio data and ECC are stored in the field memory 4 in a predetermined order that is different from the time series of writing and the order of generating the outer code at a timing with the video signal. Is read intermittently according to the address supplied from the read address counter 8. The reason why it is intermittent here is that, as shown in the format shown in FIG. 2, a read operation is performed with a pause period so that SYNC and ID0 and ID1 can be inserted later.

On the other hand, the ID generation circuit 10 generates the ID0 and ID1 codes shown in FIG. That is, based on the output of the read address counter 8, block addresses (b8 to b0), segment numbers (S2 to S0), and field numbers (f1 to f0)
A leap field flag (LF) is generated based on the output of the write address counter 6. Here, the field number and the leap field flag which play an important role in the present invention will be further described. Since the field number is 2 bits in this case, addresses 0, 1, 2, and 3 are common to both the NTSC system and the PAL system. And have the same number in the same field. The leap field flag is only for the NTSC system, and as described in the section of the conventional example, only the field of 800 samples is flagged. Also, the sequence of this leap field and the sequence of field numbers are independent and are not related.

The generated ID code is multiplexed with the audio data and ECC by the MUX 11, and a block synchronization code (SYNC) is added, though not shown in the drawing. In the modulation circuit 13, a digital modulation operation is performed to obtain a code form suitable for the recording medium, and after the recording circuit 13 converts the waveform into a recording current waveform, a head drive signal is output from the recording signal output terminal 14.

Turning now to the description of the reproduction operation, the reproduction signal inputted from the reproduction signal input terminal 15 is reproduced by the demodulation circuit 17 via the reproduction head amplifier, a reproduction circuit 16 including waveform equalization processing, waveform shaping processing and the like. Lock reproduction and block sync signal detection are performed along with conversion to the original NRZ code string. The demodulated reproduction signal is once written in the reproduction side field memory 21 for each field. The reproducing side field memory 21 is composed of a memory having a capacity of one field period of 2 pages or 3 pages, and the writing order of the reproducing signals corresponds to the reading order of the recording side field memory 4. The address for each block at the time of writing is
The ID code block address, segment number, and field number are decoded by the ID decoder 18, and the address in the block is written from the write address counter 23 to the MU.
Supplied via X22. When the writing of the playback signal in 1-field units is completed, the address that is the same as the address that generated the ECC code during recording is the ECC address counter 2
The error correction circuit 26 detects the error contained in the reproduced signal and corrects the error of the signal supplied from 4 through the MUX 22 and read from the field memory 21. When the error correction is performed by the ECC code and the signal to be corrected is written again in the field memory 21 and the correction operation is completed, the audio signal is continuously read from the field memory 21 in accordance with the time series of the original audio. At this time, read addresses are continuously supplied from the read address counter 25 to the field memory 21 via the MUX 22. Further, only when an uncorrectable error occurs, the correction circuit 27 operates and the interpolation operation by the average value calculation is performed from the samples before and after on the time axis. After that, via the MUX31, DA converter 3
Conversion to an analog signal by 2 and output of an analog audio signal from the terminal 33 are performed.

The above describes the playback operation at normal speed. Next,
The operation at the time of low speed reproduction, which is the point of the present invention, will be described in more detail.

At the time of low speed reproduction, the reproduction signal of the same field can be repeatedly obtained by the function of the AT head described in the section of the conventional example. Therefore, the reproduction field number inserted in each block obtained by the ID decoder 18 is used as the update flag detection circuit 19
, And the field numbers before and after are compared while simultaneously performing a number of coincidence detections to improve reliability. The flag detection circuit further outputs an update flag only when the value is updated from the comparison result.

On the other hand, the leap field flag detected by the ID decoder 18 is also detected many times to improve reliability,
Input to AND gate 20. In the AND gate 20, the leap field flag is gated by the update flag and applied to the load terminal of the read address counter 25. That is, the AND gate 20 passes the leap field flag only when the reproduction signal field is updated even at the normal reproduction speed and the low speed reproduction, and it is set at the time of the repeated reproduction at the low speed reproduction and the reproduction at the stationary state. Do not pass. Therefore, the leap field flag of the output of the AND gate 20 can obtain an output almost once every five fields in any reproduction mode. Also, in the read address counter 25, when the leap field flag is applied to the load terminal, the number of read samples in one field period is set to 800, and in other cases, it is regarded as 801 and the load signal by the leap field flag does not come from the outside. Even in such a case, an internal field back loop is provided at the load terminal so that the number of samples can be controlled in a 5-field cycle. With this configuration, even if the arrival of the leap field flag becomes irregular, continuous arrival, or no arrival at all, the field memory 21
There is no significant change in the temporal phase between the write address and the read address of the above, and no trouble occurs even when switching between normal speed and low speed reproduction.

The audio signal read from the field memory 21 at the time of low speed reproduction is written in the special reproduction memory 28 in field units via the correction circuit 27. However, the signal to be written is only the signal in the field period in which the update flag output from the update flag detection circuit 19 is set. When the reproduction is performed at a low speed of 1 / N, the signal of the same field is reproduced N times. Therefore, only the signal of the first field is reproduced by the special reproduction memory 28.
Jog memory controller 29 when writing to and reading from
The read time axis is extended with a read address based on a clock with a cycle N times larger. When the N-th sample is further expanded by N times, the remaining N-1 samples are compensated by the filtering process by the interpolation filter 30 using the DSP to improve the reproduced signal quality. Finally, MU during slow playback
X31 selects the output of the interpolation filter 30 and is output from the terminal 33 via the DA converter 32.

Even when the leap field structure such as the PAL system is not used, the leap field flag is recorded as zero in the format of FIG. 2, the update flag is created from the field number information at the time of reproduction, and the special reproduction memory 28 is controlled. Can be realized in the same way, and compatibility with the NTSC system can be maintained.

EFFECTS OF THE INVENTION With the above-described configuration, according to the present invention, even if the special reproduction mode such as the normal speed reproduction and the low speed reproduction is freely switched, the reproduction of the high quality is performed without causing the overflow and the underflow of the reproduction memory. A voice signal can be obtained, and its effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital audio recording / reproducing apparatus according to an embodiment of the present invention, and FIG. 2 is a block diagram of a signal format used in the embodiment of the present invention. 10 ... ID generation circuit, 18 ... ID decoder, 19 ... Update flag detection circuit, 20 ... AND gate, 21 ... Field memory, 23 ... Write address counter, 25 ... Read address counter,
28… Special playback memory, 29… Jog memory controller.

Claims (1)

[Claims] 1. A VTR device for recording / reproducing a digitally encoded audio signal together with a video signal, wherein the audio signal is divided into a plurality of blocks for each screen of the video signal, and the digital signal of the audio signal is divided. When the sampling signal cycle for encoding does not have an integer ratio with the period of one screen unit of the video signal but has an integer ratio with the period of multiple screen units of the video signal, the period of one screen unit of the video signal The number of the audio signal samples included in the number is periodically changed, and the sample number identification information corresponding to the number of the audio signal samples and the number information sequentially added for each screen unit period of the video signal Information generation means to be inserted into the recording signal for each block, and whether the period reproduced for each screen unit period of the video signal is repeated or updated based on the number information in the reproduced signal during reproduction. At the time of variable speed reproduction, it has a judgment means for judging, a gate means for gated the sample number identification information at the judgment output, and an initialization means for initializing the read address counter of the reproducing side memory by the output of the gate means A digital audio recording / reproducing apparatus characterized by performing read-out memory reading control of the above.